Ibex bumped #139
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Ibex bumped #139
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Update code from upstream repository https://github.com/lowRISC/ibex.git to revision 594ea976c9dad793f87edf91ec1c4c1df447e6dc * [dv] Plan test for DM accesses in debug mode (Andreas Kurth) * fix: Illegal instruction display message (Hao) * Verification should be done with ibex_cosim branch (Marno van der Maas) * [ci] switch CI runner from Ubuntu 20.04 to 22.04 (Gary Guo) * [ci] update verible version to match OT (Gary Guo) * [ci] remove Azure Pipelines magic commands (Gary Guo) * [cosim] Update comment on `set_mip` in Cosim interface (Greg Chadwick) * [rtl] Remove low utility assertions (Greg Chadwick) * [rtl] Flush pipe on all CSR modifications (Greg Chadwick) * [rtl] Read csr_addr direct from instruction (Greg Chadwick) * [ibex_core] Fix assertion when SecureIbex is false (Rupert Swarbrick) * [ibex_register_file_fpga] Drop two confusing comments (Rupert Swarbrick) * Fix typo in comment in ibex_id_stage.sv (Katharina) * [ibex_tracer] Use static variables in always/final blocks (Robert Schilling) * [rtl] Drive oh_raddr_*_err if RdataMuxCheck=0 (Rupert Swarbrick) * Update core_ibex_pmp_fcov_if.sv (Priyanshu Mishra) * [rtl,pmp] Allow all accesses to Debug Module in debug mode (Andreas Kurth) * [controller] Add assertion on pipeline flush when entering debug mode (Andreas Kurth) * ibex_pcounts: resolve uninitialize warning (Marno van der Maas) * [rtl] Fix non-DSP reset in ibex_counter (Pascal Nasahl) * Revert "[rtl] Fix counter reset value on FPGA" (Pascal Nasahl) * [rtl] Fix counter reset value on FPGA (Pascal Nasahl) * [ci] remove Azure Pipelines (Gary Guo) * [rtl] Fix zero value in FPGA RF (Pascal Nasahl) * Block diagram: make feature text readable (Marno van der Maas) * Block diagram: fixes and improved looks (Marno van der Maas) * [dv] Cleanup some code in the compile_tb.py module (Harry Callahan) * [dv] Tweak ISS linker arg construction for Xcelium (Harry Callahan) * [pmp] Use top-level straps for PMP reset values (Robert Schilling) * Update more documentation links (Elliot Baptist) * Update verification_stages.rst OT links (Elliot Baptist) * [rtl] Fix wrong address in latch RF (Pascal Nasahl) * [rtl] fix a typo. (lingscale) * [doc] fix a typo. (lingscale) * Fix icache regression failure on VCS (Gary Guo) * [rtl] Remove ECC related data_rdata_i -> instr_X_o feedthroughs (Greg Chadwick) * Add SECURITY.md (Greg Chadwick) * [dv] Increase iterations and instructions in riscv_rf_intg_test (Greg Chadwick) * [dv] Alter riscv_rf_intg_test to cover more scenarios (Greg Chadwick) * [rtl] Fix logic for generating ECC related alerts (Greg Chadwick) * [dv] Add spurious responses to memory agent (Greg Chadwick) * [dv] Add riscv_ram_intg_test This test injects a fault into different MuBi encoded signals within the prim_ram_1p_scr and prim_ram_1p_adv and checks whether a fatal alert is triggered. (Pascal Nasahl) * [cosim] Clang lint fix (Greg Chadwick) * [ci] Bump co-sim version (Greg Chadwick) * [dv] Output warning message on problematic MIP changes (Greg Chadwick) * [cosim] Correctly deal with checking top of range memory accesses (Greg Chadwick) * [dv] Update testbench to use new 'pre_val' MIP (Greg Chadwick) * [dv] Fix model mismatches in cases where an access crosses PMP regions (Greg Chadwick) * [dv] Fix exception_stall_instr_cross illegal bins (Greg Chadwick) * [dv] Add riscv_rf_ctrl_intg_test (Greg Chadwick) * [ci] update private CI (Gary Guo) * [dv] Add cover points for memory interface behaviour (Greg Chadwick) * [dv] Fix race condition in ibex_mem_intf_agent (Greg Chadwick) * [doc] Fix C++ style guide link in README (James Wainwright) * [dv] Remove phase argument from collect_trans (Pascal Nasahl) * [dv] Add mubi and prim_count pkg to DV environment (Pascal Nasahl) * Update lowrisc_ip to lowRISC/opentitan@d268f271f4 (Pascal Nasahl) * [rtl] Add error port to iCache (Pascal Nasahl) * [rtl] Update RAM ports inside ibex_top (Pascal Nasahl) * [rtl] Guard against false memory responses for secure configurations (Greg Chadwick) * Expand the coverage plan after a review (Marno van der Maas) * [rtl] Expose ICacheScrNumPrinceRoundsHalf parameter (Pirmin Vogel) * Add missing copyright headers (James Wainwright) * [simple_system] Bump C++ version in core files (Rupert Swarbrick) * Keep to patch numbering convention (Marno van der Maas) * [ci] Add missing sudo in CI (Gary Guo) * [dv] Output VCS simulation log to file (Greg Chadwick) * [dv] Add flag needed to allow force under VCS (Greg Chadwick) * [dv] Fix use of plusargs (Greg Chadwick) * [fcov] Fix illegal bins related to stall types (Greg Chadwick) * [dv] Handle missing paths when producing regression log (Greg Chadwick) * [dv] Only run SecureIbex relevant tests for SecureIbex configs (Greg Chadwick) * [dv] Fix regression for non PMP configs (Greg Chadwick) * [dv] Fix path for vcs.tcl for wave dumping (Greg Chadwick) * [dv, cov] Log coverage merge stdout for VCS (Greg Chadwick) * [cosim] Fix SIGSEGV in ~SpikeCosim (Greg Chadwick) * [dv] Skip SVG generation in DV flow if svg module is missing (Greg Chadwick) * [dv] Flow modifications for CentOS 7 for testbench compile (Greg Chadwick) * Require Pydantic 2 or above (Marno van der Maas) * [rtl] Update use of prim_count following port changes (Greg Chadwick) * Update lowrisc_ip to lowRISC/opentitan@e0c4026501 (Greg Chadwick) * [tracer] Fix reporting of load/store data (Adrian Lees) * [bus] Return error if decode fails (Adrian Lees) * Update old `cpuctrl` CSR name in `cs_registers.rst` (Luís Marques) * Update benchmarks README to better explain how to try different configs (Greg Chadwick) * Enable the icache in coremark (Greg Chadwick) * Add icache_enable function to simple_system_common.h (Greg Chadwick) * Fix stale merge commit issue in private CI (Gary Guo) * [doc] Require sphinx version >= 7.0 (Greg Chadwick) * [rtl] Harden lockstep enable against FI (Pascal Nasahl) * Update verilator version (Pascal Nasahl) * [icache] Disable S&P diffusion layer in memory scrambling (Michael Schaffner) * Update lowrisc_ip to lowRISC/opentitan@4cf2479b8e (Michael Schaffner) * [dv] Fix paths in `merge_cov.py` (Sᴜᴘᴇʀ Lᴇᴇ) * Add NOTICE file (Michael Munday) * Tweak questa timescale argument (Harry Callahan) * Fixup the questa build/sim command templates in rtl_simulation.yaml (Harry Callahan) Signed-off-by: Marno van der Maas <mvdmaas+git@lowrisc.org>
Update code from upstream repository https://github.com/lowRISC/opentitan to revision d268f271f4f75aeb8f3bf9624a497ae5bfb9c47e * [rtl] MuBi encoding of iCache memory ctrl signals (Pascal Nasahl) * [sram_ctrl] Add readback feature (Pascal Nasahl) * [prim_pad_wrapper,rtl] Change input enable to active-high (Andreas Kurth) * [hmac/rtl] Wait for digest of complete block when stopping (Martin Velay) * [prim_sha2_pad,rtl] Signal msg feed complete also when stopping (Andreas Kurth) * [prim_sha2_pad,rtl] Go to idle (without padding) when told to stop (Andreas Kurth) * [prim_sha2_pad,rtl] Refactor comparison on tx_count and msg len into signal (Andreas Kurth) * [prim_sha2_pad,rtl] Fix setting of digest mode when continuing (Andreas Kurth) * [hmac/prim_2,rtl] Do not clear redundant digest values (Ghada Dessouky) * [prim,fpv] Tweak how a parameter gets used in some assertions (Rupert Swarbrick) * [prim,fpv] Fix trivial lint warning in prim_fifo_sync_assert_fpv (Rupert Swarbrick) * [prim,rtl] Fix trivial lint warning in prim_fifo_sync (Rupert Swarbrick) * [top_earlgrey,pinmux] Add input disable attribute for non-manual pads (Andreas Kurth) * [ipgen,flash_ctrl] Fix core files (Guillermo Maturana) * [prim,rtl] Avoid unnecessary check in prim_esc_receiver.sv (Rupert Swarbrick) * [prim,fpv] Use PossibleActions param in prim_esc_receiver (Rupert Swarbrick) * [prim_diff_decode] Use `prim_xnor2` to detect integrity issue (Andreas Kurth) * [prim] Fix typo'd loop increment (James Wainwright) * [hmac/prim_sha2,rtl] Implement SW error for invalid HMAC config (Ghada Dessouky) * [prim_sha2,rtl/dv] Fix secret value wiping (Ghada Dessouky) * [prim,rtl,fpv] Fix typo in assertion in prim_alert_receiver (Rupert Swarbrick) * [fpv,prim] Drop prim_count_expected_failure.hjson (Rupert Swarbrick) * [fpv,prim] Generalise from DecrNeverTrue to listing possible actions (Rupert Swarbrick) * [prim,fpv] Correct assertions for commit_i input (Rupert Swarbrick) * [prim,fpv] Rephrase some "backwards" assertions in prim_count (Rupert Swarbrick) * [prim,fpv] Properly "waive" some unreachable prim_count assertions (Rupert Swarbrick) * [prim,fpv] Fix width of FPV variable in prim_arbiter_ppc.sv (Rupert Swarbrick) * [prim,fpv] Rephrase prim_count error assertions (Rupert Swarbrick) * [prim,fpv] Fix port list in prim_count_tb (Rupert Swarbrick) * [prim_ram_1p_scr] Align documentation with actual implementation (Pirmin Vogel) * [prim, rom_ctrl] Increase number of PRINCE rounds for improved security (Pirmin Vogel) * [prim,fpv] Make file structure slightly clearer (Rupert Swarbrick) * [prim,fpv] Shorten a variable name (prim_hier -> hier) (Rupert Swarbrick) * [prim,fpv] Tidy up and document some FPV macros (Rupert Swarbrick) * [rtl,comments] Fix some comments (Guillermo Maturana) * [dv,prim] Clarification of reset behavior (Adrian Lees) * [ast] Add dependency in fileset_partner to select correct ast_pkg (Sharon Topaz) * [prim,fpv] Only allow unconstrained counters in prim_count FPV (Rupert Swarbrick) * [prim,dv] Tweak ASSERT_FINAL to be a no-op if FPV enabled (Rupert Swarbrick) * [prim,tlul,rtl] Explicitly cast a "1" to specific number of bits (Rupert Swarbrick) * Add the project name to the copyright header (Michael Munday) * Remove trailing whitespaces (Pirmin Vogel) * [hmac] Coding style and minor fixes (Ghada Dessouky) * [prim_fifo_sync_cnt] Minor code cleanup (Andreas Kurth) * [prim_fifo_sync_cnt] Fix signedness of Depth parameter (Andreas Kurth) * [prim_fifo_sync] Keep wraparound pointers contained within `prim_fifo_sync_cnt` (Andreas Kurth) * [prim_fifo_sync] Move pointer and depth calculation to `prim_fifo_sync_cnt` (Andreas Kurth) * [prim_fifo_sync] Remove out-commented RTL code (Andreas Kurth) * [prim_fifo_sync_cnt] Improve module and parameter documentation (Andreas Kurth) * [lint] Demote licence warning in AscentLint parser (Rupert Swarbrick) * [prim] Add support for MuBi's up to 32bit (Michael Schaffner) * [otp_ctrl] Increase Hamming distance in OTP commands (Michael Schaffner) * Make .core files pass FuseSoC 2 schema validator (Olof Kindgren) * [prim_sha2,rtl] Add key_length type and change type encodings (Ghada Dessouky) * [dv,sram_ctrl] Fix a few failing tests (Guillermo Maturana) * [prim/lint] Fix long line lint error in prim_intr_hw (Alexander Williams) * [doc,prim] Improve comments in prim_intr_hw (Harry Callahan) * [prim_sha2] Add `hash_running_o` (Andreas Kurth) * [prim_sha2] Add `hash_continue_i` (Andreas Kurth) * [prim_sha2] Make digest writable from input while disabled (Andreas Kurth) * [prim] Fix lint error in shadow register subreg primitive (Pirmin Vogel) * [primgen] Fix parameters in a primgen template (Rupert Swarbrick) * [prim] Avoid unnecessary Impl parameter in prim_onehot_check (Rupert Swarbrick) * [hw,prim,sha2] Fix syntax error in waiver file (Robert Schilling) * [prim_sha2,rtl] prim_sha2 minor RTL and styling fixes (Ghada Dessouky) * [prim_sha2,rtl] Add RTL implementation + update core + lint waivers (Ghada Dessouky) * [clkmgr] Restructure division clock feedback (Michael Schaffner) * Revert "[edn] Move prim_edn_req out of prim" (Rupert Swarbrick) * [rtl, prim] Add 'commit' functionality to prim_count (Greg Chadwick) * [prim] Fix up 1r1w cores (Alexander Williams) * [prim] Add two-port memory ECC wrappers (Michael Schaffner) * [prim] Add two-port memory implementation (Michael Schaffner) * [prim] Make copies of dual port memory files (Michael Schaffner) * [otp_ctrl] Add option to disable integrity on a partition (Michael Schaffner) * [prim_trivium] Allow dynamically disabling the lockup protection (Pirmin Vogel) * [scrambling] Add reference to RFC issue (Michael Schaffner) * [edn] Move prim_edn_req out of prim (Rupert Swarbrick) * [reggen] Remove the devmode input (Michael Schaffner) * [prim, rom_ctrl] Remove S&P layer from data scrambling (Michael Schaffner) * [prim] Fix typo in Trivium/Bivium stream cipher primitives (Pirmin Vogel) Signed-off-by: Marno van der Maas <mvdmaas+git@lowrisc.org>
marnovandermaas
changed the title
elliotb-lowrisc
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Apr 29, 2025
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This is the way to fix: #129
Closes: #125