Waveform Viewer Extension for VScode

PROLEAD - A Probing-Based Leakage Detection Tool for Hardware and Software

🖥️ An assembler and hardware simulator for the Mano Basic Computer, a 16 bit computer.

A versatile software tool to analyse and configure CANopen devices.

A register level simulation of the ATMega328 and other hardware

An assembler and hardware simulator for the Mano Basic Computer, a 16 bit computer

A header-only C++ library that provides unit test facilities for Verilator which makes your testing procedure much easier.

The repository implements MOESI protocol and contains multiple cores, interconnect and memory to understance how cache coherency works and impacts performance.

simengine :: Hardware simulation engine for Alteeve's Anvil! Intelligent Availability platform and similar HA configurations

A resource-friendly VHDL model for large memory simulations

Neural Networks deals with hardware implementations and simulation in mind

An assembler and hardware simulator for Mano Basic Computer, a 16-bit computer.

A hardware implementation on Logisim of the World's Worst Video Card designed by Ben Eater.

Computer Organization 2 Projects

simulation of a multi-core (with an arbitrary number of cores) cache, including set associativity, with simple MSI cache coherency.

I developed a modular software architecture for a simulation of a simple 8-bit CPU in C. My goal was to make the software universally adaptable by building it modularly, allowing for easy customization and expansion of the simulation's features and components.

This project implements an 8-bit counter system using Proteus simulation.

16 Bit, multicore, unicycle processor for general purpose simulated in VHDL. Created as a tool for teaching computer architecture at Federal University of Piauí.

Verilog Implementation of a Pipelined MIPS Single Cycle CPU