From eb54502a4571f5cd5c20b7691c33d101e12e53b5 Mon Sep 17 00:00:00 2001 From: soheilshahrouz Date: Thu, 24 Apr 2025 17:22:40 -0400 Subject: [PATCH 01/12] make format enum class e_rr_type a few remaining t_rr_type vals CHANY ---> t_rr_type::CHANY CHANX ---> t_rr_type::CHANX OPIN ---> t_rr_type::OPIN IPIN ---> t_rr_type::IPIN SINK ---> t_rr_type::SINK SOURCE ---> t_rr_type::SOURCE --- libs/librrgraph/src/base/check_rr_graph.cpp | 72 +++++----- .../src/base/check_rr_graph_obj.cpp | 4 +- libs/librrgraph/src/base/rr_graph_builder.cpp | 12 +- libs/librrgraph/src/base/rr_graph_obj.cpp | 63 +++++---- libs/librrgraph/src/base/rr_graph_obj.h | 2 +- libs/librrgraph/src/base/rr_graph_storage.cpp | 34 ++--- libs/librrgraph/src/base/rr_graph_storage.h | 12 +- libs/librrgraph/src/base/rr_graph_utils.cpp | 20 +-- libs/librrgraph/src/base/rr_graph_view.h | 12 +- libs/librrgraph/src/base/rr_node_types.h | 14 +- .../librrgraph/src/base/rr_spatial_lookup.cpp | 104 +++++++------- libs/librrgraph/src/base/rr_spatial_lookup.h | 2 +- .../src/io/rr_graph_uxsdcxx_serializer.h | 54 +++---- .../utils/alloc_and_load_rr_indexed_data.cpp | 10 +- .../librrgraph/src/utils/describe_rr_node.cpp | 6 +- utils/fasm/test/test_fasm.cpp | 10 +- utils/route_diag/src/main.cpp | 2 +- vpr/src/base/old_traceback.cpp | 8 +- vpr/src/base/read_route.cpp | 27 ++-- vpr/src/base/read_route.h | 5 +- vpr/src/base/stats.cpp | 10 +- vpr/src/base/vpr_types.h | 17 +-- vpr/src/draw/draw.cpp | 4 +- vpr/src/draw/draw_basic.cpp | 38 ++--- vpr/src/draw/draw_rr.cpp | 92 ++++++------ vpr/src/draw/draw_rr_edges.cpp | 18 +-- vpr/src/draw/draw_searchbar.cpp | 4 +- vpr/src/draw/search_bar.cpp | 8 +- vpr/src/pack/post_routing_pb_pin_fixup.cpp | 8 +- .../pack/sync_netlists_to_routing_flat.cpp | 8 +- .../compute_delta_delays_utils.cpp | 20 +-- vpr/src/place/place_macro.cpp | 14 +- vpr/src/power/power.cpp | 38 ++--- vpr/src/route/annotate_routing.cpp | 4 +- vpr/src/route/build_switchblocks.cpp | 28 ++-- vpr/src/route/channel_stats.cpp | 12 +- vpr/src/route/check_route.cpp | 56 ++++---- vpr/src/route/clock_connection_builders.cpp | 17 +-- vpr/src/route/clock_network_builders.cpp | 4 +- vpr/src/route/connection_router.cpp | 24 ++-- vpr/src/route/overuse_report.cpp | 12 +- vpr/src/route/route.cpp | 2 +- vpr/src/route/route_common.cpp | 26 ++-- vpr/src/route/route_net.cpp | 2 +- vpr/src/route/route_profiling.cpp | 4 +- vpr/src/route/route_tree.cpp | 24 ++-- vpr/src/route/route_utilization.cpp | 26 ++-- vpr/src/route/router_lookahead.cpp | 6 +- .../route/router_lookahead_compressed_map.cpp | 24 ++-- .../route/router_lookahead_extended_map.cpp | 15 +- vpr/src/route/router_lookahead_map.cpp | 36 ++--- vpr/src/route/router_lookahead_map_utils.cpp | 46 +++--- vpr/src/route/router_lookahead_sampling.cpp | 4 +- vpr/src/route/router_stats.h | 12 +- vpr/src/route/rr_graph.cpp | 66 ++++----- vpr/src/route/rr_graph2.cpp | 132 +++++++++--------- vpr/src/route/rr_graph_area.cpp | 32 ++--- vpr/src/route/rr_graph_timing_params.cpp | 14 +- vpr/src/route/segment_stats.cpp | 5 +- vpr/src/timing/VprTimingGraphResolver.cpp | 10 +- vpr/src/util/vpr_utils.cpp | 22 +-- vpr/test/test_vpr.cpp | 4 +- 62 files changed, 701 insertions(+), 720 deletions(-) diff --git a/libs/librrgraph/src/base/check_rr_graph.cpp b/libs/librrgraph/src/base/check_rr_graph.cpp index 39e859b61dc..f74995aeff9 100644 --- a/libs/librrgraph/src/base/check_rr_graph.cpp +++ b/libs/librrgraph/src/base/check_rr_graph.cpp @@ -154,22 +154,22 @@ void check_rr_graph(const RRGraphView& rr_graph, * - CHAN -> IPIN connections (unique rr_node for IPIN nodes on multiple sides) * - OPIN -> CHAN connections (unique rr_node for OPIN nodes on multiple sides) */ - bool is_chan_to_chan = (rr_type == CHANX || rr_type == CHANY) && (to_rr_type == CHANY || to_rr_type == CHANX); - bool is_chan_to_ipin = (rr_type == CHANX || rr_type == CHANY) && to_rr_type == IPIN; - bool is_opin_to_chan = rr_type == OPIN && (to_rr_type == CHANX || to_rr_type == CHANY); + bool is_chan_to_chan = (rr_type == t_rr_type::CHANX || rr_type == t_rr_type::CHANY) && (to_rr_type == t_rr_type::CHANY || to_rr_type == t_rr_type::CHANX); + bool is_chan_to_ipin = (rr_type == t_rr_type::CHANX || rr_type == t_rr_type::CHANY) && to_rr_type == t_rr_type::IPIN; + bool is_opin_to_chan = rr_type == t_rr_type::OPIN && (to_rr_type == t_rr_type::CHANX || to_rr_type == t_rr_type::CHANY); bool is_internal_edge = false; if (is_flat) { - is_internal_edge = (rr_type == IPIN && to_rr_type == IPIN) || (rr_type == OPIN && to_rr_type == OPIN); + is_internal_edge = (rr_type == t_rr_type::IPIN && to_rr_type == t_rr_type::IPIN) || (rr_type == t_rr_type::OPIN && to_rr_type == t_rr_type::OPIN); } if (!(is_chan_to_chan || is_chan_to_ipin || is_opin_to_chan || is_internal_edge)) { VPR_ERROR(VPR_ERROR_ROUTE, "in check_rr_graph: node %d (%s) connects to node %d (%s) %zu times - multi-connections only expected for CHAN<->CHAN, CHAN->IPIN, OPIN->CHAN.\n", - inode, rr_node_typename[rr_type], to_node, rr_node_typename[to_rr_type], num_edges_to_node); + inode, rr_node_typename[(size_t)rr_type], to_node, rr_node_typename[(size_t)to_rr_type], num_edges_to_node); } //Between two wire segments - VTR_ASSERT_MSG(to_rr_type == CHANX || to_rr_type == CHANY || to_rr_type == IPIN, "Expect channel type or input pin type"); - VTR_ASSERT_MSG(rr_type == CHANX || rr_type == CHANY || rr_type == OPIN, "Expect channel type or output pin type"); + VTR_ASSERT_MSG(to_rr_type == t_rr_type::CHANX || to_rr_type == t_rr_type::CHANY || to_rr_type == t_rr_type::IPIN, "Expect channel type or input pin type"); + VTR_ASSERT_MSG(rr_type == t_rr_type::CHANX || rr_type == t_rr_type::CHANY || rr_type == t_rr_type::OPIN, "Expect channel type or output pin type"); //While multiple connections between the same wires can be electrically legal, //they are redundant if they are of the same switch type. @@ -190,8 +190,8 @@ void check_rr_graph(const RRGraphView& rr_graph, /* Redundant edges are not allowed for chan <-> chan connections * but allowed for input pin <-> chan or output pin <-> chan connections */ - if ((to_rr_type == CHANX || to_rr_type == CHANY) - && (rr_type == CHANX || rr_type == CHANY)) { + if ((to_rr_type == t_rr_type::CHANX || to_rr_type == t_rr_type::CHANY) + && (rr_type == t_rr_type::CHANX || rr_type == t_rr_type::CHANY)) { auto switch_type = rr_graph.rr_switch_inf(RRSwitchId(kv.first)).type(); VPR_ERROR(VPR_ERROR_ROUTE, "in check_rr_graph: node %d has %d redundant connections to node %d of switch type %d (%s)", @@ -240,22 +240,22 @@ void check_rr_graph(const RRGraphView& rr_graph, t_physical_tile_type_ptr type = grid.get_physical_type({xlow, ylow, layer_num}); - if (rr_type == IPIN || rr_type == OPIN) { + if (rr_type == t_rr_type::IPIN || rr_type == t_rr_type::OPIN) { // #TODO: No edges are added for internal pins. However, they need to be checked somehow! if (ptc_num >= type->num_pins) { VTR_LOG_ERROR("in check_rr_graph: node %d (%s) type: %s is internal node.\n", - inode, rr_graph.node_type_string(rr_node), rr_node_typename[rr_type]); + inode, rr_graph.node_type_string(rr_node), rr_node_typename[(size_t)rr_type]); } } - if (rr_type != SOURCE) { + if (rr_type != t_rr_type::SOURCE) { if (total_edges_to_node[inode] < 1 && !rr_node_is_global_clb_ipin(rr_graph, grid, rr_node)) { /* A global CLB input pin will not have any edges, and neither will * * a SOURCE or the start of a carry-chain. Anything else is an error. * For simplicity, carry-chain input pin are entirely ignored in this test */ bool is_chain = false; - if (rr_type == IPIN) { + if (rr_type == t_rr_type::IPIN) { for (const t_fc_specification& fc_spec : types[type->index].fc_specs) { if (fc_spec.fc_value == 0 && fc_spec.seg_index == 0) { is_chain = true; @@ -269,11 +269,11 @@ void check_rr_graph(const RRGraphView& rr_graph, || (rr_graph.node_ylow(rr_node) == 1) || (rr_graph.node_xhigh(rr_node) == int(grid.width()) - 2) || (rr_graph.node_yhigh(rr_node) == int(grid.height()) - 2)); - bool is_wire = (rr_graph.node_type(rr_node) == CHANX - || rr_graph.node_type(rr_node) == CHANY); + bool is_wire = (rr_graph.node_type(rr_node) == t_rr_type::CHANX + || rr_graph.node_type(rr_node) == t_rr_type::CHANY); if (!is_chain && !is_fringe && !is_wire) { - if (rr_graph.node_type(rr_node) == IPIN || rr_graph.node_type(rr_node) == OPIN) { + if (rr_graph.node_type(rr_node) == t_rr_type::IPIN || rr_graph.node_type(rr_node) == t_rr_type::OPIN) { if (has_adjacent_channel(rr_graph, grid, node)) { auto block_type = grid.get_physical_type({rr_graph.node_xlow(rr_node), rr_graph.node_ylow(rr_node), @@ -320,7 +320,7 @@ static bool rr_node_is_global_clb_ipin(const RRGraphView& rr_graph, const Device rr_graph.node_ylow(inode), rr_graph.node_layer(inode)}); - if (rr_graph.node_type(inode) != IPIN) + if (rr_graph.node_type(inode) != t_rr_type::IPIN) return (false); ipin = rr_graph.node_pin_num(inode); @@ -389,7 +389,7 @@ void check_rr_node(const RRGraphView& rr_graph, type = grid.get_physical_type({xlow, ylow, layer_num}); switch (rr_type) { - case SOURCE: + case t_rr_type::SOURCE: if (type == nullptr) { VPR_FATAL_ERROR(VPR_ERROR_ROUTE, "in check_rr_node: node %d (type %d) is at an illegal clb location (%d, %d).\n", inode, rr_type, xlow, ylow); @@ -400,7 +400,7 @@ void check_rr_node(const RRGraphView& rr_graph, "in check_rr_node: node %d (type %d) has endpoints (%d,%d) and (%d,%d)\n", inode, rr_type, xlow, ylow, xhigh, yhigh); } break; - case SINK: { + case t_rr_type::SINK: { if (type == nullptr) { VPR_FATAL_ERROR(VPR_ERROR_ROUTE, "in check_rr_node: node %d (type %d) is at an illegal clb location (%d, %d).\n", inode, rr_type, xlow, ylow); @@ -413,8 +413,8 @@ void check_rr_node(const RRGraphView& rr_graph, } break; } - case IPIN: - case OPIN: + case t_rr_type::IPIN: + case t_rr_type::OPIN: if (type == nullptr) { VPR_FATAL_ERROR(VPR_ERROR_ROUTE, "in check_rr_node: node %d (type %d) is at an illegal clb location (%d, %d).\n", inode, rr_type, xlow, ylow); @@ -425,7 +425,7 @@ void check_rr_node(const RRGraphView& rr_graph, } break; - case CHANX: + case t_rr_type::CHANX: if (xlow < 1 || xhigh > int(grid.width()) - 2 || yhigh > int(grid.height()) - 2 || yhigh != ylow) { VPR_FATAL_ERROR(VPR_ERROR_ROUTE, "in check_rr_node: CHANX out of range for endpoints (%d,%d) and (%d,%d)\n", xlow, ylow, xhigh, yhigh); @@ -436,7 +436,7 @@ void check_rr_node(const RRGraphView& rr_graph, } break; - case CHANY: + case t_rr_type::CHANY: if (xhigh > int(grid.width()) - 2 || ylow < 1 || yhigh > int(grid.height()) - 2 || xlow != xhigh) { VPR_FATAL_ERROR(VPR_ERROR_ROUTE, "Error in check_rr_node: CHANY out of range for endpoints (%d,%d) and (%d,%d)\n", xlow, ylow, xhigh, yhigh); @@ -459,12 +459,12 @@ void check_rr_node(const RRGraphView& rr_graph, e_pin_type class_type = OPEN; int class_num_pins = -1; switch (rr_type) { - case SOURCE: - case SINK: + case t_rr_type::SOURCE: + case t_rr_type::SINK: class_type = get_class_type_from_class_physical_num(type, ptc_num); class_num_pins = get_class_num_pins_from_class_physical_num(type, ptc_num); if (ptc_num >= class_max_ptc - || class_type != ((rr_type == SOURCE) ? DRIVER : RECEIVER)) { + || class_type != ((rr_type == t_rr_type::SOURCE) ? DRIVER : RECEIVER)) { VPR_ERROR(VPR_ERROR_ROUTE, "in check_rr_node: inode %d (type %d) had a ptc_num of %d.\n", inode, rr_type, ptc_num); } @@ -474,11 +474,11 @@ void check_rr_node(const RRGraphView& rr_graph, } break; - case OPIN: - case IPIN: + case t_rr_type::OPIN: + case t_rr_type::IPIN: class_type = get_pin_type_from_pin_physical_num(type, ptc_num); if (ptc_num >= pin_max_ptc - || class_type != ((rr_type == OPIN) ? DRIVER : RECEIVER)) { + || class_type != ((rr_type == t_rr_type::OPIN) ? DRIVER : RECEIVER)) { VPR_ERROR(VPR_ERROR_ROUTE, "in check_rr_node: inode %d (type %d) had a ptc_num of %d.\n", inode, rr_type, ptc_num); } @@ -488,14 +488,14 @@ void check_rr_node(const RRGraphView& rr_graph, } break; - case CHANX: - case CHANY: + case t_rr_type::CHANX: + case t_rr_type::CHANY: if (route_type == DETAILED) { nodes_per_chan = chan_width.max; tracks_per_node = 1; } else { nodes_per_chan = 1; - tracks_per_node = ((rr_type == CHANX) ? chan_width.x_list[ylow] : chan_width.y_list[xlow]); + tracks_per_node = ((rr_type == t_rr_type::CHANX) ? chan_width.x_list[ylow] : chan_width.y_list[xlow]); } //if a chanx/chany has length 0, it means it is used to connect different dice together @@ -522,7 +522,7 @@ void check_rr_node(const RRGraphView& rr_graph, C = rr_graph.node_C(rr_node); R = rr_graph.node_R(rr_node); - if (rr_type == CHANX || rr_type == CHANY) { + if (rr_type == t_rr_type::CHANX || rr_type == t_rr_type::CHANY) { if (C < 0. || R < 0.) { VPR_ERROR(VPR_ERROR_ROUTE, "in check_rr_node: node %d of type %d has R = %g and C = %g.\n", inode, rr_type, R, C); @@ -545,7 +545,7 @@ static void check_unbuffered_edges(const RRGraphView& rr_graph, int from_node) { bool trans_matched; from_rr_type = rr_graph.node_type(RRNodeId(from_node)); - if (from_rr_type != CHANX && from_rr_type != CHANY) + if (from_rr_type != t_rr_type::CHANX && from_rr_type != t_rr_type::CHANY) return; from_num_edges = rr_graph.num_edges(RRNodeId(from_node)); @@ -554,7 +554,7 @@ static void check_unbuffered_edges(const RRGraphView& rr_graph, int from_node) { to_node = size_t(rr_graph.edge_sink_node(RRNodeId(from_node), from_edge)); to_rr_type = rr_graph.node_type(RRNodeId(to_node)); - if (to_rr_type != CHANX && to_rr_type != CHANY) + if (to_rr_type != t_rr_type::CHANX && to_rr_type != t_rr_type::CHANY) continue; from_switch_type = rr_graph.edge_switch(RRNodeId(from_node), from_edge); @@ -592,7 +592,7 @@ static bool has_adjacent_channel(const RRGraphView& rr_graph, const DeviceGrid& /* TODO: this function should be reworked later to adapt RRGraphView interface * once xlow(), ylow(), side() APIs are implemented */ - VTR_ASSERT(rr_graph.node_type(node.id()) == IPIN || rr_graph.node_type(node.id()) == OPIN); + VTR_ASSERT(rr_graph.node_type(node.id()) == t_rr_type::IPIN || rr_graph.node_type(node.id()) == e_rr_type::OPIN); if ((rr_graph.node_xlow(node.id()) == 0 && !rr_graph.is_node_on_specific_side(node.id(), RIGHT)) //left device edge connects only along block's right side || (rr_graph.node_ylow(node.id()) == int(grid.height() - 1) && !rr_graph.is_node_on_specific_side(node.id(), BOTTOM)) //top device edge connects only along block's bottom side diff --git a/libs/librrgraph/src/base/check_rr_graph_obj.cpp b/libs/librrgraph/src/base/check_rr_graph_obj.cpp index d78a6ea266e..300b2dd9515 100644 --- a/libs/librrgraph/src/base/check_rr_graph_obj.cpp +++ b/libs/librrgraph/src/base/check_rr_graph_obj.cpp @@ -94,7 +94,7 @@ static bool check_rr_graph_source_nodes(const RRGraph& rr_graph) { */ for (auto node : rr_graph.nodes()) { /* Pass nodes whose types are not SOURCE */ - if (SOURCE != rr_graph.node_type(node)) { + if (t_rr_type::SOURCE != rr_graph.node_type(node)) { continue; } if ((0 != rr_graph.node_fan_in(node)) @@ -123,7 +123,7 @@ static bool check_rr_graph_sink_nodes(const RRGraph& rr_graph) { */ for (auto node : rr_graph.nodes()) { /* Pass nodes whose types are not SINK */ - if (SINK != rr_graph.node_type(node)) { + if (t_rr_type::SINK != rr_graph.node_type(node)) { continue; } if ((0 == rr_graph.node_fan_in(node)) diff --git a/libs/librrgraph/src/base/rr_graph_builder.cpp b/libs/librrgraph/src/base/rr_graph_builder.cpp index 565c99e3f75..9233639a9ab 100644 --- a/libs/librrgraph/src/base/rr_graph_builder.cpp +++ b/libs/librrgraph/src/base/rr_graph_builder.cpp @@ -36,20 +36,20 @@ void RRGraphBuilder::add_node_to_all_locs(RRNodeId node) { node_ptc_num += node_twist * node_offset; node_offset++; switch (node_type) { - case SOURCE: - case SINK: - case CHANY: + case t_rr_type::SOURCE: + case t_rr_type::SINK: + case t_rr_type::CHANY: node_lookup_.add_node(node, node_layer, ix, iy, node_type, node_ptc_num, TOTAL_2D_SIDES[0]); break; - case CHANX: + case t_rr_type::CHANX: /* Currently need to swap x and y for CHANX because of chan, seg convention * TODO: Once the builders is reworked for use consistent (x, y) convention, * the following swapping can be removed */ node_lookup_.add_node(node, node_layer, iy, ix, node_type, node_ptc_num, TOTAL_2D_SIDES[0]); break; - case OPIN: - case IPIN: + case t_rr_type::OPIN: + case t_rr_type::IPIN: for (const e_side& side : TOTAL_2D_SIDES) { if (node_storage_.is_node_on_specific_side(node, side)) { node_lookup_.add_node(node,node_layer, ix, iy, node_type, node_ptc_num, side); diff --git a/libs/librrgraph/src/base/rr_graph_obj.cpp b/libs/librrgraph/src/base/rr_graph_obj.cpp index fae02caf26e..91c18e9cb4c 100644 --- a/libs/librrgraph/src/base/rr_graph_obj.cpp +++ b/libs/librrgraph/src/base/rr_graph_obj.cpp @@ -81,7 +81,7 @@ vtr::Rect RRGraph::node_bounding_box(const RRNodeId& node) const { ***********************************************************************/ vtr::Point RRGraph::node_start_coordinate(const RRNodeId& node) const { /* Make sure we have CHANX or CHANY */ - VTR_ASSERT((CHANX == node_type(node)) || (CHANY == node_type(node))); + VTR_ASSERT((e_rr_type::CHANX == node_type(node)) || (e_rr_type::CHANY == node_type(node))); vtr::Point start_coordinate(node_xlow(node), node_ylow(node)); @@ -105,7 +105,7 @@ vtr::Point RRGraph::node_start_coordinate(const RRNodeId& node) const { ***********************************************************************/ vtr::Point RRGraph::node_end_coordinate(const RRNodeId& node) const { /* Make sure we have CHANX or CHANY */ - VTR_ASSERT((CHANX == node_type(node)) || (CHANY == node_type(node))); + VTR_ASSERT((e_rr_type::CHANX == node_type(node)) || (e_rr_type::CHANY == node_type(node))); vtr::Point end_coordinate(node_xhigh(node), node_yhigh(node)); @@ -135,19 +135,19 @@ short RRGraph::node_ptc_num(const RRNodeId& node) const { } short RRGraph::node_pin_num(const RRNodeId& node) const { - VTR_ASSERT_MSG(node_type(node) == IPIN || node_type(node) == OPIN, + VTR_ASSERT_MSG(node_type(node) == e_rr_type::IPIN || node_type(node) == e_rr_type::OPIN, "Pin number valid only for IPIN/OPIN RR nodes"); return node_ptc_num(node); } short RRGraph::node_track_num(const RRNodeId& node) const { - VTR_ASSERT_MSG(node_type(node) == CHANX || node_type(node) == CHANY, + VTR_ASSERT_MSG(node_type(node) == e_rr_type::CHANX || node_type(node) == e_rr_type::CHANY, "Track number valid only for CHANX/CHANY RR nodes"); return node_ptc_num(node); } short RRGraph::node_class_num(const RRNodeId& node) const { - VTR_ASSERT_MSG(node_type(node) == SOURCE || node_type(node) == SINK, "Class number valid only for SOURCE/SINK RR nodes"); + VTR_ASSERT_MSG(node_type(node) == e_rr_type::SOURCE || node_type(node) == e_rr_type::SINK, "Class number valid only for SOURCE/SINK RR nodes"); return node_ptc_num(node); } @@ -158,13 +158,13 @@ RRIndexedDataId RRGraph::node_cost_index(const RRNodeId& node) const { Direction RRGraph::node_direction(const RRNodeId& node) const { VTR_ASSERT_SAFE(valid_node_id(node)); - VTR_ASSERT_MSG(node_type(node) == CHANX || node_type(node) == CHANY, "Direction valid only for CHANX/CHANY RR nodes"); + VTR_ASSERT_MSG(node_type(node) == e_rr_type::CHANX || node_type(node) == e_rr_type::CHANY, "Direction valid only for CHANX/CHANY RR nodes"); return node_directions_[node]; } e_side RRGraph::node_side(const RRNodeId& node) const { VTR_ASSERT_SAFE(valid_node_id(node)); - VTR_ASSERT_MSG(node_type(node) == IPIN || node_type(node) == OPIN, "Side valid only for IPIN/OPIN RR nodes"); + VTR_ASSERT_MSG(node_type(node) == e_rr_type::IPIN || node_type(node) == e_rr_type::OPIN, "Side valid only for IPIN/OPIN RR nodes"); return node_sides_[node]; } @@ -372,11 +372,11 @@ std::vector RRGraph::find_edges(const RRNodeId& src_node, const RRNode return matching_edges; } -RRNodeId RRGraph::find_node(const short& x, const short& y, const t_rr_type& type, const int& ptc, const e_side& side) const { +RRNodeId RRGraph::find_node(const short& x, const short& y, const t_rr_type type, const int& ptc, const e_side& side) const { initialize_fast_node_lookup(); - size_t itype = type; - size_t iside = side; + const size_t itype = (size_t)type; + const size_t iside = side; /* Check if x, y, type and ptc, side is valid */ if ((x < 0) /* See if x is smaller than the index of first element */ @@ -401,14 +401,14 @@ RRNodeId RRGraph::find_node(const short& x, const short& y, const t_rr_type& typ /* Check if x, y, type and ptc, side is valid */ if ((ptc < 0) /* See if ptc is smaller than the index of first element */ - || (size_t(ptc) > node_lookup_[x][y][type].size() - 1)) { /* See if ptc is large than the index of last element */ + || (size_t(ptc) > node_lookup_[x][y][itype].size() - 1)) { /* See if ptc is large than the index of last element */ /* Return a zero range! */ return RRNodeId::INVALID(); } /* Check if x, y, type and ptc, side is valid */ /* iside is always larger than -1, we can skip checking */ - if (iside > node_lookup_[x][y][type][ptc].size() - 1) { /* See if side is large than the index of last element */ + if (iside > node_lookup_[x][y][itype][ptc].size() - 1) { /* See if side is large than the index of last element */ /* Return a zero range! */ return RRNodeId::INVALID(); } @@ -419,7 +419,7 @@ RRNodeId RRGraph::find_node(const short& x, const short& y, const t_rr_type& typ /* Find the channel width (number of tracks) of a channel [x][y] */ short RRGraph::chan_num_tracks(const short& x, const short& y, const t_rr_type& type) const { /* Must be CHANX or CHANY */ - VTR_ASSERT_MSG(CHANX == type || CHANY == type, + VTR_ASSERT_MSG(e_rr_type::CHANX == type || e_rr_type::CHANY == type, "Required node_type to be CHANX or CHANY!"); initialize_fast_node_lookup(); @@ -432,18 +432,18 @@ short RRGraph::chan_num_tracks(const short& x, const short& y, const t_rr_type& /* Check if x, y, type and ptc is valid */ if ((y < 0) /* See if y is smaller than the index of first element */ - || (size_t(y) > node_lookup_[x].size() - 1)) { /* See if y is large than the index of last element */ + || (size_t(y) > node_lookup_[x].size() - 1)) { /* See if y is larger than the index of last element */ /* Return a zero range! */ return 0; } /* Check if x, y, type and ptc is valid */ - if ((size_t(type) > node_lookup_[x][y].size() - 1)) { /* See if type is large than the index of last element */ + if ((size_t(type) > node_lookup_[x][y].size() - 1)) { /* See if type is larger than the index of last element */ /* Return a zero range! */ return 0; } - const auto& matching_nodes = node_lookup_[x][y][type]; + const auto& matching_nodes = node_lookup_[x][y][(size_t)type]; return vtr::make_range(matching_nodes.begin(), matching_nodes.end()).size(); } @@ -451,7 +451,7 @@ short RRGraph::chan_num_tracks(const short& x, const short& y, const t_rr_type& /* This function aims to print basic information about a node */ void RRGraph::print_node(const RRNodeId& node) const { VTR_LOG("Node id: %d\n", node_index(node)); - VTR_LOG("Node type: %s\n", rr_node_typename[node_type(node)]); + VTR_LOG("Node type: %s\n", rr_node_typename[(size_t)node_type(node)]); VTR_LOG("Node xlow: %d\n", node_xlow(node)); VTR_LOG("Node ylow: %d\n", node_ylow(node)); VTR_LOG("Node xhigh: %d\n", node_xhigh(node)); @@ -465,8 +465,8 @@ void RRGraph::print_node(const RRNodeId& node) const { bool RRGraph::validate_node_segment(const RRNodeId& node) const { VTR_ASSERT_SAFE(valid_node_id(node)); /* Only CHANX and CHANY requires a valid segment id */ - if ((CHANX == node_type(node)) - || (CHANY == node_type(node))) { + if ((e_rr_type::CHANX == node_type(node)) + || (e_rr_type::CHANY == node_type(node))) { return valid_segment_id(node_segments_[node]); } else { return true; @@ -477,7 +477,7 @@ bool RRGraph::validate_node_segment(const RRNodeId& node) const { bool RRGraph::validate_node_segments() const { bool all_valid = true; for (auto node : nodes()) { - if (true == validate_node_segment(node)) { + if (validate_node_segment(node)) { continue; } /* Reach here it means we find an invalid segment id */ @@ -499,7 +499,7 @@ bool RRGraph::validate_edge_switch(const RREdgeId& edge) const { bool RRGraph::validate_edge_switches() const { bool all_valid = true; for (auto edge : edges()) { - if (true == validate_edge_switch(edge)) { + if (validate_edge_switch(edge)) { continue; } /* Reach here it means we find an invalid segment id */ @@ -971,21 +971,24 @@ void RRGraph::set_node_ptc_num(const RRNodeId& node, const short& ptc) { void RRGraph::set_node_pin_num(const RRNodeId& node, const short& pin_id) { VTR_ASSERT(valid_node_id(node)); - VTR_ASSERT_MSG(node_type(node) == IPIN || node_type(node) == OPIN, "Pin number valid only for IPIN/OPIN RR nodes"); + VTR_ASSERT_MSG(node_type(node) == e_rr_type::IPIN || node_type(node) == e_rr_type::OPIN, + "Pin number valid only for IPIN/OPIN RR nodes"); set_node_ptc_num(node, pin_id); } void RRGraph::set_node_track_num(const RRNodeId& node, const short& track_id) { VTR_ASSERT(valid_node_id(node)); - VTR_ASSERT_MSG(node_type(node) == CHANX || node_type(node) == CHANY, "Track number valid only for CHANX/CHANY RR nodes"); + VTR_ASSERT_MSG(node_type(node) == e_rr_type::CHANX || node_type(node) == e_rr_type::CHANY, + "Track number valid only for CHANX/CHANY RR nodes"); set_node_ptc_num(node, track_id); } void RRGraph::set_node_class_num(const RRNodeId& node, const short& class_id) { VTR_ASSERT(valid_node_id(node)); - VTR_ASSERT_MSG(node_type(node) == SOURCE || node_type(node) == SINK, "Class number valid only for SOURCE/SINK RR nodes"); + VTR_ASSERT_MSG(node_type(node) == e_rr_type::SOURCE || node_type(node) == e_rr_type::SINK, + "Class number valid only for SOURCE/SINK RR nodes"); set_node_ptc_num(node, class_id); } @@ -997,14 +1000,14 @@ void RRGraph::set_node_cost_index(const RRNodeId& node, const RRIndexedDataId& c void RRGraph::set_node_direction(const RRNodeId& node, const Direction& direction) { VTR_ASSERT(valid_node_id(node)); - VTR_ASSERT_MSG(node_type(node) == CHANX || node_type(node) == CHANY, "Direct can only be specified on CHANX/CNAY rr nodes"); + VTR_ASSERT_MSG(node_type(node) == e_rr_type::CHANX || node_type(node) == e_rr_type::CHANY, "Direct can only be specified on CHANX/CNAY rr nodes"); node_directions_[node] = direction; } void RRGraph::set_node_side(const RRNodeId& node, const e_side& side) { VTR_ASSERT(valid_node_id(node)); - VTR_ASSERT_MSG(node_type(node) == IPIN || node_type(node) == OPIN, "Side can only be specified on IPIN/OPIN rr nodes"); + VTR_ASSERT_MSG(node_type(node) == e_rr_type::IPIN || node_type(node) == e_rr_type::OPIN, "Side can only be specified on IPIN/OPIN rr nodes"); node_sides_[node] = side; } @@ -1028,8 +1031,8 @@ void RRGraph::set_node_segment(const RRNodeId& node, const RRSegmentId& segment_ VTR_ASSERT(valid_node_id(node)); /* Only CHANX and CHANY requires a valid segment id */ - if ((CHANX == node_type(node)) - || (CHANY == node_type(node))) { + if ((e_rr_type::CHANX == node_type(node)) + || (e_rr_type::CHANY == node_type(node))) { VTR_ASSERT(valid_segment_id(segment_id)); } @@ -1119,7 +1122,7 @@ void RRGraph::build_fast_node_lookup() const { node_lookup_[x].resize(y + 1); } - size_t itype = node_type(node); + size_t itype = (size_t)node_type(node); if (itype >= node_lookup_[x][y].size()) { node_lookup_[x][y].resize(itype + 1); } @@ -1130,7 +1133,7 @@ void RRGraph::build_fast_node_lookup() const { } size_t iside = -1; - if (node_type(node) == OPIN || node_type(node) == IPIN) { + if (node_type(node) == e_rr_type::OPIN || node_type(node) == e_rr_type::IPIN) { iside = node_side(node); } else { iside = NUM_2D_SIDES; diff --git a/libs/librrgraph/src/base/rr_graph_obj.h b/libs/librrgraph/src/base/rr_graph_obj.h index 5ad31ba7f01..bd4e781046e 100644 --- a/libs/librrgraph/src/base/rr_graph_obj.h +++ b/libs/librrgraph/src/base/rr_graph_obj.h @@ -510,7 +510,7 @@ class RRGraph { /* Find the edges connecting two nodes */ std::vector find_edges(const RRNodeId& src_node, const RRNodeId& sink_node) const; /* Find a node with given features from internal fast look-up */ - RRNodeId find_node(const short& x, const short& y, const t_rr_type& type, const int& ptc, const e_side& side = NUM_2D_SIDES) const; + RRNodeId find_node(const short& x, const short& y, const t_rr_type type, const int& ptc, const e_side& side = NUM_2D_SIDES) const; /* Find the number of routing tracks in a routing channel with a given coordinate */ short chan_num_tracks(const short& x, const short& y, const t_rr_type& type) const; diff --git a/libs/librrgraph/src/base/rr_graph_storage.cpp b/libs/librrgraph/src/base/rr_graph_storage.cpp index cb7ad810dd8..89afcaeeba4 100644 --- a/libs/librrgraph/src/base/rr_graph_storage.cpp +++ b/libs/librrgraph/src/base/rr_graph_storage.cpp @@ -608,10 +608,10 @@ bool t_rr_graph_storage::validate(const vtr::vector } const char* t_rr_graph_storage::node_type_string(RRNodeId id) const { - return rr_node_typename[node_type(id)]; + return rr_node_typename[(size_t)node_type(id)]; } const char* t_rr_graph_view::node_type_string(RRNodeId id) const { - return rr_node_typename[node_type(id)]; + return rr_node_typename[(size_t)node_type(id)]; } const std::string& t_rr_graph_storage::node_direction_string(RRNodeId id) const { @@ -645,21 +645,21 @@ void t_rr_graph_storage::set_node_ptc_num(RRNodeId id, int new_ptc_num) { node_ptc_[id].ptc_.pin_num = new_ptc_num; //TODO: eventually remove } void t_rr_graph_storage::set_node_pin_num(RRNodeId id, int new_pin_num) { - if (node_type(id) != IPIN && node_type(id) != OPIN) { + if (node_type(id) != e_rr_type::IPIN && node_type(id) != e_rr_type::OPIN) { VTR_LOG_ERROR("Attempted to set RR node 'pin_num' for non-IPIN/OPIN type '%s'", node_type_string(id)); } node_ptc_[id].ptc_.pin_num = new_pin_num; } void t_rr_graph_storage::set_node_track_num(RRNodeId id, int new_track_num) { - if (node_type(id) != CHANX && node_type(id) != CHANY) { + if (node_type(id) != e_rr_type::CHANX && node_type(id) != e_rr_type::CHANY) { VTR_LOG_ERROR("Attempted to set RR node 'track_num' for non-CHANX/CHANY type '%s'", node_type_string(id)); } node_ptc_[id].ptc_.track_num = new_track_num; } void t_rr_graph_storage::set_node_class_num(RRNodeId id, int new_class_num) { - if (node_type(id) != SOURCE && node_type(id) != SINK) { + if (node_type(id) != e_rr_type::SOURCE && node_type(id) != e_rr_type::SINK) { VTR_LOG_ERROR("Attempted to set RR node 'class_num' for non-SOURCE/SINK type '%s'", node_type_string(id)); } node_ptc_[id].ptc_.class_num = new_class_num; @@ -673,9 +673,9 @@ static int get_node_pin_num( vtr::array_view_id node_storage, vtr::array_view_id node_ptc, RRNodeId id) { - auto node_type = node_storage[id].type_; - if (node_type != IPIN && node_type != OPIN) { - VTR_LOG_ERROR("Attempted to access RR node 'pin_num' for non-IPIN/OPIN type '%s'", rr_node_typename[node_type]); + t_rr_type node_type = node_storage[id].type_; + if (node_type != e_rr_type::IPIN && node_type != e_rr_type::OPIN) { + VTR_LOG_ERROR("Attempted to access RR node 'pin_num' for non-IPIN/OPIN type '%s'", rr_node_typename[(size_t)node_type]); } return node_ptc[id].ptc_.pin_num; } @@ -684,9 +684,9 @@ static int get_node_track_num( vtr::array_view_id node_storage, vtr::array_view_id node_ptc, RRNodeId id) { - auto node_type = node_storage[id].type_; - if (node_type != CHANX && node_type != CHANY) { - VTR_LOG_ERROR("Attempted to access RR node 'track_num' for non-CHANX/CHANY type '%s'", rr_node_typename[node_type]); + t_rr_type node_type = node_storage[id].type_; + if (node_type != e_rr_type::CHANX && node_type != e_rr_type::CHANY) { + VTR_LOG_ERROR("Attempted to access RR node 'track_num' for non-CHANX/CHANY type '%s'", rr_node_typename[(size_t)node_type]); } return node_ptc[id].ptc_.track_num; } @@ -695,9 +695,9 @@ static int get_node_class_num( vtr::array_view_id node_storage, vtr::array_view_id node_ptc, RRNodeId id) { - auto node_type = node_storage[id].type_; - if (node_type != SOURCE && node_type != SINK) { - VTR_LOG_ERROR("Attempted to access RR node 'class_num' for non-SOURCE/SINK type '%s'", rr_node_typename[node_type]); + t_rr_type node_type = node_storage[id].type_; + if (node_type != e_rr_type::SOURCE && node_type != e_rr_type::SINK) { + VTR_LOG_ERROR("Attempted to access RR node 'class_num' for non-SOURCE/SINK type '%s'", rr_node_typename[(size_t)node_type]); } return node_ptc[id].ptc_.class_num; } @@ -725,7 +725,7 @@ void t_rr_graph_storage::set_node_type(RRNodeId id, t_rr_type new_type) { node_storage_[id].type_ = new_type; } -void t_rr_graph_storage::set_node_name(RRNodeId id, std::string new_name) { +void t_rr_graph_storage::set_node_name(RRNodeId id, const std::string& new_name) { node_name_.insert(std::make_pair(id, new_name)); } void t_rr_graph_storage::set_node_coordinates(RRNodeId id, short x1, short y1, short x2, short y2) { @@ -766,14 +766,14 @@ void t_rr_graph_storage::set_node_capacity(RRNodeId id, short new_capacity) { } void t_rr_graph_storage::set_node_direction(RRNodeId id, Direction new_direction) { - if (node_type(id) != CHANX && node_type(id) != CHANY) { + if (node_type(id) != e_rr_type::CHANX && node_type(id) != e_rr_type::CHANY) { VTR_LOG_ERROR("Attempted to set RR node 'direction' for non-channel type '%s'", node_type_string(id)); } node_storage_[id].dir_side_.direction = new_direction; } void t_rr_graph_storage::add_node_side(RRNodeId id, e_side new_side) { - if (node_type(id) != IPIN && node_type(id) != OPIN) { + if (node_type(id) != e_rr_type::IPIN && node_type(id) != e_rr_type::OPIN) { VTR_LOG_ERROR("Attempted to set RR node 'side' for non-channel type '%s'", node_type_string(id)); } std::bitset side_bits = node_storage_[id].dir_side_.sides; diff --git a/libs/librrgraph/src/base/rr_graph_storage.h b/libs/librrgraph/src/base/rr_graph_storage.h index ac6bece7526..3bb930f55b2 100644 --- a/libs/librrgraph/src/base/rr_graph_storage.h +++ b/libs/librrgraph/src/base/rr_graph_storage.h @@ -25,10 +25,10 @@ * parallel rr_node_* structures. * * * * This structure should **only** contain data used in the inner loop of the * - * router. This data is consider "hot" and the router performance is * + * router. This data is considered "hot" and the router performance is * * sensitive to layout and size of this "hot" data. * - * Cold data should be stored seperately in t_rr_graph_storage. * + * Cold data should be stored separately in t_rr_graph_storage. * * * * xlow, xhigh, ylow, yhigh: Integer coordinates (see route.c for * * coordinate system) of the ends of this routing resource. * @@ -63,7 +63,7 @@ struct alignas(16) t_rr_node_data { int16_t xhigh_ = -1; int16_t yhigh_ = -1; - t_rr_type type_ = NUM_RR_TYPES; + t_rr_type type_ = t_rr_type::NUM_RR_TYPES; /* The character is a hex number which is a 4-bit truth table for node sides * The 4-bits in serial represent 4 sides on which a node could appear @@ -620,7 +620,7 @@ class t_rr_graph_storage { void set_node_class_num(RRNodeId id, int); //Same as set_ptc_num() by checks type() is consistent void set_node_type(RRNodeId id, t_rr_type new_type); - void set_node_name(RRNodeId id, std::string new_name); + void set_node_name(RRNodeId id, const std::string& new_name); void set_node_coordinates(RRNodeId id, short x1, short y1, short x2, short y2); void set_node_layer(RRNodeId id, short layer); void set_node_ptc_twist_incr(RRNodeId id, short twist); @@ -781,9 +781,9 @@ class t_rr_graph_storage { const RRNodeId& id, const e_side& side) { auto& node_data = node_storage[id]; - if (node_data.type_ != IPIN && node_data.type_ != OPIN) { + if (node_data.type_ != e_rr_type::IPIN && node_data.type_ != e_rr_type::OPIN) { VTR_LOG_ERROR("Attempted to access RR node 'side' for non-IPIN/OPIN type '%s'", - rr_node_typename[node_data.type_]); + rr_node_typename[(size_t)node_data.type_]); } // Return a vector showing only the sides that the node appears std::bitset side_tt = node_storage[id].dir_side_.sides; diff --git a/libs/librrgraph/src/base/rr_graph_utils.cpp b/libs/librrgraph/src/base/rr_graph_utils.cpp index 1769d1cae5f..215ef5cc9d8 100644 --- a/libs/librrgraph/src/base/rr_graph_utils.cpp +++ b/libs/librrgraph/src/base/rr_graph_utils.cpp @@ -76,7 +76,7 @@ std::vector find_rr_graph_switches(const RRGraph& rr_graph, } int seg_index_of_cblock(const RRGraphView& rr_graph, t_rr_type from_rr_type, int to_node) { - if (from_rr_type == CHANX) + if (from_rr_type == t_rr_type::CHANX) return (rr_graph.node_xlow(RRNodeId(to_node))); else /* CHANY */ @@ -89,10 +89,10 @@ int seg_index_of_sblock(const RRGraphView& rr_graph, int from_node, int to_node) from_rr_type = rr_graph.node_type(RRNodeId(from_node)); to_rr_type = rr_graph.node_type(RRNodeId(to_node)); - if (from_rr_type == CHANX) { - if (to_rr_type == CHANY) { + if (from_rr_type == t_rr_type::CHANX) { + if (to_rr_type == t_rr_type::CHANY) { return (rr_graph.node_xlow(RRNodeId(to_node))); - } else if (to_rr_type == CHANX) { + } else if (to_rr_type == t_rr_type::CHANX) { if (rr_graph.node_xlow(RRNodeId(to_node)) > rr_graph.node_xlow(RRNodeId(from_node))) { /* Going right */ return (rr_graph.node_xhigh(RRNodeId(from_node))); } else { /* Going left */ @@ -106,10 +106,10 @@ int seg_index_of_sblock(const RRGraphView& rr_graph, int from_node, int to_node) } } /* End from_rr_type is CHANX */ - else if (from_rr_type == CHANY) { - if (to_rr_type == CHANX) { + else if (from_rr_type == t_rr_type::CHANY) { + if (to_rr_type == t_rr_type::CHANX) { return (rr_graph.node_ylow(RRNodeId(to_node))); - } else if (to_rr_type == CHANY) { + } else if (to_rr_type == t_rr_type::CHANY) { if (rr_graph.node_ylow(RRNodeId(to_node)) > rr_graph.node_ylow(RRNodeId(from_node))) { /* Going up */ return (rr_graph.node_yhigh(RRNodeId(from_node))); } else { /* Going down */ @@ -218,17 +218,17 @@ void rr_set_sink_locs(const RRGraphView& rr_graph, RRGraphBuilder& rr_graph_buil } // Remove old locations from lookup - VTR_ASSERT(rr_graph_builder.node_lookup().find_node(node_layer, new_loc.x(), new_loc.y(), SINK, node_ptc) != RRNodeId::INVALID()); + VTR_ASSERT(rr_graph_builder.node_lookup().find_node(node_layer, new_loc.x(), new_loc.y(), t_rr_type::SINK, node_ptc) != RRNodeId::INVALID()); for (int x = tile_bb.xmin(); x <= tile_bb.xmax(); ++x) { for (int y = tile_bb.ymin(); y <= tile_bb.ymax(); ++y) { if (x == new_loc.x() && y == new_loc.y()) /* The new sink location */ continue; - if (rr_graph_builder.node_lookup().find_node(node_layer, x, y, SINK, node_ptc) == RRNodeId::INVALID()) /* Already removed */ + if (rr_graph_builder.node_lookup().find_node(node_layer, x, y, t_rr_type::SINK, node_ptc) == RRNodeId::INVALID()) /* Already removed */ continue; - bool removed_successfully = rr_graph_builder.node_lookup().remove_node(node_id, node_layer, x, y, SINK, node_ptc); + bool removed_successfully = rr_graph_builder.node_lookup().remove_node(node_id, node_layer, x, y, t_rr_type::SINK, node_ptc); VTR_ASSERT(removed_successfully); } } diff --git a/libs/librrgraph/src/base/rr_graph_view.h b/libs/librrgraph/src/base/rr_graph_view.h index c3a2ff6273f..83668e05d08 100644 --- a/libs/librrgraph/src/base/rr_graph_view.h +++ b/libs/librrgraph/src/base/rr_graph_view.h @@ -244,7 +244,7 @@ class RRGraphView { * @note node_length() only applies to CHANX or CHANY and is always a positive number */ inline int node_length(RRNodeId node) const { - VTR_ASSERT(node_type(node) == CHANX || node_type(node) == CHANY); + VTR_ASSERT(node_type(node) == e_rr_type::CHANX || node_type(node) == e_rr_type::CHANY); if (node_direction(node) == Direction::NONE) { return 0; //length zero wire } @@ -256,7 +256,7 @@ class RRGraphView { /** @brief Check if a routing resource node is initialized. */ inline bool node_is_initialized(RRNodeId node) const { - return !((node_type(node) == NUM_RR_TYPES) + return !((node_type(node) == t_rr_type::NUM_RR_TYPES) && (node_xlow(node) == -1) && (node_ylow(node) == -1) && (node_xhigh(node) == -1) && (node_yhigh(node) == -1)); } @@ -265,7 +265,7 @@ class RRGraphView { * @note This function performs error checking by determining whether two nodes are physically adjacent based on their geometry. It does not verify the routing edges to confirm if a connection is feasible within the current routing graph. */ inline bool nodes_are_adjacent(RRNodeId chanx_node, RRNodeId chany_node) const { - VTR_ASSERT(node_type(chanx_node) == CHANX && node_type(chany_node) == CHANY); + VTR_ASSERT(node_type(chanx_node) == e_rr_type::CHANX && node_type(chany_node) == e_rr_type::CHANY); if (node_ylow(chany_node) > node_ylow(chanx_node) + 1 || // verifies that chany_node is not more than one unit above chanx_node node_yhigh(chany_node) < node_ylow(chanx_node)) // verifies that chany_node is not more than one unit beneath chanx_node return false; @@ -319,7 +319,7 @@ class RRGraphView { coordinate_string += ":" + std::to_string(size_t(node)) + " "; //add the index of the routing resource node int node_layer_num = node_layer(node); - if (node_type(node) == OPIN || node_type(node) == IPIN) { + if (node_type(node) == e_rr_type::OPIN || node_type(node) == e_rr_type::IPIN) { coordinate_string += "side: ("; //add the side of the routing resource node for (const e_side& node_side : TOTAL_2D_SIDES) { if (!is_node_on_specific_side(node, node_side)) { @@ -333,12 +333,12 @@ class RRGraphView { start_x = " (" + std::to_string(node_xhigh(node)) + ","; //start and end coordinates are the same for OPINs and IPINs start_y = std::to_string(node_yhigh(node)) + ","; start_layer_str = std::to_string(node_layer_num) + ")"; - } else if (node_type(node) == SOURCE || node_type(node) == SINK) { + } else if (node_type(node) == e_rr_type::SOURCE || node_type(node) == e_rr_type::SINK) { // For SOURCE and SINK the starting and ending coordinate are identical, so just use start start_x = " (" + std::to_string(node_xhigh(node)) + ","; start_y = std::to_string(node_yhigh(node)) + ","; start_layer_str = std::to_string(node_layer_num) + ")"; - } else if (node_type(node) == CHANX || node_type(node) == CHANY) { //for channels, we would like to describe the component with segment specific information + } else if (node_type(node) == e_rr_type::CHANX || node_type(node) == e_rr_type::CHANY) { //for channels, we would like to describe the component with segment specific information RRIndexedDataId cost_index = node_cost_index(node); int seg_index = rr_indexed_data_[cost_index].seg_index; coordinate_string += rr_segments(RRSegmentId(seg_index)).name; //Write the segment name diff --git a/libs/librrgraph/src/base/rr_node_types.h b/libs/librrgraph/src/base/rr_node_types.h index f8a9af655bb..3895861e3d0 100644 --- a/libs/librrgraph/src/base/rr_node_types.h +++ b/libs/librrgraph/src/base/rr_node_types.h @@ -1,5 +1,4 @@ -#ifndef RR_NODE_TYPES_H -#define RR_NODE_TYPES_H +#pragma once #include #include @@ -21,7 +20,7 @@ * - SOURCE * - SINK */ -typedef enum e_rr_type : unsigned char { +typedef enum class e_rr_type : unsigned char { SOURCE = 0, /// RR_TYPES = {{SOURCE, SINK, IPIN, OPIN, CHANX, CHANY}}; -constexpr std::array rr_node_typename{{"SOURCE", "SINK", "IPIN", "OPIN", "CHANX", "CHANY"}}; +constexpr std::array RR_TYPES = {{e_rr_type::SOURCE, e_rr_type::SINK, e_rr_type::IPIN, + e_rr_type::OPIN, e_rr_type::CHANX, e_rr_type::CHANY}}; +constexpr std::array rr_node_typename{{"SOURCE", "SINK", "IPIN", "OPIN", "CHANX", "CHANY"}}; /* * Direction::INC: wire driver is positioned at the low-coordinate end of the wire. @@ -124,6 +124,4 @@ struct t_rr_rc_data { // This is the data type of fast lookups of an rr-node given an (rr_type, layer, x, y, and the side) //[0..num_rr_types-1][0..num_layer-1][0..grid_width-1][0..grid_height-1][0..NUM_2D_SIDES-1][0..max_ptc-1] -typedef std::array, 4>, NUM_RR_TYPES> t_rr_node_indices; - -#endif +typedef std::array, 4>, (size_t)t_rr_type::NUM_RR_TYPES> t_rr_node_indices; diff --git a/libs/librrgraph/src/base/rr_spatial_lookup.cpp b/libs/librrgraph/src/base/rr_spatial_lookup.cpp index 6cc8102f502..00db875b932 100644 --- a/libs/librrgraph/src/base/rr_spatial_lookup.cpp +++ b/libs/librrgraph/src/base/rr_spatial_lookup.cpp @@ -21,10 +21,10 @@ RRNodeId RRSpatialLookup::find_node(int layer, * Please note that in the add_node function, we should keep the SAME convention! */ e_side node_side = side; - if (type == IPIN || type == OPIN) { + if (type == e_rr_type::IPIN || type == e_rr_type::OPIN) { VTR_ASSERT_MSG(side != NUM_2D_SIDES, "IPIN/OPIN must specify desired side (can not be default NUM_2D_SIDES)"); } else { - VTR_ASSERT_SAFE(type != IPIN && type != OPIN); + VTR_ASSERT_SAFE(type != e_rr_type::IPIN && type != e_rr_type::OPIN); node_side = TOTAL_2D_SIDES[0]; } @@ -41,11 +41,11 @@ RRNodeId RRSpatialLookup::find_node(int layer, */ size_t node_x = x; size_t node_y = y; - if (type == CHANX) { + if (type == e_rr_type::CHANX) { std::swap(node_x, node_y); } - VTR_ASSERT_SAFE(4 == rr_node_indices_[type].ndims()); + VTR_ASSERT_SAFE(4 == rr_node_indices_[(size_t)type].ndims()); /* Sanity check to ensure the layer, x, y, side and ptc are in range * - Return an valid id by searching in look-up when all the parameters are in range @@ -55,27 +55,27 @@ RRNodeId RRSpatialLookup::find_node(int layer, return RRNodeId::INVALID(); } - if (size_t(layer) >= rr_node_indices_[type].dim_size(0)) { + if (size_t(layer) >= rr_node_indices_[(size_t)type].dim_size(0)) { return RRNodeId::INVALID(); } - if (node_x >= rr_node_indices_[type].dim_size(1)) { + if (node_x >= rr_node_indices_[(size_t)type].dim_size(1)) { return RRNodeId::INVALID(); } - if(node_y >= rr_node_indices_[type].dim_size(2)){ + if(node_y >= rr_node_indices_[(size_t)type].dim_size(2)){ return RRNodeId::INVALID(); } - if (node_side >= rr_node_indices_[type].dim_size(3)) { + if (node_side >= rr_node_indices_[(size_t)type].dim_size(3)) { return RRNodeId::INVALID(); } - if (size_t(ptc) >= rr_node_indices_[type][layer][node_x][node_y][node_side].size()) { + if (size_t(ptc) >= rr_node_indices_[(size_t)type][layer][node_x][node_y][node_side].size()) { return RRNodeId::INVALID(); } - return rr_node_indices_[type][layer][node_x][node_y][node_side][ptc]; + return rr_node_indices_[(size_t)type][layer][node_x][node_y][node_side][ptc]; } std::vector RRSpatialLookup::find_nodes_in_range(int layer, @@ -122,11 +122,11 @@ std::vector RRSpatialLookup::find_nodes(int layer, */ size_t node_x = x; size_t node_y = y; - if (type == CHANX) { + if (type == e_rr_type::CHANX) { std::swap(node_x, node_y); } - VTR_ASSERT_SAFE(4 == rr_node_indices_[type].ndims()); + VTR_ASSERT_SAFE(4 == rr_node_indices_[(size_t)type].ndims()); /* Sanity check to ensure the x, y, side are in range * - Return a list of valid ids by searching in look-up when all the parameters are in range @@ -136,32 +136,32 @@ std::vector RRSpatialLookup::find_nodes(int layer, return nodes; } - if (size_t(layer) >= rr_node_indices_[type].dim_size(0)) { + if (size_t(layer) >= rr_node_indices_[(size_t)type].dim_size(0)) { return nodes; } - if (node_x >= rr_node_indices_[type].dim_size(1)) { + if (node_x >= rr_node_indices_[(size_t)type].dim_size(1)) { return nodes; } - if(node_y >= rr_node_indices_[type].dim_size(2)){ + if(node_y >= rr_node_indices_[(size_t)type].dim_size(2)){ return nodes; } - if (side >= rr_node_indices_[type].dim_size(3)) { + if (side >= rr_node_indices_[(size_t)type].dim_size(3)) { return nodes; } /* Reserve space to avoid memory fragmentation */ size_t num_nodes = 0; - for (const auto& node : rr_node_indices_[type][layer][node_x][node_y][side]) { + for (const auto& node : rr_node_indices_[(size_t)type][layer][node_x][node_y][side]) { if (node.is_valid()) { num_nodes++; } } nodes.reserve(num_nodes); - for (const auto& node : rr_node_indices_[type][layer][node_x][node_y][side]) { + for (const auto& node : rr_node_indices_[(size_t)type][layer][node_x][node_y][side]) { if (node.is_valid()) { nodes.emplace_back(node); } @@ -175,7 +175,7 @@ std::vector RRSpatialLookup::find_channel_nodes(int layer, int y, t_rr_type type) const { /* Pre-check: node type should be routing tracks! */ - if (type != CHANX && type != CHANY) { + if (type != e_rr_type::CHANX && type != e_rr_type::CHANY) { return std::vector(); } @@ -190,7 +190,7 @@ std::vector RRSpatialLookup::find_nodes_at_all_sides(int layer, std::vector indices; /* TODO: Consider to access the raw data like find_node() rather than calling find_node() many times, which hurts runtime */ - if (rr_type == IPIN || rr_type == OPIN) { + if (rr_type == e_rr_type::IPIN || rr_type == e_rr_type::OPIN) { indices.reserve(NUM_2D_SIDES); //For pins, we need to look at all the sides of the current grid tile for (e_side side : TOTAL_2D_SIDES) { @@ -215,8 +215,8 @@ std::vector RRSpatialLookup::find_grid_nodes_at_all_sides(int layer, int x, int y, t_rr_type rr_type) const { - VTR_ASSERT(rr_type == SOURCE || rr_type == OPIN || rr_type == IPIN || rr_type == SINK); - if (rr_type == SOURCE || rr_type == SINK) { + VTR_ASSERT(rr_type == e_rr_type::SOURCE || rr_type == e_rr_type::OPIN || rr_type == e_rr_type::IPIN || rr_type == e_rr_type::SINK); + if (rr_type == e_rr_type::SOURCE || rr_type == e_rr_type::SINK) { return find_nodes(layer,x, y, rr_type); } @@ -241,16 +241,16 @@ void RRSpatialLookup::reserve_nodes(int layer, t_rr_type type, int num_nodes, e_side side) { - VTR_ASSERT_SAFE(4 == rr_node_indices_[type].ndims()); + VTR_ASSERT_SAFE(4 == rr_node_indices_[(size_t)type].ndims()); /* For non-IPIN/OPIN nodes, the side should always be the TOP side which follows the convention in find_node() API! */ - if (type != IPIN && type != OPIN) { + if (type != e_rr_type::IPIN && type != e_rr_type::OPIN) { VTR_ASSERT(side == TOTAL_2D_SIDES[0]); } resize_nodes(layer, x, y, type, side); - rr_node_indices_[type][layer][x][y][side].reserve(num_nodes); + rr_node_indices_[(size_t)type][layer][x][y][side].reserve(num_nodes); } void RRSpatialLookup::add_node(RRNodeId node, @@ -261,22 +261,22 @@ void RRSpatialLookup::add_node(RRNodeId node, int ptc, e_side side) { VTR_ASSERT(node.is_valid()); /* Must have a valid node id to be added */ - VTR_ASSERT_SAFE(4 == rr_node_indices_[type].ndims()); + VTR_ASSERT_SAFE(4 == rr_node_indices_[(size_t)type].ndims()); /* For non-IPIN/OPIN nodes, the side should always be the TOP side which follows the convention in find_node() API! */ - if (type != IPIN && type != OPIN) { + if (type != e_rr_type::IPIN && type != e_rr_type::OPIN) { VTR_ASSERT(side == TOTAL_2D_SIDES[0]); } resize_nodes(layer, x, y, type, side); - if (size_t(ptc) >= rr_node_indices_[type][layer][x][y][side].size()) { + if (size_t(ptc) >= rr_node_indices_[(size_t)type][layer][x][y][side].size()) { /* Deposit invalid ids to newly allocated elements while original elements are untouched */ - rr_node_indices_[type][layer][x][y][side].resize(ptc + 1, RRNodeId::INVALID()); + rr_node_indices_[(size_t)type][layer][x][y][side].resize(ptc + 1, RRNodeId::INVALID()); } /* Resize on demand finished; Register the node */ - rr_node_indices_[type][layer][x][y][side][ptc] = node; + rr_node_indices_[(size_t)type][layer][x][y][side][ptc] = node; } bool RRSpatialLookup::remove_node(RRNodeId node, @@ -287,26 +287,26 @@ bool RRSpatialLookup::remove_node(RRNodeId node, int ptc, e_side side) { VTR_ASSERT(node.is_valid()); - VTR_ASSERT_SAFE(4 == rr_node_indices_[type].ndims()); + VTR_ASSERT_SAFE(4 == rr_node_indices_[(size_t)type].ndims()); VTR_ASSERT_SAFE(layer >= 0); VTR_ASSERT_SAFE(x >= 0); VTR_ASSERT_SAFE(y >= 0); - VTR_ASSERT_SAFE(type != NUM_RR_TYPES); + VTR_ASSERT_SAFE(type != t_rr_type::NUM_RR_TYPES); VTR_ASSERT_SAFE(ptc >= 0); VTR_ASSERT_SAFE(side != NUM_2D_SIDES); // Check if the node given is in the spatial lookup at the given indices - if (type >= rr_node_indices_.size()) return false; - if ((size_t)layer >= rr_node_indices_[type].dim_size(0)) return false; - if ((size_t)x >= rr_node_indices_[type].dim_size(1)) return false; - if ((size_t)y >= rr_node_indices_[type].dim_size(2)) return false; - if (side >= rr_node_indices_[type].dim_size(3)) return false; - if ((size_t)ptc >= rr_node_indices_[type][layer][x][y][side].size()) return false; - if (rr_node_indices_[type][layer][x][y][side][ptc] != node) return false; + if ((size_t)type >= rr_node_indices_.size()) return false; + if ((size_t)layer >= rr_node_indices_[(size_t)type].dim_size(0)) return false; + if ((size_t)x >= rr_node_indices_[(size_t)type].dim_size(1)) return false; + if ((size_t)y >= rr_node_indices_[(size_t)type].dim_size(2)) return false; + if (side >= rr_node_indices_[(size_t)type].dim_size(3)) return false; + if ((size_t)ptc >= rr_node_indices_[(size_t)type][layer][x][y][side].size()) return false; + if (rr_node_indices_[(size_t)type][layer][x][y][side][ptc] != node) return false; // The node was in the spatial lookup; remove it. -1 corresponds to an invalid node id, // and so is treated as absent in the spatial lookup - rr_node_indices_[type][layer][x][y][side][ptc] = RRNodeId::INVALID(); + rr_node_indices_[(size_t)type][layer][x][y][side][ptc] = RRNodeId::INVALID(); return true; } @@ -315,9 +315,9 @@ void RRSpatialLookup::mirror_nodes(const int layer, const vtr::Point& des_coord, t_rr_type type, e_side side) { - VTR_ASSERT(SOURCE == type); + VTR_ASSERT(e_rr_type::SOURCE == type); resize_nodes(layer, des_coord.x(), des_coord.y(), type, side); - rr_node_indices_[type][layer][des_coord.x()][des_coord.y()][side] = rr_node_indices_[type][layer][src_coord.x()][src_coord.y()][side]; + rr_node_indices_[(size_t)type][layer][des_coord.x()][des_coord.y()][side] = rr_node_indices_[(size_t)type][layer][src_coord.x()][src_coord.y()][side]; } void RRSpatialLookup::resize_nodes(int layer, @@ -329,23 +329,23 @@ void RRSpatialLookup::resize_nodes(int layer, * This may seldom happen because the rr_graph building function * should ensure the fast look-up well organized */ - VTR_ASSERT(type < rr_node_indices_.size()); + VTR_ASSERT((size_t)type < rr_node_indices_.size()); VTR_ASSERT(x >= 0); VTR_ASSERT(y >= 0); VTR_ASSERT(layer >= 0); - if ((layer >= int(rr_node_indices_[type].dim_size(0))) - || (x >= int(rr_node_indices_[type].dim_size(1))) - || (y >= int(rr_node_indices_[type].dim_size(2))) - || (size_t(side) >= rr_node_indices_[type].dim_size(3))) { - rr_node_indices_[type].resize({std::max(rr_node_indices_[type].dim_size(0),size_t(layer)+1), - std::max(rr_node_indices_[type].dim_size(1), size_t(x) + 1), - std::max(rr_node_indices_[type].dim_size(2), size_t(y) + 1), - std::max(rr_node_indices_[type].dim_size(3), size_t(side) + 1)}); + if ((layer >= int(rr_node_indices_[(size_t)type].dim_size(0))) + || (x >= int(rr_node_indices_[(size_t)type].dim_size(1))) + || (y >= int(rr_node_indices_[(size_t)type].dim_size(2))) + || (size_t(side) >= rr_node_indices_[(size_t)type].dim_size(3))) { + rr_node_indices_[(size_t)type].resize({std::max(rr_node_indices_[(size_t)type].dim_size(0),size_t(layer)+1), + std::max(rr_node_indices_[(size_t)type].dim_size(1), size_t(x) + 1), + std::max(rr_node_indices_[(size_t)type].dim_size(2), size_t(y) + 1), + std::max(rr_node_indices_[(size_t)type].dim_size(3), size_t(side) + 1)}); } } -void RRSpatialLookup::reorder(const vtr::vector dest_order) { +void RRSpatialLookup::reorder(const vtr::vector& dest_order) { // update rr_node_indices, a map to optimize rr_index lookups for (auto& grid : rr_node_indices_) { for(size_t l = 0; l < grid.dim_size(0); l++) { diff --git a/libs/librrgraph/src/base/rr_spatial_lookup.h b/libs/librrgraph/src/base/rr_spatial_lookup.h index 6a4ca5f1b1c..049175e587c 100644 --- a/libs/librrgraph/src/base/rr_spatial_lookup.h +++ b/libs/librrgraph/src/base/rr_spatial_lookup.h @@ -270,7 +270,7 @@ class RRSpatialLookup { e_side side); /** @brief Reorder the internal look up to be more memory efficient */ - void reorder(const vtr::vector dest_order); + void reorder(const vtr::vector& dest_order); /** @brief Clear all the data inside */ void clear(); diff --git a/libs/librrgraph/src/io/rr_graph_uxsdcxx_serializer.h b/libs/librrgraph/src/io/rr_graph_uxsdcxx_serializer.h index c97039f1821..ad23948815d 100644 --- a/libs/librrgraph/src/io/rr_graph_uxsdcxx_serializer.h +++ b/libs/librrgraph/src/io/rr_graph_uxsdcxx_serializer.h @@ -744,7 +744,7 @@ class RrGraphSerializer final : public uxsd::RrGraphBase { if (uxsd::enum_loc_side::UXSD_INVALID == side) { // node_loc.side is only expected on IPIN/OPIN. - if (rr_graph.node_type(node.id()) == IPIN || rr_graph.node_type(node.id()) == OPIN) { + if (rr_graph.node_type(node.id()) == e_rr_type::IPIN || rr_graph.node_type(node.id()) == e_rr_type::OPIN) { report_error( "inode %d is type %d, which requires a side, but no side was supplied.", inode, rr_graph.node_type(node.id())); @@ -767,7 +767,7 @@ class RrGraphSerializer final : public uxsd::RrGraphBase { inline uxsd::enum_loc_side get_node_loc_side(const t_rr_node& node) final { const auto& rr_graph = (*rr_graph_); - if (rr_graph.node_type(node.id()) == IPIN || rr_graph.node_type(node.id()) == OPIN) { + if (rr_graph.node_type(node.id()) == e_rr_type::IPIN || rr_graph.node_type(node.id()) == e_rr_type::OPIN) { std::bitset sides_bitset; for (const e_side& side : TOTAL_2D_SIDES) { if (rr_graph.is_node_on_specific_side(node.id(), side)) { @@ -825,11 +825,11 @@ class RrGraphSerializer final : public uxsd::RrGraphBase { if (e_graph_type::GLOBAL == graph_type_) { rr_graph_builder_->set_node_cost_index(node_id, RRIndexedDataId(0)); - } else if (rr_graph.node_type(node.id()) == CHANX) { + } else if (rr_graph.node_type(node.id()) == e_rr_type::CHANX) { int seg_ind_x = find_segment_index_along_axis(segment_id, X_AXIS); rr_graph_builder_->set_node_cost_index(node_id, RRIndexedDataId(CHANX_COST_INDEX_START + seg_ind_x)); seg_index_[rr_graph.node_cost_index(node.id())] = segment_id; - } else if (rr_graph.node_type(node.id()) == CHANY) { + } else if (rr_graph.node_type(node.id()) == e_rr_type::CHANY) { int seg_ind_y = find_segment_index_along_axis(segment_id, Y_AXIS); rr_graph_builder_->set_node_cost_index(node_id, RRIndexedDataId(CHANX_COST_INDEX_START + segment_inf_x_.size() + seg_ind_y)); seg_index_[rr_graph.node_cost_index(node.id())] = segment_id; @@ -889,20 +889,20 @@ class RrGraphSerializer final : public uxsd::RrGraphBase { rr_graph_builder_->set_node_capacity(node_id, capacity); switch (rr_graph.node_type(node.id())) { - case CHANX: + case e_rr_type::CHANX: break; - case CHANY: + case e_rr_type::CHANY: break; - case SOURCE: + case e_rr_type::SOURCE: rr_graph_builder_->set_node_cost_index(node_id, RRIndexedDataId(SOURCE_COST_INDEX)); break; - case SINK: + case e_rr_type::SINK: rr_graph_builder_->set_node_cost_index(node_id, RRIndexedDataId(SINK_COST_INDEX)); break; - case OPIN: + case e_rr_type::OPIN: rr_graph_builder_->set_node_cost_index(node_id, RRIndexedDataId(OPIN_COST_INDEX)); break; - case IPIN: + case e_rr_type::IPIN: rr_graph_builder_->set_node_cost_index(node_id, RRIndexedDataId(IPIN_COST_INDEX)); break; default: @@ -962,7 +962,7 @@ class RrGraphSerializer final : public uxsd::RrGraphBase { RRNodeId node_id = node.id(); if (direction == uxsd::enum_node_direction::UXSD_INVALID) { - if (rr_graph.node_type(node.id()) == CHANX || rr_graph.node_type(node.id()) == CHANY) { + if (rr_graph.node_type(node.id()) == e_rr_type::CHANX || rr_graph.node_type(node.id()) == e_rr_type::CHANY) { report_error( "inode %d is type %d, which requires a direction, but no direction was supplied.", inode, rr_graph.node_type(node.id())); @@ -973,7 +973,7 @@ class RrGraphSerializer final : public uxsd::RrGraphBase { } inline uxsd::enum_node_direction get_node_direction(const t_rr_node& node) final { const auto& rr_graph = (*rr_graph_); - if (rr_graph.node_type(node.id()) == CHANX || rr_graph.node_type(node.id()) == CHANY) { + if (rr_graph.node_type(node.id()) == e_rr_type::CHANX || rr_graph.node_type(node.id()) == e_rr_type::CHANY) { return to_uxsd_node_direction(rr_graph.node_direction(node.id())); } else { return uxsd::enum_node_direction::UXSD_INVALID; @@ -1158,8 +1158,8 @@ class RrGraphSerializer final : public uxsd::RrGraphBase { /*Keeps track of the number of the specific type of switch that connects a wire to an ipin * use the pair data structure to keep the maximum*/ - if (rr_graph.node_type(node.id()) == CHANX || rr_graph.node_type(node.id()) == CHANY) { - if(rr_graph.node_type(RRNodeId(sink_node)) == IPIN){ + if (rr_graph.node_type(node.id()) == e_rr_type::CHANX || rr_graph.node_type(node.id()) == e_rr_type::CHANY) { + if(rr_graph.node_type(RRNodeId(sink_node)) == e_rr_type::IPIN){ if (rr_graph.node_layer(RRNodeId(sink_node)) == rr_graph.node_layer(RRNodeId(source_node))) { count_for_wire_to_ipin_switches[switch_id]++; if (count_for_wire_to_ipin_switches[switch_id] > most_frequent_switch.second) { @@ -1848,7 +1848,7 @@ class RrGraphSerializer final : public uxsd::RrGraphBase { /* Alloc the lookup table */ for (t_rr_type rr_type : RR_TYPES) { - if (rr_type == CHANX) { + if (rr_type == e_rr_type::CHANX) { rr_graph_builder.node_lookup().resize_nodes(grid_.get_num_layers(), grid_.height(), grid_.width(), rr_type, NUM_2D_SIDES); } else { rr_graph_builder.node_lookup().resize_nodes(grid_.get_num_layers(), grid_.width(), grid_.height(), rr_type, NUM_2D_SIDES); @@ -2007,17 +2007,17 @@ class RrGraphSerializer final : public uxsd::RrGraphBase { t_rr_type from_uxsd_node_type(uxsd::enum_node_type type) { switch (type) { case uxsd::enum_node_type::CHANX: - return CHANX; + return e_rr_type::CHANX; case uxsd::enum_node_type::CHANY: - return CHANY; + return e_rr_type::CHANY; case uxsd::enum_node_type::SOURCE: - return SOURCE; + return e_rr_type::SOURCE; case uxsd::enum_node_type::SINK: - return SINK; + return e_rr_type::SINK; case uxsd::enum_node_type::OPIN: - return OPIN; + return e_rr_type::OPIN; case uxsd::enum_node_type::IPIN: - return IPIN; + return e_rr_type::IPIN; default: report_error( "Invalid node type %d", @@ -2026,17 +2026,17 @@ class RrGraphSerializer final : public uxsd::RrGraphBase { } uxsd::enum_node_type to_uxsd_node_type(t_rr_type type) { switch (type) { - case CHANX: + case e_rr_type::CHANX: return uxsd::enum_node_type::CHANX; - case CHANY: + case e_rr_type::CHANY: return uxsd::enum_node_type::CHANY; - case SOURCE: + case e_rr_type::SOURCE: return uxsd::enum_node_type::SOURCE; - case SINK: + case e_rr_type::SINK: return uxsd::enum_node_type::SINK; - case OPIN: + case e_rr_type::OPIN: return uxsd::enum_node_type::OPIN; - case IPIN: + case e_rr_type::IPIN: return uxsd::enum_node_type::IPIN; default: report_error( diff --git a/libs/librrgraph/src/utils/alloc_and_load_rr_indexed_data.cpp b/libs/librrgraph/src/utils/alloc_and_load_rr_indexed_data.cpp index 1cfdba42f92..0496e605a49 100644 --- a/libs/librrgraph/src/utils/alloc_and_load_rr_indexed_data.cpp +++ b/libs/librrgraph/src/utils/alloc_and_load_rr_indexed_data.cpp @@ -198,8 +198,8 @@ std::vector find_ortho_cost_index(const RRGraphView& rr_graph, //if the type is smaller than start index, means destination is not a CHAN type node. - if ((from_node_type == CHANX && to_node_type == CHANY) || (from_node_type == CHANY && to_node_type == CHANX)) { - if (to_node_type == CHANY) { + if ((from_node_type == e_rr_type::CHANX && to_node_type == e_rr_type::CHANY) || (from_node_type == e_rr_type::CHANY && to_node_type == e_rr_type::CHANX)) { + if (to_node_type == e_rr_type::CHANY) { dest_nodes_count[from_node_cost_index - CHANX_COST_INDEX_START][to_node_cost_index - (CHANX_COST_INDEX_START + segment_inf_x.size())]++; } else { dest_nodes_count[from_node_cost_index - CHANX_COST_INDEX_START][to_node_cost_index - CHANX_COST_INDEX_START]++; @@ -430,7 +430,7 @@ static std::vector count_rr_segment_types(const RRGraphView& rr_graph, c std::vector rr_segment_type_counts; for (const RRNodeId& id : rr_graph.nodes()) { - if (rr_graph.node_type(id) != CHANX && rr_graph.node_type(id) != CHANY) continue; + if (rr_graph.node_type(id) != e_rr_type::CHANX && rr_graph.node_type(id) != e_rr_type::CHANY) continue; auto cost_index = rr_graph.node_cost_index(id); @@ -528,7 +528,7 @@ static void load_rr_indexed_data_T_values(const RRGraphView& rr_graph, for (const RRNodeId& rr_id : rr_graph.nodes()) { t_rr_type rr_type = rr_graph.node_type(rr_id); - if (rr_type != CHANX && rr_type != CHANY) { + if (rr_type != e_rr_type::CHANX && rr_type != e_rr_type::CHANY) { continue; } @@ -647,7 +647,7 @@ static void calculate_average_switch(const RRGraphView& rr_graph, int inode, dou buffered = UNDEFINED; for (const auto& edge : fan_in_list[node]) { /* want to get C/R/Tdel/Cinternal of switches that connect this track segment to other track segments */ - if (rr_graph.node_type(node) == CHANX || rr_graph.node_type(node) == CHANY) { + if (rr_graph.node_type(node) == e_rr_type::CHANX || rr_graph.node_type(node) == e_rr_type::CHANY) { int switch_index = rr_graph.rr_nodes().edge_switch(edge); if (rr_graph.rr_switch_inf(RRSwitchId(switch_index)).type() == SwitchType::SHORT) { diff --git a/libs/librrgraph/src/utils/describe_rr_node.cpp b/libs/librrgraph/src/utils/describe_rr_node.cpp index 6383e3489cc..3c00748f6d8 100644 --- a/libs/librrgraph/src/utils/describe_rr_node.cpp +++ b/libs/librrgraph/src/utils/describe_rr_node.cpp @@ -11,7 +11,7 @@ std::string describe_rr_node(const RRGraphView& rr_graph, bool is_flat) { std::string msg = vtr::string_fmt("RR node: %d", inode); - if (rr_graph.node_type(inode) == CHANX || rr_graph.node_type(inode) == CHANY) { + if (rr_graph.node_type(inode) == e_rr_type::CHANX || rr_graph.node_type(inode) == e_rr_type::CHANY) { auto cost_index = rr_graph.node_cost_index(inode); int seg_index = rr_indexed_data[cost_index].seg_index; @@ -26,7 +26,7 @@ std::string describe_rr_node(const RRGraphView& rr_graph, rr_graph.node_track_num(inode), seg_index); } - } else if (rr_graph.node_type(inode) == IPIN || rr_graph.node_type(inode) == OPIN) { + } else if (rr_graph.node_type(inode) == e_rr_type::IPIN || rr_graph.node_type(inode) == e_rr_type::OPIN) { auto type = grid.get_physical_type({rr_graph.node_xlow(inode), rr_graph.node_ylow(inode), rr_graph.node_layer(inode)}); @@ -37,7 +37,7 @@ std::string describe_rr_node(const RRGraphView& rr_graph, rr_graph.node_pin_num(inode), pin_name.c_str()); } else { - VTR_ASSERT(rr_graph.node_type(inode) == SOURCE || rr_graph.node_type(inode) == SINK); + VTR_ASSERT(rr_graph.node_type(inode) == e_rr_type::SOURCE || rr_graph.node_type(inode) == e_rr_type::SINK); msg += vtr::string_fmt(" class: %d", rr_graph.node_class_num(inode)); } diff --git a/utils/fasm/test/test_fasm.cpp b/utils/fasm/test/test_fasm.cpp index 9ee9a142b48..6411dd97f06 100644 --- a/utils/fasm/test/test_fasm.cpp +++ b/utils/fasm/test/test_fasm.cpp @@ -7,13 +7,11 @@ #include "rr_metadata.h" #include "fasm.h" #include "fasm_utils.h" -#include "arch_util.h" #include "rr_graph_writer.h" #include #include #include #include -#include #include "post_routing_pb_pin_fixup.h" #include "sync_netlists_to_routing_flat.h" @@ -77,7 +75,7 @@ TEST_CASE("substitute_tags_correct", "[fasm]") { auto result = fasm::substitute_tags(feature, tags); - REQUIRE(result.compare("LCLB_X7Y8_SLICE") == 0); + REQUIRE(result == "LCLB_X7Y8_SLICE"); } TEST_CASE("substitute_tags_undef", "[fasm]") { @@ -270,7 +268,7 @@ TEST_CASE("fasm_integration_test", "[fasm]") { // Add additional features to edges that go to CLB.I[11:0] pins // to correlate them with features of CLB input mux later. auto sink_type = rr_graph.node_type(RRNodeId(sink_inode)); - if (sink_type == IPIN) { + if (sink_type == e_rr_type::IPIN) { auto pin_feature = get_pin_feature(sink_inode); value = value + "\n" + pin_feature; } @@ -368,8 +366,8 @@ TEST_CASE("fasm_integration_test", "[fasm]") { continue; } - if (line.find("#") != std::string::npos) { - auto init_pos = line.find("#"); + if (line.find('#') != std::string::npos) { + auto init_pos = line.find('#'); lut_def = line.substr(init_pos+2); continue; } diff --git a/utils/route_diag/src/main.cpp b/utils/route_diag/src/main.cpp index 5074d79cc09..da911554a42 100644 --- a/utils/route_diag/src/main.cpp +++ b/utils/route_diag/src/main.cpp @@ -185,7 +185,7 @@ static void profile_source(const Netlist<>& net_list, VTR_ASSERT(sink_ptc != OPEN); //TODO: should pass layer_num instead of 0 to node_lookup once the multi-die FPGAs support is completed - RRNodeId sink_rr_node = device_ctx.rr_graph.node_lookup().find_node(0, sink_x, sink_y, SINK, sink_ptc); + RRNodeId sink_rr_node = device_ctx.rr_graph.node_lookup().find_node(0, sink_x, sink_y, e_rr_type::SINK, sink_ptc); if (directconnect_exists(source_rr_node, sink_rr_node)) { //Skip if we shouldn't measure direct connects and a direct connect exists diff --git a/vpr/src/base/old_traceback.cpp b/vpr/src/base/old_traceback.cpp index a1bb21be232..7d00bdaaaf0 100644 --- a/vpr/src/base/old_traceback.cpp +++ b/vpr/src/base/old_traceback.cpp @@ -36,13 +36,13 @@ void TracebackCompat::traceback_to_route_tree_x(t_trace* trace, RouteTree& tree, new_node->R_upstream = std::numeric_limits::quiet_NaN(); new_node->C_downstream = std::numeric_limits::quiet_NaN(); new_node->Tdel = std::numeric_limits::quiet_NaN(); - auto node_type = rr_graph.node_type(inode); - if (node_type == IPIN || node_type == SINK) + e_rr_type node_type = rr_graph.node_type(inode); + if (node_type == e_rr_type::IPIN || node_type == e_rr_type::SINK) new_node->re_expand = false; else new_node->re_expand = true; - if (rr_graph.node_type(inode) == SINK) { + if (rr_graph.node_type(inode) == e_rr_type::SINK) { /* The traceback returns to the previous branch point if there is more than one SINK, otherwise we are at the last SINK */ if (trace->next) { RRNodeId next_rr_node = RRNodeId(trace->next->index); @@ -120,7 +120,7 @@ void print_traceback(const t_trace* trace) { const t_trace* prev = nullptr; while (trace) { RRNodeId inode(trace->index); - VTR_LOG("%d (%s)", inode, rr_node_typename[rr_graph.node_type(inode)]); + VTR_LOG("%d (%s)", inode, rr_node_typename[(size_t)rr_graph.node_type(inode)]); if (trace->iswitch == OPEN) { VTR_LOG(" !"); //End of branch diff --git a/vpr/src/base/read_route.cpp b/vpr/src/base/read_route.cpp index e06726fe817..fc354a90c9e 100644 --- a/vpr/src/base/read_route.cpp +++ b/vpr/src/base/read_route.cpp @@ -13,11 +13,8 @@ * other file's information */ -#include #include #include -#include -#include #include #include @@ -47,7 +44,7 @@ static void process_nodes(const Netlist<>& net_list, std::ifstream& fp, ClusterN static void process_nets(const Netlist<>& net_list, std::ifstream& fp, ClusterNetId inet, std::string name, std::vector input_tokens, const char* filename, int& lineno, bool is_flat); static void process_global_blocks(const Netlist<>& net_list, std::ifstream& fp, ClusterNetId inet, const char* filename, int& lineno, bool is_flat); static void format_coordinates(int& layer_num, int& x, int& y, std::string coord, ClusterNetId net, const char* filename, const int lineno); -static void format_pin_info(std::string& pb_name, std::string& port_name, int& pb_pin_num, std::string input); +static void format_pin_info(std::string& pb_name, std::string& port_name, int& pb_pin_num, const std::string& input); static std::string format_name(std::string name); static bool check_rr_graph_connectivity(RRNodeId prev_node, RRNodeId node); void print_route(const Netlist<>& net_list, FILE* fp, bool is_flat); @@ -497,7 +494,7 @@ static void format_coordinates(int& layer_num, int& x, int& y, std::string coord * @brief Parse the pin info in the form of pb_name.port_name[pb_pin_num] * into its appropriate variables */ -static void format_pin_info(std::string& pb_name, std::string& port_name, int& pb_pin_num, std::string input) { +static void format_pin_info(std::string& pb_name, std::string& port_name, int& pb_pin_num, const std::string& input) { std::stringstream pb_info(input); std::getline(pb_info, pb_name, '.'); std::getline(pb_info, port_name, '['); @@ -519,7 +516,7 @@ static std::string format_name(std::string name) { VPR_FATAL_ERROR(VPR_ERROR_ROUTE, "%s should be enclosed by parenthesis", name.c_str()); - return nullptr; + return {}; } } @@ -536,7 +533,7 @@ static bool check_rr_graph_connectivity(RRNodeId prev_node, RRNodeId node) { auto& device_ctx = g_vpr_ctx.device(); const auto& rr_graph = device_ctx.rr_graph; // If it's starting a new sub branch this is ok - if (rr_graph.node_type(prev_node) == SINK) return true; + if (rr_graph.node_type(prev_node) == e_rr_type::SINK) return true; for (RREdgeId edge : rr_graph.edge_range(prev_node)) { //If the sink node is reachable by previous node return true @@ -596,8 +593,8 @@ void print_route(const Netlist<>& net_list, rr_graph.node_yhigh(inode), layer_num); switch (rr_type) { - case IPIN: - case OPIN: + case e_rr_type::IPIN: + case e_rr_type::OPIN: if (is_io_type(device_ctx.grid.get_physical_type({ilow, jlow, layer_num}))) { fprintf(fp, " Pad: "); } else { /* IO Pad. */ @@ -605,13 +602,13 @@ void print_route(const Netlist<>& net_list, } break; - case CHANX: - case CHANY: + case e_rr_type::CHANX: + case e_rr_type::CHANY: fprintf(fp, " Track: "); break; - case SOURCE: - case SINK: + case e_rr_type::SOURCE: + case e_rr_type::SINK: if (is_io_type(device_ctx.grid.get_physical_type({ilow, jlow, layer_num}))) { fprintf(fp, " Pad: "); } else { /* IO Pad. */ @@ -629,7 +626,7 @@ void print_route(const Netlist<>& net_list, fprintf(fp, "%d ", rr_graph.node_ptc_num(inode)); auto physical_tile = device_ctx.grid.get_physical_type({ilow, jlow, layer_num}); - if (!is_io_type(physical_tile) && (rr_type == IPIN || rr_type == OPIN)) { + if (!is_io_type(physical_tile) && (rr_type == e_rr_type::IPIN || rr_type == e_rr_type::OPIN)) { int pin_num = rr_graph.node_pin_num(inode); int xoffset = device_ctx.grid.get_width_offset({ilow, jlow, layer_num}); int yoffset = device_ctx.grid.get_height_offset({ilow, jlow, layer_num}); @@ -654,7 +651,7 @@ void print_route(const Netlist<>& net_list, fprintf(fp, "Switch: %d", int(tptr->iswitch)); //Save net pin index for sinks - if (rr_type == SINK) { + if (rr_type == e_rr_type::SINK) { fprintf(fp, " Net_pin_index: %d", tptr->net_pin_index); } diff --git a/vpr/src/base/read_route.h b/vpr/src/base/read_route.h index 226a104a0b3..4758b0cf646 100644 --- a/vpr/src/base/read_route.h +++ b/vpr/src/base/read_route.h @@ -5,13 +5,10 @@ * This is used to perform --analysis only */ -#ifndef READ_ROUTE_H -#define READ_ROUTE_H +#pragma once #include "netlist.h" #include "vpr_types.h" bool read_route(const char* route_file, const t_router_opts& RouterOpts, bool verify_file_digests, bool is_flat); void print_route(const Netlist<>& net_list, const char* placement_file, const char* route_file, bool is_flat); - -#endif /* READ_ROUTE_H */ diff --git a/vpr/src/base/stats.cpp b/vpr/src/base/stats.cpp index 774235bf2cc..e2959ae6633 100644 --- a/vpr/src/base/stats.cpp +++ b/vpr/src/base/stats.cpp @@ -312,11 +312,11 @@ static void load_channel_occupancies(const Netlist<>& net_list, RRNodeId inode = rt_node.inode; t_rr_type rr_type = rr_graph.node_type(inode); - if (rr_type == CHANX) { + if (rr_type == t_rr_type::CHANX) { int j = rr_graph.node_ylow(inode); for (int i = rr_graph.node_xlow(inode); i <= rr_graph.node_xhigh(inode); i++) chanx_occ[i][j]++; - } else if (rr_type == CHANY) { + } else if (rr_type == t_rr_type::CHANY) { int i = rr_graph.node_xlow(inode); for (int j = rr_graph.node_ylow(inode); j <= rr_graph.node_yhigh(inode); j++) chany_occ[i][j]++; @@ -354,16 +354,16 @@ void get_num_bends_and_length(ParentNetId inet, int* bends_ptr, int* len_ptr, in RRNodeId inode = rt_node.inode; t_rr_type curr_type = rr_graph.node_type(inode); - if (curr_type == CHANX || curr_type == CHANY) { + if (curr_type == t_rr_type::CHANX || curr_type == t_rr_type::CHANY) { segments++; length += rr_graph.node_length(inode); - if (curr_type != prev_type && (prev_type == CHANX || prev_type == CHANY)) + if (curr_type != prev_type && (prev_type == t_rr_type::CHANX || prev_type == t_rr_type::CHANY)) bends++; } /* The all_nodes iterator walks all nodes in the tree. If we are at a leaf and going back to the top, prev_type is invalid: just set it to SINK */ - prev_type = rt_node.is_leaf() ? SINK : curr_type; + prev_type = rt_node.is_leaf() ? t_rr_type::SINK : curr_type; } *bends_ptr = bends; diff --git a/vpr/src/base/vpr_types.h b/vpr/src/base/vpr_types.h index ddbcb59b08e..c2ca97e73fe 100644 --- a/vpr/src/base/vpr_types.h +++ b/vpr/src/base/vpr_types.h @@ -21,8 +21,7 @@ * The t_pb hierarchy follows what is described by t_pb_graph_node */ -#ifndef VPR_TYPES_H -#define VPR_TYPES_H +#pragma once #include #include @@ -1361,9 +1360,9 @@ struct t_det_routing_arch { std::string read_rr_edge_override_filename; }; -constexpr bool is_pin(e_rr_type type) { return (type == IPIN || type == OPIN); } -constexpr bool is_chan(e_rr_type type) { return (type == CHANX || type == CHANY); } -constexpr bool is_src_sink(e_rr_type type) { return (type == SOURCE || type == SINK); } +constexpr bool is_pin(e_rr_type type) { return (type == t_rr_type::IPIN || type == t_rr_type::OPIN); } +constexpr bool is_chan(e_rr_type type) { return (type == t_rr_type::CHANX || type == t_rr_type::CHANY); } +constexpr bool is_src_sink(e_rr_type type) { return (type == t_rr_type::SOURCE || type == t_rr_type::SINK); } /** * @brief Extra information about each rr_node needed only during routing @@ -1552,11 +1551,3 @@ class RouteStatus { typedef vtr::vector>> t_clb_opins_used; //[0..num_blocks-1][0..class-1][0..used_pins-1] typedef std::vector> t_arch_switch_fanin; - -struct pair_hash { - std::size_t operator()(const std::pair& p) const noexcept { - return std::hash()(p.first) ^ (std::hash()(p.second) << 1); - } -}; - -#endif diff --git a/vpr/src/draw/draw.cpp b/vpr/src/draw/draw.cpp index 5dc0c09523e..fe984f275d0 100644 --- a/vpr/src/draw/draw.cpp +++ b/vpr/src/draw/draw.cpp @@ -638,10 +638,10 @@ int get_track_num(int inode, const vtr::OffsetMatrix& chanx_track, const vt j = rr_graph.node_ylow(rr_node); /* length channel segments. */ switch (rr_type) { - case CHANX: + case t_rr_type::CHANX: return (chanx_track[i][j]); - case CHANY: + case t_rr_type::CHANY: return (chany_track[i][j]); default: diff --git a/vpr/src/draw/draw_basic.cpp b/vpr/src/draw/draw_basic.cpp index 2981dd308aa..770c8532115 100644 --- a/vpr/src/draw/draw_basic.cpp +++ b/vpr/src/draw/draw_basic.cpp @@ -351,13 +351,13 @@ void draw_congestion(ezgl::renderer* g) { color.alpha = transparency_factor; switch (rr_graph.node_type(inode)) { - case CHANX: //fallthrough - case CHANY: + case t_rr_type::CHANX: //fallthrough + case t_rr_type::CHANY: draw_rr_chan(inode, color, g); break; - case IPIN: //fallthrough - case OPIN: + case t_rr_type::IPIN: //fallthrough + case t_rr_type::OPIN: draw_rr_pin(inode, color, g); break; default: @@ -651,15 +651,15 @@ void draw_partial_route(const std::vector& rr_nodes_to_draw, ezgl::ren ezgl::color color = draw_state->draw_rr_node[inode].color; switch (rr_type) { - case OPIN: { + case t_rr_type::OPIN: { draw_rr_pin(inode, color, g); break; } - case IPIN: { + case t_rr_type::IPIN: { draw_rr_pin(inode, color, g); if (edge_visibility.visible) { g->set_color(color, edge_visibility.alpha); - if (rr_graph.node_type(prev_node) == OPIN) { + if (rr_graph.node_type(prev_node) == t_rr_type::OPIN) { draw_pin_to_pin(prev_node, inode, g); } else { draw_pin_to_chan_edge(inode, prev_node, g); @@ -667,7 +667,7 @@ void draw_partial_route(const std::vector& rr_nodes_to_draw, ezgl::ren } break; } - case CHANX: { + case t_rr_type::CHANX: { if (draw_state->draw_route_type == GLOBAL) chanx_track[rr_graph.node_xlow(inode)][rr_graph.node_ylow(inode)]++; @@ -675,15 +675,15 @@ void draw_partial_route(const std::vector& rr_nodes_to_draw, ezgl::ren if (edge_visibility.visible) { g->set_color(color, edge_visibility.alpha); switch (prev_type) { - case CHANX: { + case t_rr_type::CHANX: { draw_chanx_to_chanx_edge(prev_node, inode, switch_type, g); break; } - case CHANY: { + case t_rr_type::CHANY: { draw_chanx_to_chany_edge(inode, prev_node, FROM_Y_TO_X, switch_type, g); break; } - case OPIN: { + case t_rr_type::OPIN: { draw_pin_to_chan_edge(prev_node, inode, g); break; } @@ -697,7 +697,7 @@ void draw_partial_route(const std::vector& rr_nodes_to_draw, ezgl::ren break; } - case CHANY: { + case t_rr_type::CHANY: { if (draw_state->draw_route_type == GLOBAL) chany_track[rr_graph.node_xlow(inode)][rr_graph.node_ylow(inode)]++; @@ -706,17 +706,17 @@ void draw_partial_route(const std::vector& rr_nodes_to_draw, ezgl::ren if (edge_visibility.visible) { g->set_color(color, edge_visibility.alpha); switch (prev_type) { - case CHANX: { + case t_rr_type::CHANX: { draw_chanx_to_chany_edge(prev_node, inode, FROM_X_TO_Y, switch_type, g); break; } - case CHANY: { + case t_rr_type::CHANY: { draw_chany_to_chany_edge(RRNodeId(prev_node), RRNodeId(inode), switch_type, g); break; } - case OPIN: { + case t_rr_type::OPIN: { draw_pin_to_chan_edge(prev_node, inode, g); break; @@ -839,11 +839,11 @@ void draw_routing_util(ezgl::renderer* g) { t_draw_coords* draw_coords = get_draw_coords_vars(); auto& device_ctx = g_vpr_ctx.device(); - auto chanx_usage = calculate_routing_usage(CHANX, draw_state->is_flat, false); - auto chany_usage = calculate_routing_usage(CHANY, draw_state->is_flat, false); + auto chanx_usage = calculate_routing_usage(t_rr_type::CHANX, draw_state->is_flat, false); + auto chany_usage = calculate_routing_usage(t_rr_type::CHANY, draw_state->is_flat, false); - auto chanx_avail = calculate_routing_avail(CHANX); - auto chany_avail = calculate_routing_avail(CHANY); + auto chanx_avail = calculate_routing_avail(t_rr_type::CHANX); + auto chany_avail = calculate_routing_avail(t_rr_type::CHANY); float min_util = 0.; float max_util = -std::numeric_limits::infinity(); diff --git a/vpr/src/draw/draw_rr.cpp b/vpr/src/draw/draw_rr.cpp index a47c76d3032..ad9e8e38cfb 100644 --- a/vpr/src/draw/draw_rr.cpp +++ b/vpr/src/draw/draw_rr.cpp @@ -62,20 +62,20 @@ void draw_rr(ezgl::renderer* g) { if (!draw_state->draw_rr_node[inode].node_highlighted) { /* If not highlighted node, assign color based on type. */ switch (rr_graph.node_type(inode)) { - case CHANX: - case CHANY: + case t_rr_type::CHANX: + case t_rr_type::CHANY: draw_state->draw_rr_node[inode].color = DEFAULT_RR_NODE_COLOR; break; - case OPIN: + case t_rr_type::OPIN: draw_state->draw_rr_node[inode].color = ezgl::PINK; break; - case IPIN: + case t_rr_type::IPIN: draw_state->draw_rr_node[inode].color = blk_LIGHTSKYBLUE; break; - case SOURCE: + case t_rr_type::SOURCE: draw_state->draw_rr_node[inode].color = ezgl::PLUM; break; - case SINK: + case t_rr_type::SINK: draw_state->draw_rr_node[inode].color = ezgl::DARK_SLATE_BLUE; break; default: @@ -90,30 +90,30 @@ void draw_rr(ezgl::renderer* g) { /* Now call drawing routines to draw the node. */ switch (rr_graph.node_type(inode)) { - case SINK: + case t_rr_type::SINK: draw_rr_src_sink(inode, draw_state->draw_rr_node[inode].color, g); break; - case SOURCE: + case t_rr_type::SOURCE: draw_rr_edges(inode, g); draw_rr_src_sink(inode, draw_state->draw_rr_node[inode].color, g); break; - case CHANX: + case t_rr_type::CHANX: draw_rr_chan(inode, draw_state->draw_rr_node[inode].color, g); draw_rr_edges(inode, g); break; - case CHANY: + case t_rr_type::CHANY: draw_rr_chan(inode, draw_state->draw_rr_node[inode].color, g); draw_rr_edges(inode, g); break; - case IPIN: + case t_rr_type::IPIN: draw_rr_pin(inode, draw_state->draw_rr_node[inode].color, g); draw_rr_edges(inode, g); break; - case OPIN: + case t_rr_type::OPIN: draw_rr_pin(inode, draw_state->draw_rr_node[inode].color, g); draw_rr_edges(inode, g); break; @@ -135,7 +135,7 @@ void draw_rr_chan(RRNodeId inode, const ezgl::color color, ezgl::renderer* g) { t_rr_type type = rr_graph.node_type(inode); - VTR_ASSERT(type == CHANX || type == CHANY); + VTR_ASSERT(type == t_rr_type::CHANX || type == t_rr_type::CHANY); ezgl::rectangle bound_box = draw_get_rr_chan_bbox(inode); Direction dir = rr_graph.node_direction(inode); @@ -163,7 +163,7 @@ void draw_rr_chan(RRNodeId inode, const ezgl::color color, ezgl::renderer* g) { e_side mux_dir = TOP; int coord_min = -1; int coord_max = -1; - if (type == CHANX) { + if (type == t_rr_type::CHANX) { coord_min = rr_graph.node_xlow(inode); coord_max = rr_graph.node_xhigh(inode); if (dir == Direction::INC) { @@ -172,7 +172,7 @@ void draw_rr_chan(RRNodeId inode, const ezgl::color color, ezgl::renderer* g) { mux_dir = LEFT; } } else { - VTR_ASSERT(type == CHANY); + VTR_ASSERT(type == t_rr_type::CHANY); coord_min = rr_graph.node_ylow(inode); coord_max = rr_graph.node_yhigh(inode); if (dir == Direction::INC) { @@ -201,7 +201,7 @@ void draw_rr_chan(RRNodeId inode, const ezgl::color color, ezgl::renderer* g) { ezgl::point2d arrow_loc_min(0, 0); ezgl::point2d arrow_loc_max(0, 0); - if (type == CHANX) { + if (type == t_rr_type::CHANX) { float sb_xmin = draw_coords->tile_x[k]; arrow_loc_min = {sb_xmin + arrow_offset, start.y}; @@ -287,8 +287,8 @@ void draw_rr_edges(RRNodeId inode, ezgl::renderer* g) { from_type = rr_graph.node_type(rr_node); if ((draw_state->draw_rr_toggle == DRAW_NODES_RR) - || (draw_state->draw_rr_toggle == DRAW_NODES_SBOX_RR && (from_type == OPIN || from_type == SOURCE || from_type == IPIN)) - || (draw_state->draw_rr_toggle == DRAW_NODES_SBOX_CBOX_RR && (from_type == SOURCE || from_type == IPIN))) { + || (draw_state->draw_rr_toggle == DRAW_NODES_SBOX_RR && (from_type == t_rr_type::OPIN || from_type == t_rr_type::SOURCE || from_type == t_rr_type::IPIN)) + || (draw_state->draw_rr_toggle == DRAW_NODES_SBOX_CBOX_RR && (from_type == t_rr_type::SOURCE || from_type == t_rr_type::IPIN))) { return; /* Nothing to draw. */ } @@ -301,10 +301,10 @@ void draw_rr_edges(RRNodeId inode, ezgl::renderer* g) { continue; // skip drawing if edge is not valid to draw switch (from_type) { - case OPIN: + case t_rr_type::OPIN: switch (to_type) { - case CHANX: - case CHANY: + case t_rr_type::CHANX: + case t_rr_type::CHANY: if (rgb_is_same(draw_state->draw_rr_node[inode].color, ezgl::MAGENTA)) { // If OPIN was clicked on, set color to fan-out ezgl::color color = draw_state->draw_rr_node[to_node].color; @@ -318,7 +318,7 @@ void draw_rr_edges(RRNodeId inode, ezgl::renderer* g) { } draw_pin_to_chan_edge(inode, to_node, g); break; - case IPIN: + case t_rr_type::IPIN: if (rgb_is_same(draw_state->draw_rr_node[inode].color, ezgl::MAGENTA)) { ezgl::color color = draw_state->draw_rr_node[to_node].color; g->set_color(color, transparency_factor); @@ -338,9 +338,9 @@ void draw_rr_edges(RRNodeId inode, ezgl::renderer* g) { } break; - case CHANX: /* from_type */ + case t_rr_type::CHANX: /* from_type */ switch (to_type) { - case IPIN: + case t_rr_type::IPIN: if (draw_state->draw_rr_toggle == DRAW_NODES_SBOX_RR) { break; } @@ -365,7 +365,7 @@ void draw_rr_edges(RRNodeId inode, ezgl::renderer* g) { draw_pin_to_chan_edge(to_node, inode, g); break; - case CHANX: + case t_rr_type::CHANX: if (rgb_is_same(draw_state->draw_rr_node[inode].color, ezgl::MAGENTA)) { ezgl::color color = draw_state->draw_rr_node[to_node].color; g->set_color(color, transparency_factor); @@ -383,7 +383,7 @@ void draw_rr_edges(RRNodeId inode, ezgl::renderer* g) { switch_type, g); break; - case CHANY: + case t_rr_type::CHANY: if (rgb_is_same(draw_state->draw_rr_node[inode].color, ezgl::MAGENTA)) { ezgl::color color = draw_state->draw_rr_node[to_node].color; g->set_color(color, transparency_factor); @@ -408,9 +408,9 @@ void draw_rr_edges(RRNodeId inode, ezgl::renderer* g) { } break; - case CHANY: /* from_type */ + case t_rr_type::CHANY: /* from_type */ switch (to_type) { - case IPIN: + case t_rr_type::IPIN: if (draw_state->draw_rr_toggle == DRAW_NODES_SBOX_RR) { break; } @@ -435,7 +435,7 @@ void draw_rr_edges(RRNodeId inode, ezgl::renderer* g) { draw_pin_to_chan_edge(to_node, inode, g); break; - case CHANX: + case t_rr_type::CHANX: if (rgb_is_same(draw_state->draw_rr_node[inode].color, ezgl::MAGENTA)) { ezgl::color color = draw_state->draw_rr_node[to_node].color; g->set_color(color, transparency_factor); @@ -453,7 +453,7 @@ void draw_rr_edges(RRNodeId inode, ezgl::renderer* g) { FROM_Y_TO_X, switch_type, g); break; - case CHANY: + case t_rr_type::CHANY: if (rgb_is_same(draw_state->draw_rr_node[inode].color, ezgl::MAGENTA)) { ezgl::color color = draw_state->draw_rr_node[to_node].color; g->set_color(color, transparency_factor); @@ -478,9 +478,9 @@ void draw_rr_edges(RRNodeId inode, ezgl::renderer* g) { break; } break; - case IPIN: // from_type + case t_rr_type::IPIN: // from_type switch (to_type) { - case SINK: + case t_rr_type::SINK: g->set_color(ezgl::DARK_SLATE_BLUE, transparency_factor); draw_pin_to_sink(inode, to_node, g); break; @@ -492,9 +492,9 @@ void draw_rr_edges(RRNodeId inode, ezgl::renderer* g) { break; } break; - case SOURCE: // from_type + case t_rr_type::SOURCE: // from_type switch (to_type) { - case OPIN: + case t_rr_type::OPIN: g->set_color(ezgl::PLUM, transparency_factor); draw_source_to_pin(inode, to_node, g); break; @@ -686,8 +686,8 @@ RRNodeId draw_check_rr_node_hit(float click_x, float click_y) { continue; /* Don't check RR nodes on currently invisible layers*/ } switch (rr_graph.node_type(inode)) { - case IPIN: - case OPIN: { + case t_rr_type::IPIN: + case t_rr_type::OPIN: { int i = rr_graph.node_xlow(inode); int j = rr_graph.node_ylow(inode); t_physical_tile_type_ptr type = device_ctx.grid.get_physical_type({i, j, layer_num}); @@ -709,8 +709,8 @@ RRNodeId draw_check_rr_node_hit(float click_x, float click_y) { } break; } - case SOURCE: - case SINK: { + case t_rr_type::SOURCE: + case t_rr_type::SINK: { float xcen, ycen; draw_get_rr_src_sink_coords(rr_graph.rr_nodes()[size_t(inode)], &xcen, &ycen); @@ -721,8 +721,8 @@ RRNodeId draw_check_rr_node_hit(float click_x, float click_y) { } break; } - case CHANX: - case CHANY: { + case t_rr_type::CHANX: + case t_rr_type::CHANY: { bound_box = draw_get_rr_chan_bbox(inode); // Check if we clicked on this wire, with 30% @@ -815,22 +815,22 @@ void draw_rr_costs(ezgl::renderer* g, const vtr::vector& rr_cos color.alpha = transparency_factor; switch (rr_graph.node_type(inode)) { - case CHANX: //fallthrough - case CHANY: + case t_rr_type::CHANX: //fallthrough + case t_rr_type::CHANY: draw_rr_chan(inode, color, g); if (with_edges) draw_rr_edges(inode, g); break; - case IPIN: //fallthrough + case t_rr_type::IPIN: //fallthrough draw_rr_pin(inode, color, g); if (with_edges) draw_rr_edges(inode, g); break; - case OPIN: + case t_rr_type::OPIN: draw_rr_pin(inode, color, g); if (with_edges) draw_rr_edges(inode, g); break; - case SOURCE: - case SINK: + case t_rr_type::SOURCE: + case t_rr_type::SINK: color.alpha *= 0.8; draw_rr_src_sink(inode, color, g); if (with_edges) draw_rr_edges(inode, g); diff --git a/vpr/src/draw/draw_rr_edges.cpp b/vpr/src/draw/draw_rr_edges.cpp index 793487d04ab..b61be53b1db 100644 --- a/vpr/src/draw/draw_rr_edges.cpp +++ b/vpr/src/draw/draw_rr_edges.cpp @@ -281,10 +281,10 @@ void draw_chanx_to_chany_edge(RRNodeId chanx_node, RRNodeId chany_node, enum e_e void draw_pin_to_pin(RRNodeId opin_node, RRNodeId ipin_node, ezgl::renderer* g) { /* This routine draws an edge from the opin rr node to the ipin rr node */ - auto& device_ctx = g_vpr_ctx.device(); + const auto& device_ctx = g_vpr_ctx.device(); const auto& rr_graph = device_ctx.rr_graph; - VTR_ASSERT(rr_graph.node_type(opin_node) == OPIN); - VTR_ASSERT(rr_graph.node_type(ipin_node) == IPIN); + VTR_ASSERT(rr_graph.node_type(opin_node) == e_rr_type::OPIN); + VTR_ASSERT(rr_graph.node_type(ipin_node) == e_rr_type::IPIN); /* FIXME: May use a smarter strategy * Currently, we use the last side found for both OPIN and IPIN @@ -439,13 +439,13 @@ void draw_pin_to_chan_edge(RRNodeId pin_node, RRNodeId chan_node, ezgl::renderer pin_side = pin_candidate_sides[0]; } else { VTR_ASSERT(1 < pin_candidate_sides.size()); - if (CHANX == channel_type && rr_graph.node_ylow(pin_node) <= rr_graph.node_ylow(chan_node)) { + if (e_rr_type::CHANX == channel_type && rr_graph.node_ylow(pin_node) <= rr_graph.node_ylow(chan_node)) { pin_side = TOP; - } else if (CHANX == channel_type && rr_graph.node_ylow(pin_node) - 1 >= rr_graph.node_ylow(chan_node)) { + } else if (e_rr_type::CHANX == channel_type && rr_graph.node_ylow(pin_node) - 1 >= rr_graph.node_ylow(chan_node)) { pin_side = BOTTOM; - } else if (CHANY == channel_type && rr_graph.node_xlow(pin_node) <= rr_graph.node_xlow(chan_node)) { + } else if (e_rr_type::CHANY == channel_type && rr_graph.node_xlow(pin_node) <= rr_graph.node_xlow(chan_node)) { pin_side = RIGHT; - } else if (CHANY == channel_type && rr_graph.node_xlow(pin_node) - 1 >= rr_graph.node_xlow(chan_node)) { + } else if (e_rr_type::CHANY == channel_type && rr_graph.node_xlow(pin_node) - 1 >= rr_graph.node_xlow(chan_node)) { pin_side = LEFT; } /* The inferred side must be in the list of sides of the pin rr_node!!! */ @@ -494,7 +494,7 @@ void draw_pin_to_chan_edge(RRNodeId pin_node, RRNodeId chan_node, ezgl::renderer float x2 = 0, y2 = 0; const Direction chan_rr_direction = rr_graph.node_direction(chan_node); switch (channel_type) { - case CHANX: { + case e_rr_type::CHANX: { y1 += draw_pin_offset; y2 = chan_bbox.bottom(); x2 = x1; @@ -507,7 +507,7 @@ void draw_pin_to_chan_edge(RRNodeId pin_node, RRNodeId chan_node, ezgl::renderer } break; } - case CHANY: { + case e_rr_type::CHANY: { x1 += draw_pin_offset; x2 = chan_bbox.left(); y2 = y1; diff --git a/vpr/src/draw/draw_searchbar.cpp b/vpr/src/draw/draw_searchbar.cpp index 270435fe04f..28f174a50dd 100644 --- a/vpr/src/draw/draw_searchbar.cpp +++ b/vpr/src/draw/draw_searchbar.cpp @@ -38,7 +38,7 @@ ezgl::rectangle draw_get_rr_chan_bbox(RRNodeId inode) { const auto& rr_graph = device_ctx.rr_graph; switch (rr_graph.node_type(inode)) { - case CHANX: + case e_rr_type::CHANX: left = draw_coords->tile_x[rr_graph.node_xlow(inode)]; right = draw_coords->tile_x[rr_graph.node_xhigh(inode)] + draw_coords->get_tile_width(); @@ -49,7 +49,7 @@ ezgl::rectangle draw_get_rr_chan_bbox(RRNodeId inode) { + draw_coords->get_tile_width() + (1. + rr_graph.node_track_num(inode)); break; - case CHANY: + case e_rr_type::CHANY: left = draw_coords->tile_x[rr_graph.node_xlow(inode)] + draw_coords->get_tile_width() + (1. + rr_graph.node_track_num(inode)); diff --git a/vpr/src/draw/search_bar.cpp b/vpr/src/draw/search_bar.cpp index 9a93be2274d..46261da44d5 100644 --- a/vpr/src/draw/search_bar.cpp +++ b/vpr/src/draw/search_bar.cpp @@ -231,8 +231,8 @@ void auto_zoom_rr_node(RRNodeId rr_node_id) { // find the location of the node switch (rr_graph.node_type(rr_node_id)) { - case IPIN: - case OPIN: { + case e_rr_type::IPIN: + case e_rr_type::OPIN: { t_physical_tile_loc tile_loc = { rr_graph.node_xlow(rr_node_id), rr_graph.node_ylow(rr_node_id), @@ -253,8 +253,8 @@ void auto_zoom_rr_node(RRNodeId rr_node_id) { } break; } - case CHANX: - case CHANY: { + case e_rr_type::CHANX: + case e_rr_type::CHANY: { rr_node = draw_get_rr_chan_bbox(rr_node_id); break; } diff --git a/vpr/src/pack/post_routing_pb_pin_fixup.cpp b/vpr/src/pack/post_routing_pb_pin_fixup.cpp index d217f07a83d..e66958e1d44 100644 --- a/vpr/src/pack/post_routing_pb_pin_fixup.cpp +++ b/vpr/src/pack/post_routing_pb_pin_fixup.cpp @@ -126,15 +126,15 @@ static void update_cluster_pin_with_post_routing_results(const Netlist<>& net_li t_rr_type rr_node_type; if (pin_type == DRIVER) { - rr_node_type = OPIN; + rr_node_type = e_rr_type::OPIN; } else { VTR_ASSERT(pin_type == RECEIVER); - rr_node_type = IPIN; + rr_node_type = e_rr_type::IPIN; } std::vector pinloc_sides = find_physical_tile_pin_side(physical_tile, physical_pin); /* As some grid has height/width offset, we may not have the pin on any side */ - if (0 == pinloc_sides.size()) { + if (pinloc_sides.empty()) { continue; } @@ -752,7 +752,7 @@ static void update_cluster_regular_routing_traces_with_post_routing_results(Atom t_pb_graph_pin* new_sink_pb_pin_to_add = sink_pb_pin_to_add; VTR_ASSERT(is_single_fanout_pb_pin(const_cast(new_sink_pb_pin_to_add))); int new_driver_pb_pin = pb_graph_pin->pin_count_in_cluster; - while (1) { + while (true) { int new_sink_pb_route_id = new_sink_pb_pin_to_add->pin_count_in_cluster; new_pb_routes.insert(std::make_pair(new_sink_pb_route_id, t_pb_route())); new_pb_routes[new_sink_pb_route_id].atom_net_id = remapped_net; diff --git a/vpr/src/pack/sync_netlists_to_routing_flat.cpp b/vpr/src/pack/sync_netlists_to_routing_flat.cpp index 0e6be438300..cbde73d230a 100644 --- a/vpr/src/pack/sync_netlists_to_routing_flat.cpp +++ b/vpr/src/pack/sync_netlists_to_routing_flat.cpp @@ -100,7 +100,7 @@ static void get_intra_cluster_connections(const RouteTree& tree, std::vectorinode); - if ((type == IPIN || type == OPIN) && (parent_type == IPIN || parent_type == OPIN)) { + if ((type == t_rr_type::IPIN || type == t_rr_type::OPIN) && (parent_type == t_rr_type::IPIN || parent_type == t_rr_type::OPIN)) { auto clb = get_cluster_block_from_rr_node(node.inode); auto parent_clb = get_cluster_block_from_rr_node(parent->inode); if (clb == parent_clb) @@ -336,7 +336,7 @@ static void sync_clustered_netlist_to_routing(void) { int clb_nets_so_far = 0; for (auto& rt_node : tree->all_nodes()) { auto node_type = rr_graph.node_type(rt_node.inode); - if (node_type != IPIN && node_type != OPIN) + if (node_type != t_rr_type::IPIN && node_type != t_rr_type::OPIN) continue; auto physical_tile = device_ctx.grid.get_physical_type({rr_graph.node_xlow(rt_node.inode), @@ -353,7 +353,7 @@ static void sync_clustered_netlist_to_routing(void) { /* OPIN on the tile: create a new clb_net_id and add all ports & pins into here * Due to how the route tree is traversed, all nodes until the next OPIN on the tile will * be under this OPIN, so this is valid (we don't need to get the branch explicitly) */ - if (node_type == OPIN) { + if (node_type == t_rr_type::OPIN) { std::string net_name; net_name = atom_ctx.netlist().net_name(parent_net_id) + "_" + std::to_string(clb_nets_so_far); clb_net_id = clb_netlist.create_net(net_name); @@ -376,7 +376,7 @@ static void sync_clustered_netlist_to_routing(void) { VTR_ASSERT_MSG(false, "Unsupported port type"); port_id = clb_netlist.create_port(clb, pb_graph_pin->port->name, pb_graph_pin->port->num_pins, port_type); } - PinType pin_type = node_type == OPIN ? PinType::DRIVER : PinType::SINK; + PinType pin_type = node_type == t_rr_type::OPIN ? PinType::DRIVER : PinType::SINK; ClusterPinId new_pin = clb_netlist.create_pin(port_id, pb_graph_pin->pin_number, clb_net_id, pin_type, pb_graph_pin->pin_count_in_cluster); clb_netlist.set_pin_net(new_pin, pin_type, clb_net_id); diff --git a/vpr/src/place/delay_model/compute_delta_delays_utils.cpp b/vpr/src/place/delay_model/compute_delta_delays_utils.cpp index bb1232d2778..f75ac77bc42 100644 --- a/vpr/src/place/delay_model/compute_delta_delays_utils.cpp +++ b/vpr/src/place/delay_model/compute_delta_delays_utils.cpp @@ -532,7 +532,7 @@ static void generic_compute_matrix_dijkstra_expansion(RouterDelayProfiler& /*rou auto best_driver_ptcs = get_best_classes(DRIVER, device_ctx.grid.get_physical_type({source_x, source_y, from_layer_num})); for (int driver_ptc : best_driver_ptcs) { VTR_ASSERT(driver_ptc != OPEN); - RRNodeId source_rr_node = device_ctx.rr_graph.node_lookup().find_node(from_layer_num, source_x, source_y, SOURCE, driver_ptc); + RRNodeId source_rr_node = device_ctx.rr_graph.node_lookup().find_node(from_layer_num, source_x, source_y, t_rr_type::SOURCE, driver_ptc); VTR_ASSERT(source_rr_node != RRNodeId::INVALID()); auto delays = calculate_all_path_delays_from_rr_node(source_rr_node, router_opts, is_flat); @@ -566,7 +566,7 @@ static void generic_compute_matrix_dijkstra_expansion(RouterDelayProfiler& /*rou auto best_sink_ptcs = get_best_classes(RECEIVER, device_ctx.grid.get_physical_type({sink_x, sink_y, to_layer_num})); for (int sink_ptc : best_sink_ptcs) { VTR_ASSERT(sink_ptc != OPEN); - RRNodeId sink_rr_node = device_ctx.rr_graph.node_lookup().find_node(to_layer_num, sink_x, sink_y, SINK, sink_ptc); + RRNodeId sink_rr_node = device_ctx.rr_graph.node_lookup().find_node(to_layer_num, sink_x, sink_y, e_rr_type::SINK, sink_ptc); if (sink_rr_node == RRNodeId::INVALID()) continue; @@ -651,13 +651,13 @@ static float route_connection_delay(RouterDelayProfiler& route_profiler, for (int driver_ptc : best_driver_ptcs) { VTR_ASSERT(driver_ptc != OPEN); - RRNodeId source_rr_node = device_ctx.rr_graph.node_lookup().find_node(source_layer, source_x, source_y, SOURCE, driver_ptc); + RRNodeId source_rr_node = device_ctx.rr_graph.node_lookup().find_node(source_layer, source_x, source_y, t_rr_type::SOURCE, driver_ptc); VTR_ASSERT(source_rr_node != RRNodeId::INVALID()); for (int sink_ptc : best_sink_ptcs) { VTR_ASSERT(sink_ptc != OPEN); - RRNodeId sink_rr_node = device_ctx.rr_graph.node_lookup().find_node(sink_layer, sink_x, sink_y, SINK, sink_ptc); + RRNodeId sink_rr_node = device_ctx.rr_graph.node_lookup().find_node(sink_layer, sink_x, sink_y, e_rr_type::SINK, sink_ptc); if (sink_rr_node == RRNodeId::INVALID()) continue; @@ -846,10 +846,10 @@ bool find_direct_connect_sample_locations(const t_direct_inf* direct, //(with multi-width/height blocks pins may not exist at all locations) bool from_pin_found = false; if (direct->from_side != NUM_2D_SIDES) { - RRNodeId from_pin_rr = node_lookup.find_node(layer_num, x, y, OPIN, from_pin, direct->from_side); + RRNodeId from_pin_rr = node_lookup.find_node(layer_num, x, y, e_rr_type::OPIN, from_pin, direct->from_side); from_pin_found = from_pin_rr.is_valid(); } else { - from_pin_found = !(node_lookup.find_nodes_at_all_sides(layer_num, x, y, OPIN, from_pin).empty()); + from_pin_found = !(node_lookup.find_nodes_at_all_sides(layer_num, x, y, e_rr_type::OPIN, from_pin).empty()); } if (!from_pin_found) continue; @@ -862,10 +862,10 @@ bool find_direct_connect_sample_locations(const t_direct_inf* direct, //(with multi-width/height blocks pins may not exist at all locations) bool to_pin_found = false; if (direct->to_side != NUM_2D_SIDES) { - RRNodeId to_pin_rr = node_lookup.find_node(layer_num, to_x, to_y, IPIN, to_pin, direct->to_side); + RRNodeId to_pin_rr = node_lookup.find_node(layer_num, to_x, to_y, e_rr_type::IPIN, to_pin, direct->to_side); to_pin_found = (to_pin_rr != RRNodeId::INVALID()); } else { - to_pin_found = !(node_lookup.find_nodes_at_all_sides(layer_num, to_x, to_y, IPIN, to_pin).empty()); + to_pin_found = !(node_lookup.find_nodes_at_all_sides(layer_num, to_x, to_y, e_rr_type::IPIN, to_pin).empty()); } if (!to_pin_found) continue; @@ -903,13 +903,13 @@ bool find_direct_connect_sample_locations(const t_direct_inf* direct, // Find a source/sink RR node associated with the pins of the direct { - RRNodeId src_rr_candidate = node_lookup.find_node(found_layer_num, from_x, from_y, SOURCE, from_pin_class); + RRNodeId src_rr_candidate = node_lookup.find_node(found_layer_num, from_x, from_y, t_rr_type::SOURCE, from_pin_class); VTR_ASSERT(src_rr_candidate); out_src_node = src_rr_candidate; } { - RRNodeId sink_rr_candidate = node_lookup.find_node(found_layer_num, to_x, to_y, SINK, to_pin_class); + RRNodeId sink_rr_candidate = node_lookup.find_node(found_layer_num, to_x, to_y, e_rr_type::SINK, to_pin_class); VTR_ASSERT(sink_rr_candidate); out_sink_node = sink_rr_candidate; } diff --git a/vpr/src/place/place_macro.cpp b/vpr/src/place/place_macro.cpp index 4a8ccb62666..a52865bf918 100644 --- a/vpr/src/place/place_macro.cpp +++ b/vpr/src/place/place_macro.cpp @@ -211,7 +211,7 @@ int PlaceMacros::find_all_the_macro_(const ClusteredNetlist& clb_nlist, // Note that the restriction that constant nets are not driven from another direct ensures that // blocks in the middle of a chain with internal constant signals are not detected as potential // head blocks. - if (to_src_or_sink == SINK && to_idirect != OPEN + if (to_src_or_sink == (int)e_rr_type::SINK && to_idirect != OPEN && (to_net_id == ClusterNetId::INVALID() || (is_constant_clb_net(to_net_id, atom_lookup, atom_nlist) && !net_is_driven_by_direct_(to_net_id, clb_nlist)))) { for (int from_iblk_pin = 0; from_iblk_pin < num_blk_pins; from_iblk_pin++) { int from_physical_pin = get_physical_pin(physical_tile, logical_block, from_iblk_pin); @@ -224,7 +224,7 @@ int PlaceMacros::find_all_the_macro_(const ClusteredNetlist& clb_nlist, // // The output SOURCE (from_pin) of a true head macro will: // * drive another block with the same direct connection - if (from_src_or_sink == SOURCE && to_idirect == from_idirect && from_net_id != ClusterNetId::INVALID()) { + if (from_src_or_sink == (int)e_rr_type::SOURCE && to_idirect == from_idirect && from_net_id != ClusterNetId::INVALID()) { // Mark down that this is the first block in the macro pl_macro_member_blk_num_of_this_blk[0] = blk_id; pl_macro_idirect[num_macro] = to_idirect; @@ -249,7 +249,7 @@ int PlaceMacros::find_all_the_macro_(const ClusteredNetlist& clb_nlist, // Assume that the from_iblk_pin index is the same for the next block VTR_ASSERT(idirect_from_blk_pin_[physical_tile->index][from_physical_pin] == from_idirect - && direct_type_from_blk_pin_[physical_tile->index][from_physical_pin] == SOURCE); + && direct_type_from_blk_pin_[physical_tile->index][from_physical_pin] == (int)e_rr_type::SOURCE); next_net_id = clb_nlist.block_net(next_blk_id, from_iblk_pin); // Mark down this block as a member of the macro @@ -448,7 +448,7 @@ void PlaceMacros::alloc_and_load_idirect_from_blk_pin_(const std::vectornet_num == node_power->net_num) { next_node_power->selected_input = next_node_power->num_inputs; } @@ -875,12 +875,12 @@ static void power_usage_routing(t_power_usage* power_usage, const t_edge_size node_fan_in = rr_graph.node_fan_in(rr_id); switch (rr_graph.node_type(rr_id)) { - case SOURCE: - case SINK: - case OPIN: + case e_rr_type::SOURCE: + case e_rr_type::SINK: + case e_rr_type::OPIN: /* No power usage for these types */ break; - case IPIN: + case e_rr_type::IPIN: /* This is part of the connectionbox. The connection box is comprised of: * - Driver (accounted for at end of CHANX/Y - see below) * - Multiplexor */ @@ -901,8 +901,8 @@ static void power_usage_routing(t_power_usage* power_usage, POWER_COMPONENT_ROUTE_CB); } break; - case CHANX: - case CHANY: { + case e_rr_type::CHANX: + case e_rr_type::CHANY: { /* This is a wire driven by a switchbox, which includes: * - The Multiplexor at the beginning of the wire * - A buffer, after the mux to drive the wire @@ -912,9 +912,9 @@ static void power_usage_routing(t_power_usage* power_usage, VTR_ASSERT(node_power->in_prob); wire_length = 0; - if (rr_graph.node_type(rr_id) == CHANX) { + if (rr_graph.node_type(rr_id) == e_rr_type::CHANX) { wire_length = rr_graph.node_xhigh(rr_id) - rr_graph.node_xlow(rr_id) + 1; - } else if (rr_graph.node_type(rr_id) == CHANY) { + } else if (rr_graph.node_type(rr_id) == e_rr_type::CHANY) { wire_length = rr_graph.node_yhigh(rr_id) - rr_graph.node_ylow(rr_id) + 1; } int seg_index = device_ctx.rr_indexed_data[rr_graph.node_cost_index(rr_id)].seg_index; @@ -1219,7 +1219,7 @@ void power_routing_init(const t_det_routing_arch* routing_arch) { const t_edge_size node_fan_in = rr_graph.node_fan_in(rr_node_idx); switch (rr_graph.node_type(rr_node_idx)) { - case IPIN: + case e_rr_type::IPIN: max_IPIN_fanin = std::max(max_IPIN_fanin, node_fan_in); max_fanin = std::max(max_fanin, node_fan_in); @@ -1231,8 +1231,8 @@ void power_routing_init(const t_det_routing_arch* routing_arch) { } break; - case CHANX: - case CHANY: + case e_rr_type::CHANX: + case e_rr_type::CHANY: for (t_edge_size iedge = 0; iedge < rr_graph.num_edges(rr_node_idx); iedge++) { if (rr_graph.edge_switch(rr_node_idx, iedge) == routing_arch->wire_to_rr_ipin_switch) { fanout_to_IPIN++; @@ -1284,8 +1284,8 @@ void power_routing_init(const t_det_routing_arch* routing_arch) { for (const RRNodeId& rr_node_idx : device_ctx.rr_graph.nodes()) { switch (rr_graph.node_type(rr_node_idx)) { - case CHANX: - case CHANY: + case e_rr_type::CHANX: + case e_rr_type::CHANY: if (rr_graph.num_edges(rr_node_idx) > max_seg_fanout) { max_seg_fanout = rr_graph.num_edges(rr_node_idx); } @@ -1372,9 +1372,9 @@ bool power_uninit() { t_rr_node_power* node_power = &rr_node_power[(size_t)rr_id]; switch (rr_graph.node_type(rr_id)) { - case CHANX: - case CHANY: - case IPIN: + case e_rr_type::CHANX: + case e_rr_type::CHANY: + case e_rr_type::IPIN: delete[] node_power->in_dens; delete[] node_power->in_prob; break; diff --git a/vpr/src/route/annotate_routing.cpp b/vpr/src/route/annotate_routing.cpp index 6f20d2e873d..6a11000e0da 100644 --- a/vpr/src/route/annotate_routing.cpp +++ b/vpr/src/route/annotate_routing.cpp @@ -41,8 +41,8 @@ vtr::vector annotate_rr_node_nets(const ClusteringContex for (auto& rt_node : tree->all_nodes()) { const RRNodeId rr_node = rt_node.inode; /* Ignore source and sink nodes, they are the common node multiple starting and ending points */ - if ((SOURCE != rr_graph.node_type(rr_node)) - && (SINK != rr_graph.node_type(rr_node))) { + if ((t_rr_type::SOURCE != rr_graph.node_type(rr_node)) + && (t_rr_type::SINK != rr_graph.node_type(rr_node))) { /* Sanity check: ensure we do not revoke any net mapping * In some routing architectures, node capacity is more than 1 * which allows a node to be mapped by multiple nets diff --git a/vpr/src/route/build_switchblocks.cpp b/vpr/src/route/build_switchblocks.cpp index a0dbe35bb1c..487f3f6d640 100644 --- a/vpr/src/route/build_switchblocks.cpp +++ b/vpr/src/route/build_switchblocks.cpp @@ -680,7 +680,7 @@ static void get_switchpoint_wires( std::vector& collected_wire_switchpoints = *scratch_wires; int seg_coord = x; - if (chan_type == CHANY) { + if (chan_type == e_rr_type::CHANY) { seg_coord = y; } @@ -807,10 +807,10 @@ static void compute_wire_connections(int x_coord, const t_wire_type_sizes* wire_type_sizes_from = wire_type_sizes_x; const t_wire_type_sizes* wire_type_sizes_to = wire_type_sizes_x; - if (from_chan_type == CHANY) { + if (from_chan_type == e_rr_type::CHANY) { wire_type_sizes_from = wire_type_sizes_y; } - if (to_chan_type == CHANY) { + if (to_chan_type == e_rr_type::CHANY) { wire_type_sizes_to = wire_type_sizes_y; } @@ -1025,7 +1025,7 @@ static int evaluate_num_conns_formula(t_wireconn_scratchpad* scratchpad, std::st } static const t_chan_details& index_into_correct_chan(int tile_x, int tile_y, int tile_layer, enum e_side src_side, enum e_side dest_side, const t_chan_details& chan_details_x, const t_chan_details& chan_details_y, int& chan_x, int& chan_y, int& chan_layer, t_rr_type& chan_type) { - chan_type = CHANX; + chan_type = e_rr_type::CHANX; /* here we use the VPR convention that a tile 'owns' the channels directly to the right * and above it */ switch (src_side) { @@ -1034,7 +1034,7 @@ static const t_chan_details& index_into_correct_chan(int tile_x, int tile_y, int chan_x = tile_x; chan_y = tile_y + 1; chan_layer = tile_layer; - chan_type = CHANY; + chan_type = e_rr_type::CHANY; return chan_details_y; break; case RIGHT: @@ -1042,14 +1042,14 @@ static const t_chan_details& index_into_correct_chan(int tile_x, int tile_y, int chan_x = tile_x + 1; chan_y = tile_y; chan_layer = tile_layer; - chan_type = CHANX; + chan_type = e_rr_type::CHANX; return chan_details_x; break; case BOTTOM: /* this is y-channel on the right of the tile in the same layer */ chan_x = tile_x; chan_y = tile_y; - chan_type = CHANY; + chan_type = e_rr_type::CHANY; chan_layer = tile_layer; return chan_details_y; break; @@ -1057,7 +1057,7 @@ static const t_chan_details& index_into_correct_chan(int tile_x, int tile_y, int /* this is x-channel on top of the tile in the same layer*/ chan_x = tile_x; chan_y = tile_y; - chan_type = CHANX; + chan_type = e_rr_type::CHANX; chan_layer = tile_layer; return chan_details_x; break; @@ -1066,7 +1066,7 @@ static const t_chan_details& index_into_correct_chan(int tile_x, int tile_y, int chan_x = tile_x; chan_y = tile_y; chan_layer = tile_layer + 1; - chan_type = (dest_side == RIGHT || dest_side == LEFT) ? CHANX : CHANY; + chan_type = (dest_side == RIGHT || dest_side == LEFT) ? e_rr_type::CHANX : e_rr_type::CHANY; return (dest_side == RIGHT || dest_side == LEFT) ? chan_details_x : chan_details_y; break; case UNDER: @@ -1074,7 +1074,7 @@ static const t_chan_details& index_into_correct_chan(int tile_x, int tile_y, int chan_x = tile_x; chan_y = tile_y; chan_layer = tile_layer - 1; - chan_type = (dest_side == RIGHT || dest_side == LEFT) ? CHANX : CHANY; + chan_type = (dest_side == RIGHT || dest_side == LEFT) ? e_rr_type::CHANX : e_rr_type::CHANY; return (dest_side == RIGHT || dest_side == LEFT) ? chan_details_x : chan_details_y; break; default: @@ -1093,14 +1093,14 @@ static bool coords_out_of_bounds(const DeviceGrid& grid, int x_coord, int y_coor return result; } - if (CHANX == chan_type) { + if (e_rr_type::CHANX == chan_type) { /* there is no x-channel at x=0 */ if (x_coord <= 0 || x_coord >= int(grid.width()) - 1 || y_coord < 0 || y_coord >= int(grid.height()) - 1) { result = true; } else { result = false; } - } else if (CHANY == chan_type) { + } else if (e_rr_type::CHANY == chan_type) { /* there is no y-channel at y=0 */ if (x_coord < 0 || x_coord >= int(grid.width()) - 1 || y_coord <= 0 || y_coord >= int(grid.height()) - 1) { result = true; @@ -1161,7 +1161,7 @@ int get_wire_segment_length(const DeviceGrid& grid, e_rr_type chan_type, const t int min_seg = 1; int max_seg = grid.width() - 2; //-2 for no perim channels - if (chan_type == CHANY) { + if (chan_type == e_rr_type::CHANY) { max_seg = grid.height() - 2; //-2 for no perim channels } @@ -1194,7 +1194,7 @@ static int get_switchpoint_of_wire(const DeviceGrid& grid, e_rr_type chan_type, /* get the minimum and maximum segment coordinate which a wire in this channel type can take */ int min_seg = 1; int max_seg = grid.width() - 2; //-2 for no perim channels - if (chan_type == CHANY) { + if (chan_type == e_rr_type::CHANY) { max_seg = grid.height() - 2; //-2 for no perim channels } diff --git a/vpr/src/route/channel_stats.cpp b/vpr/src/route/channel_stats.cpp index f95275db9f4..e0f1483d456 100644 --- a/vpr/src/route/channel_stats.cpp +++ b/vpr/src/route/channel_stats.cpp @@ -4,9 +4,9 @@ #include "globals.h" void print_channel_stats(bool is_flat) { - std::vector histogram; + const auto& device_ctx = g_vpr_ctx.device(); - auto& device_ctx = g_vpr_ctx.device(); + std::vector histogram; //Bins by 10%, with final > 1 bin histogram.emplace_back(0., 0.1); @@ -20,11 +20,11 @@ void print_channel_stats(bool is_flat) { histogram.emplace_back(0.9, 1.0); histogram.emplace_back(1.0, std::numeric_limits::infinity()); - auto chanx_usage = calculate_routing_usage(CHANX, is_flat, true); - auto chany_usage = calculate_routing_usage(CHANY, is_flat, true); + auto chanx_usage = calculate_routing_usage(e_rr_type::CHANX, is_flat, true); + auto chany_usage = calculate_routing_usage(e_rr_type::CHANY, is_flat, true); - auto chanx_avail = calculate_routing_avail(CHANX); - auto chany_avail = calculate_routing_avail(CHANY); + auto chanx_avail = calculate_routing_avail(e_rr_type::CHANX); + auto chany_avail = calculate_routing_avail(e_rr_type::CHANY); auto comp = [](const HistogramBucket& bucket, float value) { return bucket.max_value < value; diff --git a/vpr/src/route/check_route.cpp b/vpr/src/route/check_route.cpp index 096a87c787d..4cd58651181 100644 --- a/vpr/src/route/check_route.cpp +++ b/vpr/src/route/check_route.cpp @@ -100,7 +100,7 @@ void check_route(const Netlist<>& net_list, recompute_occupancy_from_scratch(net_list, is_flat); const bool valid = feasible_routing(); - if (valid == false) { + if (!valid) { VPR_ERROR(VPR_ERROR_ROUTE, "Error in check_route -- routing resources are overused.\n"); } @@ -157,7 +157,7 @@ void check_route(const Netlist<>& net_list, } } - if (rr_graph.node_type(inode) == SINK) { + if (rr_graph.node_type(inode) == t_rr_type::SINK) { check_sink(net_list, inode, net_pin_index, net_id, pin_done.get()); num_sinks += 1; } @@ -171,7 +171,7 @@ void check_route(const Netlist<>& net_list, } for (size_t ipin = 0; ipin < net_list.net_pins(net_id).size(); ipin++) { - if (pin_done[ipin] == false) { + if (!pin_done[ipin]) { VPR_FATAL_ERROR(VPR_ERROR_ROUTE, "in check_route: net %zu does not connect to pin %d.\n", size_t(net_id), ipin); } @@ -200,7 +200,7 @@ static void check_sink(const Netlist<>& net_list, auto& device_ctx = g_vpr_ctx.device(); const auto& rr_graph = device_ctx.rr_graph; - VTR_ASSERT(rr_graph.node_type(inode) == SINK); + VTR_ASSERT(rr_graph.node_type(inode) == t_rr_type::SINK); if (net_pin_index == OPEN) { /* If there is no legal net pin index associated with this sink node */ VPR_FATAL_ERROR(VPR_ERROR_ROUTE, @@ -223,7 +223,7 @@ static void check_source(const Netlist<>& net_list, const auto& rr_graph = device_ctx.rr_graph; t_rr_type rr_type = rr_graph.node_type(inode); - if (rr_type != SOURCE) { + if (rr_type != t_rr_type::SOURCE) { VPR_FATAL_ERROR(VPR_ERROR_ROUTE, "in check_source: net %d begins with a node of type %d.\n", size_t(net_id), rr_type); } @@ -319,7 +319,7 @@ static bool check_adjacent(RRNodeId from_node, RRNodeId to_node, bool is_flat) { // If to_node is a SINK, it could be anywhere within its containing device grid tile, and it is reasonable for // any input pins or within-cluster pins to reach it. Hence, treat its size as that of its containing tile. - if (to_type == SINK) { + if (to_type == t_rr_type::SINK) { vtr::Rect tile_bb = device_ctx.grid.get_tile_bb({to_xlow, to_ylow, to_layer}); to_xlow = tile_bb.xmin(); @@ -331,8 +331,8 @@ static bool check_adjacent(RRNodeId from_node, RRNodeId to_node, bool is_flat) { // Layer numbers are should not be more than one layer apart for connected nodes VTR_ASSERT(abs(from_layer - to_layer) <= 1); switch (from_type) { - case SOURCE: - VTR_ASSERT(to_type == OPIN); + case t_rr_type::SOURCE: + VTR_ASSERT(to_type == t_rr_type::OPIN); //The OPIN should be contained within the bounding box of it's connected source if (from_xlow <= to_xlow @@ -349,34 +349,34 @@ static bool check_adjacent(RRNodeId from_node, RRNodeId to_node, bool is_flat) { } break; - case SINK: + case t_rr_type::SINK: /* SINKS are adjacent to not connected */ break; - case OPIN: + case t_rr_type::OPIN: from_grid_type = device_ctx.grid.get_physical_type({from_xlow, from_ylow, from_layer}); - if (to_type == CHANX || to_type == CHANY) { + if (to_type == t_rr_type::CHANX || to_type == t_rr_type::CHANY) { num_adj += 1; //adjacent } else if (is_flat) { - VTR_ASSERT(to_type == OPIN || to_type == IPIN); // If pin is located inside a cluster + VTR_ASSERT(to_type == t_rr_type::OPIN || to_type == t_rr_type::IPIN); // If pin is located inside a cluster return true; } else { - VTR_ASSERT(to_type == IPIN); /* direct OPIN to IPIN connections not necessarily adjacent */ - return true; /* Special case, direct OPIN to IPIN connections need not be adjacent */ + VTR_ASSERT(to_type == t_rr_type::IPIN); /* direct OPIN to IPIN connections not necessarily adjacent */ + return true; /* Special case, direct OPIN to IPIN connections need not be adjacent */ } break; - case IPIN: + case t_rr_type::IPIN: from_grid_type = device_ctx.grid.get_physical_type({from_xlow, from_ylow, from_layer}); if (is_flat) { - VTR_ASSERT(to_type == OPIN || to_type == IPIN || to_type == SINK); + VTR_ASSERT(to_type == t_rr_type::OPIN || to_type == t_rr_type::IPIN || to_type == t_rr_type::SINK); } else { - VTR_ASSERT(to_type == SINK); + VTR_ASSERT(to_type == t_rr_type::SINK); } //An IPIN should be contained within the bounding box of its connected sink's tile - if (to_type == SINK) { + if (to_type == t_rr_type::SINK) { if (from_xlow >= to_xlow && from_ylow >= to_ylow && from_xhigh <= to_xhigh @@ -403,10 +403,10 @@ static bool check_adjacent(RRNodeId from_node, RRNodeId to_node, bool is_flat) { } break; - case CHANX: - if (to_type == IPIN) { + case t_rr_type::CHANX: + if (to_type == e_rr_type::IPIN) { num_adj += 1; //adjacent - } else if (to_type == CHANX) { + } else if (to_type == t_rr_type::CHANX) { from_xhigh = rr_graph.node_xhigh(from_node); to_xhigh = rr_graph.node_xhigh(to_node); if (from_ylow == to_ylow) { @@ -428,7 +428,7 @@ static bool check_adjacent(RRNodeId from_node, RRNodeId to_node, bool is_flat) { } /* UDSD Modification by WMF End */ } - } else if (to_type == CHANY) { + } else if (to_type == t_rr_type::CHANY) { num_adj += chanx_chany_adjacent(from_node, to_node); } else { VPR_FATAL_ERROR(VPR_ERROR_ROUTE, @@ -436,10 +436,10 @@ static bool check_adjacent(RRNodeId from_node, RRNodeId to_node, bool is_flat) { } break; - case CHANY: - if (to_type == IPIN) { + case t_rr_type::CHANY: + if (to_type == e_rr_type::IPIN) { num_adj += 1; //adjacent - } else if (to_type == CHANY) { + } else if (to_type == t_rr_type::CHANY) { from_yhigh = rr_graph.node_yhigh(from_node); to_yhigh = rr_graph.node_yhigh(to_node); if (from_xlow == to_xlow) { @@ -460,7 +460,7 @@ static bool check_adjacent(RRNodeId from_node, RRNodeId to_node, bool is_flat) { } /* UDSD Modification by WMF End */ } - } else if (to_type == CHANX) { + } else if (to_type == t_rr_type::CHANX) { num_adj += chanx_chany_adjacent(to_node, from_node); } else { VPR_FATAL_ERROR(VPR_ERROR_ROUTE, @@ -571,7 +571,7 @@ static void check_locally_used_clb_opins(const t_clb_opins_used& clb_opins_used_ /* Now check that node is an OPIN of the right type. */ rr_type = rr_graph.node_type(RRNodeId(inode)); - if (rr_type != OPIN) { + if (rr_type != t_rr_type::OPIN) { VPR_FATAL_ERROR(VPR_ERROR_ROUTE, "in check_locally_used_opins: block #%lu (%s)\n" "\tClass %d local OPIN is wrong rr_type -- rr_node #%d of type %d.\n", @@ -883,7 +883,7 @@ bool StubFinder::RecurseTree(const RouteTreeNode& rt_node) { if (rt_node.is_leaf()) { //If a leaf of the route tree is not a SINK, then it is a stub - if (rr_graph.node_type(rt_node.inode) != SINK) { + if (rr_graph.node_type(rt_node.inode) != t_rr_type::SINK) { return true; //It is the current root of this stub } else { return false; diff --git a/vpr/src/route/clock_connection_builders.cpp b/vpr/src/route/clock_connection_builders.cpp index 5a193a159ad..5a2455bdaa1 100644 --- a/vpr/src/route/clock_connection_builders.cpp +++ b/vpr/src/route/clock_connection_builders.cpp @@ -5,18 +5,19 @@ #include "rr_rc_data.h" #include -#include +#include +#include /* * RoutingToClockConnection (setters) */ void RoutingToClockConnection::set_clock_name_to_connect_to(std::string clock_name) { - clock_to_connect_to = clock_name; + clock_to_connect_to = std::move(clock_name); } void RoutingToClockConnection::set_clock_switch_point_name(std::string clock_switch_point_name) { - switch_point_name = clock_switch_point_name; + switch_point_name = std::move(clock_switch_point_name); } void RoutingToClockConnection::set_switch_location(int x, int y, int layer /* =0 */) { @@ -57,8 +58,8 @@ void RoutingToClockConnection::create_switches(const ClockRRGraphBuilder& clock_ rr_graph_builder.set_virtual_clock_network_root_idx(virtual_clock_network_root_idx); // rr_node indices for x and y channel routing wires and clock wires to connect to - auto x_wire_indices = node_lookup.find_channel_nodes(switch_location.layer, switch_location.x, switch_location.y, CHANX); - auto y_wire_indices = node_lookup.find_channel_nodes(switch_location.layer, switch_location.x, switch_location.y, CHANY); + auto x_wire_indices = node_lookup.find_channel_nodes(switch_location.layer, switch_location.x, switch_location.y, e_rr_type::CHANX); + auto y_wire_indices = node_lookup.find_channel_nodes(switch_location.layer, switch_location.x, switch_location.y, e_rr_type::CHANY); auto clock_indices = clock_graph.get_rr_node_indices_at_switch_location( clock_to_connect_to, switch_point_name, switch_location.x, switch_location.y); @@ -96,7 +97,7 @@ RRNodeId RoutingToClockConnection::create_virtual_clock_network_sink_node(int la RRNodeId node_index = RRNodeId(rr_graph.num_nodes() - 1); //Determine a valid PTC - std::vector nodes_at_loc = node_lookup.find_grid_nodes_at_all_sides(layer, x, y, SINK); + std::vector nodes_at_loc = node_lookup.find_grid_nodes_at_all_sides(layer, x, y, e_rr_type::SINK); int max_ptc = 0; for (RRNodeId inode : nodes_at_loc) { @@ -104,7 +105,7 @@ RRNodeId RoutingToClockConnection::create_virtual_clock_network_sink_node(int la } int ptc = max_ptc + 1; - rr_graph_builder.set_node_type(node_index, SINK); + rr_graph_builder.set_node_type(node_index, e_rr_type::SINK); rr_graph_builder.set_node_name(node_index, arch->default_clock_network_name); rr_graph_builder.set_node_class_num(node_index, ptc); rr_graph_builder.set_node_coordinates(node_index, x, y, x, y); @@ -309,7 +310,7 @@ void ClockToPinsConnection::create_switches(const ClockRRGraphBuilder& clock_gra auto clock_pin_node_idx = node_lookup.find_node(layer_num, x, y, - IPIN, + e_rr_type::IPIN, clock_pin_idx, side); diff --git a/vpr/src/route/clock_network_builders.cpp b/vpr/src/route/clock_network_builders.cpp index 34dccc4ff29..9347cf28cd4 100644 --- a/vpr/src/route/clock_network_builders.cpp +++ b/vpr/src/route/clock_network_builders.cpp @@ -340,7 +340,7 @@ int ClockRib::create_chanx_wire(int layer, auto node_index = rr_nodes->size() - 1; RRNodeId chanx_node = RRNodeId(node_index); - rr_graph_builder.set_node_type(chanx_node, CHANX); + rr_graph_builder.set_node_type(chanx_node, e_rr_type::CHANX); rr_graph_builder.set_node_coordinates(chanx_node, x_start, y, x_end, y); rr_graph_builder.set_node_layer(chanx_node, layer); rr_graph_builder.set_node_capacity(chanx_node, 1); @@ -682,7 +682,7 @@ int ClockSpine::create_chany_wire(int layer, auto node_index = rr_nodes->size() - 1; RRNodeId chany_node = RRNodeId(node_index); - rr_graph_builder.set_node_type(chany_node, CHANY); + rr_graph_builder.set_node_type(chany_node, e_rr_type::CHANY); rr_graph_builder.set_node_coordinates(chany_node, x, y_start, x, y_end); rr_graph_builder.set_node_layer(chany_node, layer); rr_graph_builder.set_node_capacity(chany_node, 1); diff --git a/vpr/src/route/connection_router.cpp b/vpr/src/route/connection_router.cpp index ee80073c3c6..76ec6e85a54 100644 --- a/vpr/src/route/connection_router.cpp +++ b/vpr/src/route/connection_router.cpp @@ -196,7 +196,7 @@ void ConnectionRouter::timing_driven_route_connection_from_heap(RRNodeId s VTR_ASSERT_SAFE(sink_node != RRNodeId::INVALID()); t_bb target_bb; - if (rr_graph_->node_type(sink_node) == SINK) { // We need to get a bounding box for the sink's entire tile + if (rr_graph_->node_type(sink_node) == t_rr_type::SINK) { // We need to get a bounding box for the sink's entire tile vtr::Rect tile_bb = grid_.get_tile_bb({rr_graph_->node_xlow(sink_node), rr_graph_->node_ylow(sink_node), rr_graph_->node_layer(sink_node)}); @@ -477,7 +477,7 @@ void ConnectionRouter::timing_driven_expand_neighbour(const RTExploredNode * Change this if you want to investigate route-throughs. */ if (target_node != RRNodeId::INVALID()) { t_rr_type to_type = rr_graph_->node_type(to_node); - if (to_type == IPIN) { + if (to_type == t_rr_type::IPIN) { // Check if this IPIN leads to the target block // IPIN's of the target block should be contained within it's bounding box int to_xlow = rr_graph_->node_xlow(to_node); @@ -758,7 +758,7 @@ void ConnectionRouter::evaluate_timing_driven_node_costs(RTExploredNode* t //cost. cong_cost = 0.; } - if (conn_params_->router_opt_choke_points_ && is_flat_ && rr_graph_->node_type(to->index) == IPIN) { + if (conn_params_->router_opt_choke_points_ && is_flat_ && rr_graph_->node_type(to->index) == t_rr_type::IPIN) { auto find_res = conn_params_->connection_choking_spots_.find(to->index); if (find_res != conn_params_->connection_choking_spots_.end()) { cong_cost = cong_cost / pow(2, (float)find_res->second); @@ -772,7 +772,7 @@ void ConnectionRouter::evaluate_timing_driven_node_costs(RTExploredNode* t if (cost_params.bend_cost != 0.) { t_rr_type from_type = rr_graph_->node_type(from_node); t_rr_type to_type = rr_graph_->node_type(to->index); - if ((from_type == CHANX && to_type == CHANY) || (from_type == CHANY && to_type == CHANX)) { + if ((from_type == t_rr_type::CHANX && to_type == t_rr_type::CHANY) || (from_type == t_rr_type::CHANY && to_type == t_rr_type::CHANX)) { to->backward_path_cost += cost_params.bend_cost; //Bend cost } } @@ -911,7 +911,7 @@ void ConnectionRouter::add_route_tree_node_to_heap( rr_graph_); if constexpr (VTR_ENABLE_DEBUG_LOGGING_CONST_EXPR) { - router_stats_->rt_node_pushes[rr_graph_->node_type(inode)]++; + router_stats_->rt_node_pushes[(size_t)rr_graph_->node_type(inode)]++; } } @@ -1012,7 +1012,7 @@ t_bb ConnectionRouter::add_high_fanout_route_tree_to_heap( // Expand HF BB to include the node (clip by original BB) expand_highfanout_bounding_box(highfanout_bb, net_bounding_box, rr_node_to_add, rr_graph_); - if (rr_graph_->node_type(rr_node_to_add) == CHANY || rr_graph_->node_type(rr_node_to_add) == CHANX) { + if (rr_graph_->node_type(rr_node_to_add) == t_rr_type::CHANY || rr_graph_->node_type(rr_node_to_add) == t_rr_type::CHANX) { chan_nodes_added++; } } @@ -1047,7 +1047,7 @@ static inline bool relevant_node_to_target(const RRGraphView* rr_graph, RRNodeId target_node) { VTR_ASSERT_SAFE(rr_graph->node_type(target_node) == t_rr_type::SINK); auto node_to_add_type = rr_graph->node_type(node_to_add); - return node_to_add_type != t_rr_type::IPIN || node_in_same_physical_tile(node_to_add, target_node); + return node_to_add_type != e_rr_type::IPIN || node_in_same_physical_tile(node_to_add, target_node); } static inline void update_router_stats(RouterStats* router_stats, @@ -1062,23 +1062,23 @@ static inline void update_router_stats(RouterStats* router_stats, if constexpr (VTR_ENABLE_DEBUG_LOGGING_CONST_EXPR) { auto node_type = rr_graph->node_type(rr_node_id); - VTR_ASSERT(node_type != NUM_RR_TYPES); + VTR_ASSERT(node_type != t_rr_type::NUM_RR_TYPES); if (is_inter_cluster_node(*rr_graph, rr_node_id)) { if (is_push) { router_stats->inter_cluster_node_pushes++; - router_stats->inter_cluster_node_type_cnt_pushes[node_type]++; + router_stats->inter_cluster_node_type_cnt_pushes[(size_t)node_type]++; } else { router_stats->inter_cluster_node_pops++; - router_stats->inter_cluster_node_type_cnt_pops[node_type]++; + router_stats->inter_cluster_node_type_cnt_pops[(size_t)node_type]++; } } else { if (is_push) { router_stats->intra_cluster_node_pushes++; - router_stats->intra_cluster_node_type_cnt_pushes[node_type]++; + router_stats->intra_cluster_node_type_cnt_pushes[(size_t)node_type]++; } else { router_stats->intra_cluster_node_pops++; - router_stats->intra_cluster_node_type_cnt_pops[node_type]++; + router_stats->intra_cluster_node_type_cnt_pops[(size_t)node_type]++; } } } diff --git a/vpr/src/route/overuse_report.cpp b/vpr/src/route/overuse_report.cpp index 92c421eccbd..86773a32445 100644 --- a/vpr/src/route/overuse_report.cpp +++ b/vpr/src/route/overuse_report.cpp @@ -130,8 +130,8 @@ void report_overused_nodes(const Netlist<>& net_list, int y = rr_graph.node_ylow(node_id); int layer_num = rr_graph.node_layer(node_id); switch (node_type) { - case IPIN: - case OPIN: + case t_rr_type::IPIN: + case e_rr_type::OPIN: report_overused_ipin_opin(os, node_id, rr_node_to_net_map); @@ -139,12 +139,12 @@ void report_overused_nodes(const Netlist<>& net_list, x -= g_vpr_ctx.device().grid.get_physical_type({x, y, layer_num})->width; y -= g_vpr_ctx.device().grid.get_physical_type({x, y, layer_num})->width; break; - case CHANX: - case CHANY: + case t_rr_type::CHANX: + case t_rr_type::CHANY: report_overused_chanx_chany(os, node_id); break; - case SOURCE: - case SINK: + case t_rr_type::SOURCE: + case t_rr_type::SINK: report_overused_source_sink(os, node_id); report_sinks = true; break; diff --git a/vpr/src/route/route.cpp b/vpr/src/route/route.cpp index 2c077f0c8a8..0712bb1f738 100644 --- a/vpr/src/route/route.cpp +++ b/vpr/src/route/route.cpp @@ -618,7 +618,7 @@ bool route(const Netlist<>& net_list, "total_internal_heap_pushes: %zu total_internal_heap_pops: %zu total_external_heap_pushes: %zu total_external_heap_pops: %zu ", router_stats.intra_cluster_node_pushes, router_stats.intra_cluster_node_pops, router_stats.inter_cluster_node_pushes, router_stats.inter_cluster_node_pops); - for (int node_type_idx = 0; node_type_idx < t_rr_type::NUM_RR_TYPES; node_type_idx++) { + for (int node_type_idx = 0; node_type_idx < (int)t_rr_type::NUM_RR_TYPES; node_type_idx++) { VTR_LOG("total_external_%s_pushes: %zu ", rr_node_typename[node_type_idx], router_stats.inter_cluster_node_type_cnt_pushes[node_type_idx]); VTR_LOG("total_external_%s_pops: %zu ", rr_node_typename[node_type_idx], router_stats.inter_cluster_node_type_cnt_pops[node_type_idx]); VTR_LOG("total_internal_%s_pushes: %zu ", rr_node_typename[node_type_idx], router_stats.intra_cluster_node_type_cnt_pushes[node_type_idx]); diff --git a/vpr/src/route/route_common.cpp b/vpr/src/route/route_common.cpp index 3b720c5d76f..038b6aee6f2 100644 --- a/vpr/src/route/route_common.cpp +++ b/vpr/src/route/route_common.cpp @@ -98,13 +98,11 @@ void restore_routing(vtr::vector>& best_ro * Use this number as a routing serial number to ensure that programming * * changes do not break the router. */ void get_serial_num(const Netlist<>& net_list) { - int serial_num; - - auto& route_ctx = g_vpr_ctx.routing(); - auto& device_ctx = g_vpr_ctx.device(); + const auto& route_ctx = g_vpr_ctx.routing(); + const auto& device_ctx = g_vpr_ctx.device(); const auto& rr_graph = device_ctx.rr_graph; - serial_num = 0; + int serial_num = 0; for (auto net_id : net_list.nets()) { if (!route_ctx.route_trees[net_id]) @@ -117,7 +115,7 @@ void get_serial_num(const Netlist<>& net_list) { serial_num -= rr_graph.node_ptc_num(inode) * (size_t(net_id) + 1) * 10; - serial_num -= rr_graph.node_type(inode) * (size_t(net_id) + 1) * 100; + serial_num -= (size_t)rr_graph.node_type(inode) * (size_t(net_id) + 1) * 100; serial_num %= 2000000000; /* Prevent overflow */ } } @@ -465,7 +463,7 @@ static vtr::vector> load_net_rr_terminals(con inode = rr_graph.node_lookup().find_node(blk_loc.loc.layer, blk_loc.loc.x, blk_loc.loc.y, - SOURCE, + e_rr_type::SOURCE, iclass); } else { vtr::Rect tile_bb = grid.get_tile_bb({blk_loc.loc.x, @@ -476,7 +474,7 @@ static vtr::vector> load_net_rr_terminals(con tile_bb.ymin(), tile_bb.xmax(), tile_bb.ymax(), - SINK, + t_rr_type::SINK, iclass); VTR_ASSERT_SAFE(sink_nodes.size() == 1); inode = sink_nodes[0]; @@ -583,10 +581,10 @@ static vtr::vector> load_rr_clb_sources(con blk_loc = get_block_loc(blk_id, is_flat); auto class_type = get_class_type_from_class_physical_num(type, iclass); if (class_type == DRIVER) { - rr_type = SOURCE; + rr_type = e_rr_type::SOURCE; } else { VTR_ASSERT(class_type == RECEIVER); - rr_type = SINK; + rr_type = e_rr_type::SINK; } RRNodeId inode = rr_graph.node_lookup().find_node(blk_loc.loc.layer, @@ -706,7 +704,7 @@ t_bb load_net_route_bb(const Netlist<>& net_list, bb_factor = std::min(bb_factor, max_dim); RRNodeId driver_rr = RRNodeId(route_ctx.net_rr_terminals[net_id][0]); - VTR_ASSERT(rr_graph.node_type(driver_rr) == SOURCE); + VTR_ASSERT(rr_graph.node_type(driver_rr) == e_rr_type::SOURCE); VTR_ASSERT(rr_graph.node_xlow(driver_rr) <= rr_graph.node_xhigh(driver_rr)); VTR_ASSERT(rr_graph.node_ylow(driver_rr) <= rr_graph.node_yhigh(driver_rr)); @@ -721,7 +719,7 @@ t_bb load_net_route_bb(const Netlist<>& net_list, auto net_sinks = net_list.net_sinks(net_id); for (size_t ipin = 1; ipin < net_sinks.size() + 1; ++ipin) { //Start at 1 since looping through sinks RRNodeId sink_rr = RRNodeId(route_ctx.net_rr_terminals[net_id][ipin]); - VTR_ASSERT(rr_graph.node_type(sink_rr) == SINK); + VTR_ASSERT(rr_graph.node_type(sink_rr) == e_rr_type::SINK); VTR_ASSERT(rr_graph.node_xlow(sink_rr) <= rr_graph.node_xhigh(sink_rr)); VTR_ASSERT(rr_graph.node_ylow(sink_rr) <= rr_graph.node_yhigh(sink_rr)); @@ -842,7 +840,7 @@ void reserve_locally_used_opins(HeapInterface* heap, float pres_fac, float acc_f for (iconn = 0; iconn < num_edges; iconn++) { RRNodeId to_node = rr_graph.edge_sink_node(RRNodeId(from_node), iconn); - VTR_ASSERT(rr_graph.node_type(RRNodeId(to_node)) == OPIN); + VTR_ASSERT(rr_graph.node_type(RRNodeId(to_node)) == e_rr_type::OPIN); //Add the OPIN to the heap according to it's congestion cost cost = get_rr_cong_cost(to_node, pres_fac); @@ -857,7 +855,7 @@ void reserve_locally_used_opins(HeapInterface* heap, float pres_fac, float acc_f VTR_ASSERT(heap->try_pop(heap_head_node)); const RRNodeId& inode = heap_head_node.node; - VTR_ASSERT(rr_graph.node_type(inode) == OPIN); + VTR_ASSERT(rr_graph.node_type(inode) == e_rr_type::OPIN); adjust_one_rr_occ_and_acc_cost(inode, 1, acc_fac); route_ctx.clb_opins_used_locally[blk_id][iclass][ipin] = inode; diff --git a/vpr/src/route/route_net.cpp b/vpr/src/route/route_net.cpp index b8ba1227322..7f032b0dcca 100644 --- a/vpr/src/route/route_net.cpp +++ b/vpr/src/route/route_net.cpp @@ -229,7 +229,7 @@ size_t calculate_wirelength_available() { // But really what's happening is that this for loop iterates over every node and determines the available wirelength for (const RRNodeId& rr_id : device_ctx.rr_graph.nodes()) { const t_rr_type channel_type = rr_graph.node_type(rr_id); - if (channel_type == CHANX || channel_type == CHANY) { + if (channel_type == e_rr_type::CHANX || channel_type == e_rr_type::CHANY) { available_wirelength += rr_graph.node_capacity(rr_id) * rr_graph.node_length(rr_id); } } diff --git a/vpr/src/route/route_profiling.cpp b/vpr/src/route/route_profiling.cpp index 7ae6f7c813e..dffa3f59446 100644 --- a/vpr/src/route/route_profiling.cpp +++ b/vpr/src/route/route_profiling.cpp @@ -148,7 +148,7 @@ struct Congested_node_types { void congestion_analysis() { #if 0 // each type indexes into array which holds the congestion for that type - std::vector congestion_per_type((size_t)NUM_RR_TYPES, 0); + std::vector congestion_per_type((size_t)t_rr_type::NUM_RR_TYPES, 0); // print out specific node information if congestion for type is low enough int total_congestion = 0; @@ -164,7 +164,7 @@ void congestion_analysis() { constexpr int specific_node_print_threshold = 5; Congested_node_types congested; - for (int type = SOURCE; type < NUM_RR_TYPES; ++type) { + for (int type = SOURCE; type < t_rr_type::NUM_RR_TYPES; ++type) { float congestion_percentage = (float)congestion_per_type[type] / (float) total_congestion * 100; VTR_LOG(" %6s: %10.6f %\n", node_typename[type], congestion_percentage); // nodes of that type need specific printing diff --git a/vpr/src/route/route_tree.cpp b/vpr/src/route/route_tree.cpp index 799fa185fbd..cc8f5a8fee3 100644 --- a/vpr/src/route/route_tree.cpp +++ b/vpr/src/route/route_tree.cpp @@ -29,7 +29,7 @@ RouteTreeNode::RouteTreeNode(RRNodeId _inode, RRSwitchId _parent_switch, RouteTr } /** Print information about this subtree to stdout. */ -void RouteTreeNode::print(void) const { +void RouteTreeNode::print() const { print_x(0); } @@ -360,7 +360,7 @@ vtr::optional RouteTree::find_by_rr_id(RRNodeId rr_node) c * - invalid timing values * - congested SINKs * Returns true if OK. */ -bool RouteTree::is_valid(void) const { +bool RouteTree::is_valid() const { return is_valid_x(*_root); } @@ -396,7 +396,7 @@ bool RouteTree::is_valid_x(const RouteTreeNode& rt_node) const { return false; } - if (rr_graph.node_type(inode) == SINK) { // sink, must not be congested and must not have fanouts + if (rr_graph.node_type(inode) == e_rr_type::SINK) { // sink, must not be congested and must not have fanouts int occ = route_ctx.rr_node_route_inf[inode].occ(); int capacity = rr_graph.node_capacity(inode); if (rt_node._next != nullptr && rt_node._next->_parent == &rt_node) { @@ -563,9 +563,9 @@ RouteTree::add_subtree_from_heap(RTExploredNode* hptr, int target_net_pin_index, e_rr_type node_type = rr_graph.node_type(new_branch_inodes[i]); // If is_flat is enabled, IPINs should be added, since they are used for intra-cluster routing - if (node_type == IPIN && !is_flat) { + if (node_type == e_rr_type::IPIN && !is_flat) { new_node->re_expand = false; - } else if (node_type == SINK) { + } else if (node_type == e_rr_type::SINK) { new_node->re_expand = false; new_node->net_pin_index = target_net_pin_index; // net pin index is invalid for non-SINK nodes } else { @@ -626,7 +626,7 @@ void RouteTree::add_non_configurable_nodes(RouteTreeNode* rt_node, add_node(rt_node, new_node); new_node->net_pin_index = OPEN; - if (rr_graph.node_type(to_rr_node) == IPIN && !is_flat) { + if (rr_graph.node_type(to_rr_node) == e_rr_type::IPIN && !is_flat) { new_node->re_expand = false; } else { new_node->re_expand = true; @@ -650,7 +650,7 @@ RouteTree::prune(CBRR& connections_inf, std::vector* non_config_node_set_us std::unique_lock write_lock(_write_mutex); - VTR_ASSERT_MSG(rr_graph.node_type(root().inode) == SOURCE, "Root of route tree must be SOURCE"); + VTR_ASSERT_MSG(rr_graph.node_type(root().inode) == e_rr_type::SOURCE, "Root of route tree must be SOURCE"); VTR_ASSERT_MSG(_net_id, "RouteTree must be constructed using a ParentNetId"); @@ -709,7 +709,7 @@ RouteTree::prune_x(RouteTreeNode& rt_node, CBRR& connections_inf, bool force_pru } }); - if (rr_graph.node_type(rt_node.inode) == SINK) { + if (rr_graph.node_type(rt_node.inode) == e_rr_type::SINK) { if (!force_prune) { //Valid path to sink @@ -824,7 +824,7 @@ RouteTree::prune_x(RouteTreeNode& rt_node, CBRR& connections_inf, bool force_pru /** Remove all sinks and mark the remaining nodes as un-expandable. * This is used after routing a clock net. * TODO: is this function doing anything? Try running without it */ -void RouteTree::freeze(void) { +void RouteTree::freeze() { std::unique_lock write_lock(_write_mutex); return freeze_x(*_root); } @@ -835,7 +835,7 @@ void RouteTree::freeze_x(RouteTreeNode& rt_node) { const auto& rr_graph = device_ctx.rr_graph; remove_child_if(rt_node, [&](RouteTreeNode& child) { - if (rr_graph.node_type(child.inode) == SINK) { + if (rr_graph.node_type(child.inode) == e_rr_type::SINK) { VTR_LOGV_DEBUG(f_router_debug, "Removing sink %d from route tree\n", child.inode); return true; @@ -860,7 +860,7 @@ void RouteTree::freeze_x(RouteTreeNode& rt_node) { * "to" a sink is a usage of the set, but the code used to check if the * edge "from" the SINK, which shouldn't exist, was "configurable". This * might be some faulty code / unnecessary check carried over.) */ -std::vector RouteTree::get_non_config_node_set_usage(void) const { +std::vector RouteTree::get_non_config_node_set_usage() const { auto& device_ctx = g_vpr_ctx.device(); std::vector usage(device_ctx.rr_non_config_node_sets.size(), 0); @@ -871,7 +871,7 @@ std::vector RouteTree::get_non_config_node_set_usage(void) const { if (it == rr_to_nonconf.end()) continue; - if (device_ctx.rr_graph.node_type(rt_node.inode) == SINK) { + if (device_ctx.rr_graph.node_type(rt_node.inode) == e_rr_type::SINK) { if (device_ctx.rr_graph.rr_switch_inf(rt_node.parent_switch).configurable()) { usage[it->second] += 1; } diff --git a/vpr/src/route/route_utilization.cpp b/vpr/src/route/route_utilization.cpp index 66b03751451..c2aeb155ab2 100644 --- a/vpr/src/route/route_utilization.cpp +++ b/vpr/src/route/route_utilization.cpp @@ -4,12 +4,12 @@ #include "draw_global.h" vtr::Matrix calculate_routing_usage(t_rr_type rr_type, bool is_flat, bool is_print) { - VTR_ASSERT(rr_type == CHANX || rr_type == CHANY); + VTR_ASSERT(rr_type == e_rr_type::CHANX || rr_type == e_rr_type::CHANY); - auto& device_ctx = g_vpr_ctx.device(); + const auto& device_ctx = g_vpr_ctx.device(); const auto& rr_graph = device_ctx.rr_graph; - auto& cluster_ctx = g_vpr_ctx.clustering(); - auto& route_ctx = g_vpr_ctx.routing(); + const auto& cluster_ctx = g_vpr_ctx.clustering(); + const auto& route_ctx = g_vpr_ctx.routing(); vtr::Matrix usage({{device_ctx.grid.width(), device_ctx.grid.height()}}, 0.); @@ -41,8 +41,8 @@ vtr::Matrix calculate_routing_usage(t_rr_type rr_type, bool is_flat, bool (void)is_print; #endif - if (rr_type == CHANX) { - VTR_ASSERT(rr_graph.node_type(rr_node) == CHANX); + if (rr_type == e_rr_type::CHANX) { + VTR_ASSERT(rr_graph.node_type(rr_node) == e_rr_type::CHANX); VTR_ASSERT(rr_graph.node_ylow(rr_node) == rr_graph.node_yhigh(rr_node)); int y = rr_graph.node_ylow(rr_node); @@ -50,8 +50,8 @@ vtr::Matrix calculate_routing_usage(t_rr_type rr_type, bool is_flat, bool usage[x][y] += route_ctx.rr_node_route_inf[rr_node].occ(); } } else { - VTR_ASSERT(rr_type == CHANY); - VTR_ASSERT(rr_graph.node_type(rr_node) == CHANY); + VTR_ASSERT(rr_type == e_rr_type::CHANY); + VTR_ASSERT(rr_graph.node_type(rr_node) == e_rr_type::CHANY); VTR_ASSERT(rr_graph.node_xlow(rr_node) == rr_graph.node_xhigh(rr_node)); int x = rr_graph.node_xlow(rr_node); @@ -65,7 +65,7 @@ vtr::Matrix calculate_routing_usage(t_rr_type rr_type, bool is_flat, bool vtr::Matrix calculate_routing_avail(t_rr_type rr_type) { //Calculate the number of available resources in each x/y channel - VTR_ASSERT(rr_type == CHANX || rr_type == CHANY); + VTR_ASSERT(rr_type == e_rr_type::CHANX || rr_type == e_rr_type::CHANY); auto& device_ctx = g_vpr_ctx.device(); const auto& rr_graph = device_ctx.rr_graph; @@ -74,16 +74,16 @@ vtr::Matrix calculate_routing_avail(t_rr_type rr_type) { for (const RRNodeId& rr_node : rr_graph.nodes()) { const short& rr_node_capacity = rr_graph.node_capacity(rr_node); - if (rr_graph.node_type(rr_node) == CHANX && rr_type == CHANX) { - VTR_ASSERT(rr_graph.node_type(rr_node) == CHANX); + if (rr_graph.node_type(rr_node) == e_rr_type::CHANX && rr_type == e_rr_type::CHANX) { + VTR_ASSERT(rr_graph.node_type(rr_node) == e_rr_type::CHANX); VTR_ASSERT(rr_graph.node_ylow(rr_node) == rr_graph.node_yhigh(rr_node)); int y = rr_graph.node_ylow(rr_node); for (int x = rr_graph.node_xlow(rr_node); x <= rr_graph.node_xhigh(rr_node); ++x) { avail[x][y] += rr_node_capacity; } - } else if (rr_graph.node_type(rr_node) == CHANY && rr_type == CHANY) { - VTR_ASSERT(rr_graph.node_type(rr_node) == CHANY); + } else if (rr_graph.node_type(rr_node) == e_rr_type::CHANY && rr_type == e_rr_type::CHANY) { + VTR_ASSERT(rr_graph.node_type(rr_node) == e_rr_type::CHANY); VTR_ASSERT(rr_graph.node_xlow(rr_node) == rr_graph.node_xhigh(rr_node)); int x = rr_graph.node_xlow(rr_node); diff --git a/vpr/src/route/router_lookahead.cpp b/vpr/src/route/router_lookahead.cpp index 240aeafbd61..17bb64a7b4e 100644 --- a/vpr/src/route/router_lookahead.cpp +++ b/vpr/src/route/router_lookahead.cpp @@ -73,7 +73,7 @@ std::pair ClassicLookahead::get_expected_delay_and_cong(RRNodeId n t_rr_type rr_type = rr_graph.node_type(node); - if (rr_type == CHANX || rr_type == CHANY) { + if (rr_type == e_rr_type::CHANX || rr_type == e_rr_type::CHANY) { auto [num_segs_same_dir, num_segs_ortho_dir] = get_expected_segs_to_target(node, target_node); auto cost_index = rr_graph.node_cost_index(node); @@ -97,7 +97,7 @@ std::pair ClassicLookahead::get_expected_delay_and_cong(RRNodeId n + ipin_data.T_linear; return std::make_pair(params.criticality * Tdel, (1 - params.criticality) * cong_cost); - } else if (rr_type == IPIN) { /* Change if you're allowing route-throughs */ + } else if (rr_type == e_rr_type::IPIN) { /* Change if you're allowing route-throughs */ return std::make_pair(0., device_ctx.rr_indexed_data[RRIndexedDataId(SINK_COST_INDEX)].base_cost); } else { /* Change this if you want to investigate route-throughs */ @@ -141,7 +141,7 @@ static std::pair get_expected_segs_to_target(RRNodeId inode, RRNodeId float ortho_inv_length = device_ctx.rr_indexed_data[RRIndexedDataId(ortho_cost_index)].inv_length; t_rr_type rr_type = rr_graph.node_type(inode); - if (rr_type == CHANX) { + if (rr_type == e_rr_type::CHANX) { ylow = rr_graph.node_ylow(inode); xhigh = rr_graph.node_xhigh(inode); xlow = rr_graph.node_xlow(inode); diff --git a/vpr/src/route/router_lookahead_compressed_map.cpp b/vpr/src/route/router_lookahead_compressed_map.cpp index 4c50beb175e..0b7ea09a62c 100644 --- a/vpr/src/route/router_lookahead_compressed_map.cpp +++ b/vpr/src/route/router_lookahead_compressed_map.cpp @@ -149,11 +149,11 @@ static void compute_router_wire_compressed_lookahead(const std::vector> sample_nodes; std::vector chan_types; if (segment_inf.parallel_axis == X_AXIS) - chan_types.push_back(CHANX); + chan_types.push_back(t_rr_type::CHANX); else if (segment_inf.parallel_axis == Y_AXIS) - chan_types.push_back(CHANY); + chan_types.push_back(t_rr_type::CHANY); else //Both for BOTH_AXIS segments and special segments such as clock_networks we want to search in both directions. - chan_types.insert(chan_types.end(), {CHANX, CHANY}); + chan_types.insert(chan_types.end(), {t_rr_type::CHANX, t_rr_type::CHANY}); for (e_rr_type chan_type : chan_types) { util::t_routing_cost_map routing_cost_map = util::get_routing_cost_map(longest_seg_length, @@ -180,7 +180,7 @@ static void compute_router_wire_compressed_lookahead(const std::vector CompressedMapLookahead::get_expected_delay_and_cong(RRNo float expected_cong_cost = std::numeric_limits::infinity(); e_rr_type from_type = rr_graph.node_type(from_node); - if (from_type == SOURCE || from_type == OPIN) { + if (from_type == t_rr_type::SOURCE || from_type == t_rr_type::OPIN) { //When estimating costs from a SOURCE/OPIN we look-up to find which wire types (and the //cost to reach them) in src_opin_delays. Once we know what wire types are //reachable, we query the f_wire_cost_map (i.e. the wire lookahead) to get the final @@ -472,7 +472,7 @@ std::pair CompressedMapLookahead::get_expected_delay_and_cong(RRNo .c_str()) .c_str()); - } else if (from_type == CHANX || from_type == CHANY) { + } else if (from_type == t_rr_type::CHANX || from_type == t_rr_type::CHANY) { //When estimating costs from a wire, we directly look-up the result in the wire lookahead (f_wire_cost_map) auto from_cost_index = rr_graph.node_cost_index(from_node); @@ -502,7 +502,7 @@ std::pair CompressedMapLookahead::get_expected_delay_and_cong(RRNo .c_str()); expected_delay_cost = cost_entry.delay * params.criticality; expected_cong_cost = cost_entry.congestion * (1 - params.criticality); - } else if (from_type == IPIN) { /* Change if you're allowing route-throughs */ + } else if (from_type == t_rr_type::IPIN) { /* Change if you're allowing route-throughs */ return std::make_pair(0., device_ctx.rr_indexed_data[RRIndexedDataId(SINK_COST_INDEX)].base_cost); } else { /* Change this if you want to investigate route-throughs */ return std::make_pair(0., 0.); diff --git a/vpr/src/route/router_lookahead_extended_map.cpp b/vpr/src/route/router_lookahead_extended_map.cpp index 2f3964b47b5..e7d774e49cd 100644 --- a/vpr/src/route/router_lookahead_extended_map.cpp +++ b/vpr/src/route/router_lookahead_extended_map.cpp @@ -2,7 +2,6 @@ #include #include -#include #include "connection_router_interface.h" #include "rr_node.h" @@ -113,7 +112,7 @@ std::pair ExtendedMapLookahead::get_src_opin_cost(RRNodeId from_no const util::t_reachable_wire_inf& reachable_wire_inf = kv.second; util::Cost_Entry cost_entry; - if (reachable_wire_inf.wire_rr_type == SINK) { + if (reachable_wire_inf.wire_rr_type == e_rr_type::SINK) { //Some pins maybe reachable via a direct (OPIN -> IPIN) connection. //In the lookahead, we treat such connections as 'special' wire types //with no delay/congestion cost @@ -153,7 +152,7 @@ float ExtendedMapLookahead::get_chan_ipin_delays(RRNodeId to_node) const { auto& rr_graph = device_ctx.rr_graph; e_rr_type to_type = rr_graph.node_type(to_node); - VTR_ASSERT(to_type == SINK || to_type == IPIN); + VTR_ASSERT(to_type == e_rr_type::SINK || to_type == e_rr_type::IPIN); auto to_tile_type = device_ctx.grid.get_physical_type({rr_graph.node_xlow(to_node), rr_graph.node_ylow(to_node), @@ -202,9 +201,9 @@ std::pair ExtendedMapLookahead::get_expected_delay_and_cong(RRNode dy = to_y - from_y; e_rr_type from_type = rr_graph.node_type(from_node); - if (from_type == SOURCE || from_type == OPIN) { + if (from_type == e_rr_type::SOURCE || from_type == e_rr_type::OPIN) { return this->get_src_opin_cost(from_node, dx, dy, to_layer_num, params); - } else if (from_type == IPIN) { + } else if (from_type == e_rr_type::IPIN) { return std::make_pair(0., 0.); } @@ -406,7 +405,7 @@ std::pair ExtendedMapLookahead::run_dijkstra(RRNodeId start_node, } /* if this node is an ipin record its congestion/delay in the routing_cost_map */ - if (rr_graph.node_type(node) == IPIN) { + if (rr_graph.node_type(node) == e_rr_type::IPIN) { // the last cost should be the highest max_cost = current.cost(); @@ -589,13 +588,13 @@ float ExtendedMapLookahead::get_expected_cost( t_rr_type rr_type = rr_graph.node_type(current_node); - if (rr_type == CHANX || rr_type == CHANY || rr_type == SOURCE || rr_type == OPIN) { + if (rr_type == e_rr_type::CHANX || rr_type == e_rr_type::CHANY || rr_type == e_rr_type::SOURCE || rr_type == e_rr_type::OPIN) { float delay_cost, cong_cost; // Get the total cost using the combined delay and congestion costs std::tie(delay_cost, cong_cost) = get_expected_delay_and_cong(current_node, target_node, params, R_upstream); return delay_cost + cong_cost; - } else if (rr_type == IPIN) { /* Change if you're allowing route-throughs */ + } else if (rr_type == e_rr_type::IPIN) { /* Change if you're allowing route-throughs */ // This is to return only the cost between the IPIN and SINK. No need to // query the cost map, as the routing of this connection is almost done. return device_ctx.rr_indexed_data[RRIndexedDataId(SINK_COST_INDEX)].base_cost; diff --git a/vpr/src/route/router_lookahead_map.cpp b/vpr/src/route/router_lookahead_map.cpp index 621690f3bac..2d5972acabe 100644 --- a/vpr/src/route/router_lookahead_map.cpp +++ b/vpr/src/route/router_lookahead_map.cpp @@ -174,11 +174,11 @@ float MapLookahead::get_expected_cost(RRNodeId current_node, RRNodeId target_nod if (is_flat_) { return get_expected_cost_flat_router(current_node, target_node, params, R_upstream); } else { - if (from_rr_type == CHANX || from_rr_type == CHANY || from_rr_type == SOURCE || from_rr_type == OPIN) { + if (from_rr_type == e_rr_type::CHANX || from_rr_type == e_rr_type::CHANY || from_rr_type == e_rr_type::SOURCE || from_rr_type == e_rr_type::OPIN) { // Get the total cost using the combined delay and congestion costs auto [delay_cost, cong_cost] = get_expected_delay_and_cong(current_node, target_node, params, R_upstream); return delay_cost + cong_cost; - } else if (from_rr_type == IPIN) { /* Change if you're allowing route-throughs */ + } else if (from_rr_type == e_rr_type::IPIN) { /* Change if you're allowing route-throughs */ return (device_ctx.rr_indexed_data[RRIndexedDataId(SINK_COST_INDEX)].base_cost); } else { /* Change this if you want to investigate route-throughs */ return (0.); @@ -210,7 +210,7 @@ float MapLookahead::get_expected_cost_flat_router(RRNodeId current_node, RRNodeI int to_layer_num = rr_graph.node_layer(target_node); // We have not checked the multi-layer FPGA for flat routing VTR_ASSERT(rr_graph.node_layer(current_node) == rr_graph.node_layer(target_node)); - if (from_rr_type == CHANX || from_rr_type == CHANY) { + if (from_rr_type == e_rr_type::CHANX || from_rr_type == e_rr_type::CHANY) { std::tie(delay_cost, cong_cost) = get_expected_delay_and_cong(current_node, target_node, params, R_upstream); // delay_cost and cong_cost only represent the cost to get to the root-level pins. The below offsets are used to represent the intra-cluster cost @@ -219,7 +219,7 @@ float MapLookahead::get_expected_cost_flat_router(RRNodeId current_node, RRNodeI cong_offset_cost = (1. - params.criticality) * tile_min_cost.at(to_physical_type->index).at(to_node_ptc_num).congestion; return delay_cost + cong_cost + delay_offset_cost + cong_offset_cost; - } else if (from_rr_type == OPIN) { + } else if (from_rr_type == e_rr_type::OPIN) { if (is_inter_cluster_node(rr_graph, current_node)) { // Similar to CHANX and CHANY std::tie(delay_cost, cong_cost) = get_expected_delay_and_cong(current_node, target_node, params, R_upstream); @@ -259,7 +259,7 @@ float MapLookahead::get_expected_cost_flat_router(RRNodeId current_node, RRNodeI } return delay_cost + cong_cost + delay_offset_cost + cong_offset_cost; } - } else if (from_rr_type == IPIN) { + } else if (from_rr_type == e_rr_type::IPIN) { // we assume that route-through is not enabled. VTR_ASSERT(node_in_same_physical_tile(current_node, target_node)); const auto& pin_delays = intra_tile_pin_primitive_pin_delay.at(from_physical_type->index)[from_node_ptc_num]; @@ -272,7 +272,7 @@ float MapLookahead::get_expected_cost_flat_router(RRNodeId current_node, RRNodeI cong_cost = (1. - params.criticality) * pin_delay_itr->second.congestion; } return delay_cost + cong_cost; - } else if (from_rr_type == SOURCE) { + } else if (from_rr_type == e_rr_type::SOURCE) { if (node_in_same_physical_tile(current_node, target_node)) { delay_cost = 0.; cong_cost = 0.; @@ -290,7 +290,7 @@ float MapLookahead::get_expected_cost_flat_router(RRNodeId current_node, RRNodeI } return delay_cost + cong_cost + delay_offset_cost + cong_offset_cost; } else { - VTR_ASSERT(from_rr_type == SINK); + VTR_ASSERT(from_rr_type == e_rr_type::SINK); return (0.); } } @@ -312,7 +312,7 @@ std::pair MapLookahead::get_expected_delay_and_cong(RRNodeId from_ float expected_cong_cost = std::numeric_limits::infinity(); e_rr_type from_type = rr_graph.node_type(from_node); - if (from_type == SOURCE || from_type == OPIN) { + if (from_type == e_rr_type::SOURCE || from_type == e_rr_type::OPIN) { //When estimating costs from a SOURCE/OPIN we look-up to find which wire types (and the //cost to reach them) in src_opin_delays. Once we know what wire types are //reachable, we query the f_wire_cost_map (i.e. the wire lookahead) to get the final @@ -358,7 +358,7 @@ std::pair MapLookahead::get_expected_delay_and_cong(RRNodeId from_ .c_str()) .c_str()); - } else if (from_type == CHANX || from_type == CHANY) { + } else if (from_type == e_rr_type::CHANX || from_type == e_rr_type::CHANY) { //When estimating costs from a wire, we directly look-up the result in the wire lookahead (f_wire_cost_map) auto from_cost_index = rr_graph.node_cost_index(from_node); @@ -388,7 +388,7 @@ std::pair MapLookahead::get_expected_delay_and_cong(RRNodeId from_ .c_str()); expected_delay_cost = cost_entry.delay * params.criticality; expected_cong_cost = cost_entry.congestion * (1 - params.criticality); - } else if (from_type == IPIN) { /* Change if you're allowing route-throughs */ + } else if (from_type == e_rr_type::IPIN) { /* Change if you're allowing route-throughs */ return std::make_pair(0., device_ctx.rr_indexed_data[RRIndexedDataId(SINK_COST_INDEX)].base_cost); } else { /* Change this if you want to investigate route-throughs */ return std::make_pair(0., 0.); @@ -479,10 +479,10 @@ float MapLookahead::get_opin_distance_min_delay(int physical_tile_idx, int from_ /******** Function Definitions ********/ static util::Cost_Entry get_wire_cost_entry(e_rr_type rr_type, int seg_index, int from_layer_num, int delta_x, int delta_y, int to_layer_num) { - VTR_ASSERT_SAFE(rr_type == CHANX || rr_type == CHANY); + VTR_ASSERT_SAFE(rr_type == e_rr_type::CHANX || rr_type == e_rr_type::CHANY); int chan_index = 0; - if (rr_type == CHANY) { + if (rr_type == e_rr_type::CHANY) { chan_index = 1; } @@ -520,11 +520,11 @@ static void compute_router_wire_lookahead(const std::vector& segm for (const auto& segment_inf : segment_inf_vec) { std::vector chan_types; if (segment_inf.parallel_axis == X_AXIS) - chan_types.push_back(CHANX); + chan_types.push_back(e_rr_type::CHANX); else if (segment_inf.parallel_axis == Y_AXIS) - chan_types.push_back(CHANY); + chan_types.push_back(e_rr_type::CHANY); else //Both for BOTH_AXIS segments and special segments such as clock_networks we want to search in both directions. - chan_types.insert(chan_types.end(), {CHANX, CHANY}); + chan_types.insert(chan_types.end(), {e_rr_type::CHANX, e_rr_type::CHANY}); for (e_rr_type chan_type : chan_types) { util::t_routing_cost_map routing_cost_map = util::get_routing_cost_map(longest_seg_length, @@ -551,7 +551,7 @@ static void compute_router_wire_lookahead(const std::vector& segm /* sets the lookahead cost map entries based on representative cost entries from routing_cost_map */ static void set_lookahead_map_costs(int from_layer_num, int segment_index, e_rr_type chan_type, util::t_routing_cost_map& routing_cost_map) { - int chan_index = (chan_type == CHANX) ? 0 : 1; + int chan_index = (chan_type == e_rr_type::CHANX) ? 0 : 1; /* set the lookahead cost map entries with a representative cost entry from routing_cost_map */ for (unsigned to_layer = 0; to_layer < routing_cost_map.dim_size(0); to_layer++) { @@ -567,7 +567,7 @@ static void set_lookahead_map_costs(int from_layer_num, int segment_index, e_rr_ /* fills in missing lookahead map entries by copying the cost of the closest valid entry */ static void fill_in_missing_lookahead_entries(int segment_index, e_rr_type chan_type) { - int chan_index = (chan_type == CHANX) ? 0 : 1; + int chan_index = (chan_type == e_rr_type::CHANX) ? 0 : 1; auto& device_ctx = g_vpr_ctx.device(); @@ -842,7 +842,7 @@ static void min_opin_distance_cost_map(const util::t_src_opin_delays& src_opin_d } else { for (const auto& kv : layer_src_opin_delay_map) { const util::t_reachable_wire_inf& reachable_wire_inf = kv.second; - if (reachable_wire_inf.wire_rr_type == SINK) { + if (reachable_wire_inf.wire_rr_type == e_rr_type::SINK) { continue; } util::Cost_Entry wire_cost_entry; diff --git a/vpr/src/route/router_lookahead_map_utils.cpp b/vpr/src/route/router_lookahead_map_utils.cpp index 6e1b2013ee4..6c626d7df1a 100644 --- a/vpr/src/route/router_lookahead_map_utils.cpp +++ b/vpr/src/route/router_lookahead_map_utils.cpp @@ -395,7 +395,7 @@ t_src_opin_delays compute_router_src_opin_lookahead(bool is_flat) { if (device_ctx.grid.num_instances(&device_ctx.physical_tile_types[itile], from_layer_num) == 0) { continue; } - for (e_rr_type rr_type : {SOURCE, OPIN}) { + for (e_rr_type rr_type : {e_rr_type::SOURCE, e_rr_type::OPIN}) { t_physical_tile_loc sample_loc(OPEN, OPEN, OPEN); size_t num_sampled_locs = 0; @@ -411,7 +411,7 @@ t_src_opin_delays compute_router_src_opin_lookahead(bool is_flat) { //No untried instances of the current tile type left VTR_LOG_WARN("Found no %ssample locations for %s in %s\n", (num_sampled_locs == 0) ? "" : "more ", - rr_node_typename[rr_type], + rr_node_typename[(size_t)rr_type], device_ctx.physical_tile_types[itile].name.c_str()); break; } @@ -442,7 +442,7 @@ t_src_opin_delays compute_router_src_opin_lookahead(bool is_flat) { } if (reachable_wire_found) { VTR_LOGV_DEBUG(f_router_debug, "Found no reachable wires from %s (%s) at (%d,%d,%d)\n", - rr_node_typename[rr_type], + rr_node_typename[(size_t)rr_type], rr_node_arch_name(node_id, is_flat).c_str(), sample_loc.x, sample_loc.y, @@ -502,7 +502,7 @@ t_chan_ipins_delays compute_router_chan_ipin_lookahead() { for (int ix = min_x; ix < max_x; ix++) { for (int iy = min_y; iy < max_y; iy++) { - for (auto rr_type : {CHANX, CHANY}) { + for (auto rr_type : {e_rr_type::CHANX, e_rr_type::CHANY}) { for (const RRNodeId& node_id : node_lookup.find_channel_nodes(sample_loc.layer_num, ix, iy, rr_type)) { //Find the IPINs which are reachable from the wires within the bounding box //around the selected tile location @@ -551,13 +551,13 @@ RRNodeId get_start_node(int layer, int start_x, int start_y, int target_x, int t RRNodeId result = RRNodeId::INVALID(); - if (rr_type != CHANX && rr_type != CHANY) { + if (rr_type != e_rr_type::CHANX && rr_type != e_rr_type::CHANY) { VPR_FATAL_ERROR(VPR_ERROR_ROUTE, "Must start lookahead routing from CHANX or CHANY node\n"); } /* determine which direction the wire should go in based on the start & target coordinates */ Direction direction = Direction::INC; - if ((rr_type == CHANX && target_x < start_x) || (rr_type == CHANY && target_y < start_y)) { + if ((rr_type == e_rr_type::CHANX && target_x < start_x) || (rr_type == e_rr_type::CHANY && target_y < start_y)) { direction = Direction::DEC; } @@ -611,7 +611,7 @@ std::pair get_xy_deltas(RRNodeId from_node, RRNodeId to_node) { int from_chan; int to_seg; int to_chan; - if (from_type == CHANY) { + if (from_type == e_rr_type::CHANY) { from_seg_low = rr_graph.node_ylow(from_node); from_seg_high = rr_graph.node_yhigh(from_node); from_chan = rr_graph.node_xlow(from_node); @@ -664,7 +664,7 @@ std::pair get_xy_deltas(RRNodeId from_node, RRNodeId to_node) { delta_seg++; } - if (from_type == CHANY) { + if (from_type == e_rr_type::CHANY) { delta_x = delta_chan; delta_y = delta_seg; } else { @@ -721,11 +721,11 @@ t_routing_cost_map get_routing_cost_map(int longest_seg_length, std::vector sample_nodes; std::vector chan_types; if (segment_inf.parallel_axis == X_AXIS) - chan_types.push_back(CHANX); + chan_types.push_back(e_rr_type::CHANX); else if (segment_inf.parallel_axis == Y_AXIS) - chan_types.push_back(CHANY); + chan_types.push_back(e_rr_type::CHANY); else //Both for BOTH_AXIS segments and special segments such as clock_networks we want to search in both directions. - chan_types.insert(chan_types.end(), {CHANX, CHANY}); + chan_types.insert(chan_types.end(), {e_rr_type::CHANX, e_rr_type::CHANY}); for (int ref_inc : ref_increments) { int sample_x = ref_x + ref_inc; @@ -783,7 +783,7 @@ t_routing_cost_map get_routing_cost_map(int longest_seg_length, if (sample_nodes.empty()) { VTR_LOG_WARN("Unable to find any sample location for segment %s type '%s' (length %d)\n", - rr_node_typename[chan_type], + rr_node_typename[(size_t)chan_type], segment_inf.name.c_str(), segment_inf.length); } else { @@ -850,7 +850,7 @@ std::pair get_cost_from_src_opin(const std::map IPIN) connection. //In the lookahead, we treat such connections as 'special' wire types //with no delay/congestion cost @@ -907,14 +907,14 @@ void dump_readable_router_lookahead_map(const std::string& file_name, const std: for (int from_layer_num = 0; from_layer_num < num_layers; from_layer_num++) { for (int to_layer_num = 0; to_layer_num < num_layers; to_layer_num++) { - for (e_rr_type chan_type : {CHANX, CHANY}) { + for (e_rr_type chan_type : {e_rr_type::CHANX, e_rr_type::CHANY}) { for (int seg_index = 0; seg_index < dim_sizes[3]; seg_index++) { for (int dx = 0; dx < grid_width; dx++) { for (int dy = 0; dy < grid_height; dy++) { auto cost = wire_cost_func(chan_type, seg_index, from_layer_num, dx, dy, to_layer_num); ofs << from_layer_num << "," << to_layer_num << "," - << rr_node_typename[chan_type] << "," + << rr_node_typename[(size_t)chan_type] << "," << seg_index << "," << dx << "," << dy << "," @@ -983,10 +983,10 @@ static void dijkstra_flood_to_wires(int itile, e_rr_type curr_rr_type = rr_graph.node_type(curr.node); int curr_layer_num = rr_graph.node_layer(curr.node); - if (curr_rr_type == CHANX || curr_rr_type == CHANY || curr_rr_type == SINK) { + if (curr_rr_type == e_rr_type::CHANX || curr_rr_type == e_rr_type::CHANY || curr_rr_type == e_rr_type::SINK) { //We stop expansion at any CHANX/CHANY/SINK int seg_index; - if (curr_rr_type != SINK) { + if (curr_rr_type != e_rr_type::SINK) { //It's a wire, figure out its type auto cost_index = rr_graph.node_cost_index(curr.node); seg_index = device_ctx.rr_indexed_data[cost_index].seg_index; @@ -1011,7 +1011,7 @@ static void dijkstra_flood_to_wires(int itile, src_opin_delays[root_layer_num][itile][ptc][curr_layer_num][seg_index].congestion = curr.congestion; } - } else if (curr_rr_type == SOURCE || curr_rr_type == OPIN || curr_rr_type == IPIN) { + } else if (curr_rr_type == e_rr_type::SOURCE || curr_rr_type == e_rr_type::OPIN || curr_rr_type == e_rr_type::IPIN) { //We allow expansion through SOURCE/OPIN/IPIN types auto cost_index = rr_graph.node_cost_index(curr.node); float incr_cong = device_ctx.rr_indexed_data[cost_index].base_cost; //Current nodes congestion cost @@ -1091,7 +1091,7 @@ static void dijkstra_flood_to_ipins(RRNodeId node, util::t_chan_ipins_delays& ch pq.pop(); e_rr_type curr_rr_type = rr_graph.node_type(curr.node); - if (curr_rr_type == IPIN) { + if (curr_rr_type == e_rr_type::IPIN) { int node_x = rr_graph.node_xlow(curr.node); int node_y = rr_graph.node_ylow(curr.node); int node_layer = rr_graph.node_layer(curr.node); @@ -1110,7 +1110,7 @@ static void dijkstra_flood_to_ipins(RRNodeId node, util::t_chan_ipins_delays& ch chan_ipins_delays[root_layer][itile][ptc].wire_rr_type = curr_rr_type; chan_ipins_delays[root_layer][itile][ptc].delay = site_pin_delay; chan_ipins_delays[root_layer][itile][ptc].congestion = curr.congestion; - } else if (curr_rr_type == CHANX || curr_rr_type == CHANY) { + } else if (curr_rr_type == e_rr_type::CHANX || curr_rr_type == e_rr_type::CHANY) { if (curr.level >= MAX_EXPANSION_LEVEL) { continue; } @@ -1255,7 +1255,7 @@ static void run_intra_tile_dijkstra(const RRGraphView& rr_graph, } auto curr_type = rr_graph.node_type(curr.node); VTR_ASSERT(curr_type != t_rr_type::CHANX && curr_type != t_rr_type::CHANY); - if (curr_type != SINK) { + if (curr_type != e_rr_type::SINK) { for (RREdgeId edge : rr_graph.edge_range(curr.node)) { RRNodeId next_node = rr_graph.rr_nodes().edge_sink_node(edge); auto cost_index = rr_graph.node_cost_index(next_node); @@ -1329,7 +1329,7 @@ static void run_dijkstra(RRNodeId start_node, //VTR_LOG("Expanding with delay=%10.3g cong=%10.3g (%s)\n", current.delay, current.congestion_upstream, describe_rr_node(rr_graph, device_ctx.grid, device_ctx.rr_indexed_data, curr_node).c_str()); /* if this node is an ipin record its congestion/delay in the routing_cost_map */ - if (rr_graph.node_type(curr_node) == IPIN) { + if (rr_graph.node_type(curr_node) == e_rr_type::IPIN) { VTR_ASSERT_SAFE(rr_graph.node_xlow(curr_node) == rr_graph.node_xhigh(curr_node)); VTR_ASSERT_SAFE(rr_graph.node_ylow(curr_node) == rr_graph.node_yhigh(curr_node)); int ipin_x = rr_graph.node_xlow(curr_node); @@ -1384,7 +1384,7 @@ static void expand_dijkstra_neighbours(util::PQ_Entry parent_entry, } int switch_ind = size_t(rr_graph.edge_switch(parent, edge)); - if (rr_graph.node_type(child_node) == SINK) return; + if (rr_graph.node_type(child_node) == e_rr_type::SINK) return; /* skip this child if it has already been expanded from */ if (node_expanded[child_node]) { diff --git a/vpr/src/route/router_lookahead_sampling.cpp b/vpr/src/route/router_lookahead_sampling.cpp index a8ad7dc2f15..c8e71ad6267 100644 --- a/vpr/src/route/router_lookahead_sampling.cpp +++ b/vpr/src/route/router_lookahead_sampling.cpp @@ -130,7 +130,7 @@ static std::tuple get_node_info(const t_rr_node& node, int num_se const auto& rr_graph = device_ctx.rr_graph; RRNodeId rr_node = node.id(); - if (rr_graph.node_type(rr_node) != CHANX && rr_graph.node_type(rr_node) != CHANY) { + if (rr_graph.node_type(rr_node) != e_rr_type::CHANX && rr_graph.node_type(rr_node) != e_rr_type::CHANY) { return std::tuple(OPEN, OPEN, OPEN); } @@ -203,7 +203,7 @@ std::vector find_sample_regions(int num_segments) { // compute bounding boxes for each segment type std::vector> bounding_box_for_segment(num_segments, vtr::Rect()); for (auto& node : rr_graph.rr_nodes()) { - if (rr_graph.node_type(node.id()) != CHANX && rr_graph.node_type(node.id()) != CHANY) continue; + if (rr_graph.node_type(node.id()) != e_rr_type::CHANX && rr_graph.node_type(node.id()) != e_rr_type::CHANY) continue; if (rr_graph.node_capacity(node.id()) == 0 || rr_graph.num_edges(node.id()) == 0) continue; int seg_index = device_ctx.rr_indexed_data[rr_graph.node_cost_index(node.id())].seg_index; diff --git a/vpr/src/route/router_stats.h b/vpr/src/route/router_stats.h index 4336d419083..176455c80e6 100644 --- a/vpr/src/route/router_stats.h +++ b/vpr/src/route/router_stats.h @@ -38,13 +38,13 @@ struct RouterStats { size_t inter_cluster_node_pops = 0; size_t intra_cluster_node_pushes = 0; size_t intra_cluster_node_pops = 0; - size_t inter_cluster_node_type_cnt_pushes[t_rr_type::NUM_RR_TYPES] = {0}; - size_t inter_cluster_node_type_cnt_pops[t_rr_type::NUM_RR_TYPES] = {0}; - size_t intra_cluster_node_type_cnt_pushes[t_rr_type::NUM_RR_TYPES] = {0}; - size_t intra_cluster_node_type_cnt_pops[t_rr_type::NUM_RR_TYPES] = {0}; + size_t inter_cluster_node_type_cnt_pushes[(size_t)t_rr_type::NUM_RR_TYPES] = {0}; + size_t inter_cluster_node_type_cnt_pops[(size_t)t_rr_type::NUM_RR_TYPES] = {0}; + size_t intra_cluster_node_type_cnt_pushes[(size_t)t_rr_type::NUM_RR_TYPES] = {0}; + size_t intra_cluster_node_type_cnt_pops[(size_t)t_rr_type::NUM_RR_TYPES] = {0}; // For debugging purposes - size_t rt_node_pushes[t_rr_type::NUM_RR_TYPES] = {0}; + size_t rt_node_pushes[(size_t)t_rr_type::NUM_RR_TYPES] = {0}; /** Add rhs's stats to mine */ void combine(RouterStats& rhs) { @@ -56,7 +56,7 @@ struct RouterStats { heap_pops += rhs.heap_pops; inter_cluster_node_pops += rhs.inter_cluster_node_pops; intra_cluster_node_pops += rhs.intra_cluster_node_pops; - for (int node_type_idx = 0; node_type_idx < t_rr_type::NUM_RR_TYPES; node_type_idx++) { + for (size_t node_type_idx = 0; node_type_idx < (size_t)t_rr_type::NUM_RR_TYPES; node_type_idx++) { inter_cluster_node_type_cnt_pushes[node_type_idx] += rhs.inter_cluster_node_type_cnt_pushes[node_type_idx]; inter_cluster_node_type_cnt_pops[node_type_idx] += rhs.inter_cluster_node_type_cnt_pops[node_type_idx]; intra_cluster_node_type_cnt_pushes[node_type_idx] += rhs.intra_cluster_node_type_cnt_pushes[node_type_idx]; diff --git a/vpr/src/route/rr_graph.cpp b/vpr/src/route/rr_graph.cpp index 072b62c1c98..cbb24825014 100644 --- a/vpr/src/route/rr_graph.cpp +++ b/vpr/src/route/rr_graph.cpp @@ -1462,11 +1462,11 @@ static void build_rr_graph(e_graph_type graph_type, // clock_modeling::DEDICATED_NETWORK will append some rr nodes after // the regular graph. for (int i = 0; i < num_rr_nodes; i++) { - if (rr_graph.node_type(RRNodeId(i)) == CHANX) { + if (rr_graph.node_type(RRNodeId(i)) == t_rr_type::CHANX) { int ylow = rr_graph.node_ylow(RRNodeId(i)); device_ctx.rr_graph_builder.set_node_capacity(RRNodeId(i), nodes_per_chan.x_list[ylow]); } - if (rr_graph.node_type(RRNodeId(i)) == CHANY) { + if (rr_graph.node_type(RRNodeId(i)) == t_rr_type::CHANY) { int xlow = rr_graph.node_xlow(RRNodeId(i)); device_ctx.rr_graph_builder.set_node_capacity(RRNodeId(i), nodes_per_chan.y_list[xlow]); } @@ -1479,7 +1479,7 @@ static void build_rr_graph(e_graph_type graph_type, for (int rr_node_id = 0; rr_node_id < num_rr_nodes; rr_node_id++) { auto node_type = rr_graph.node_type(RRNodeId(rr_node_id)); auto node_dir = rr_graph.node_direction(RRNodeId(rr_node_id)); - if (node_type != CHANX && node_type != CHANY) { //SRC/SINK/IPIN/OPIN + if (node_type != t_rr_type::CHANX && node_type != t_rr_type::CHANY) { //SRC/SINK/IPIN/OPIN device_ctx.rr_graph_builder.set_node_ptc_twist_incr(RRNodeId(rr_node_id), 0); } else { //The current ptc twist increment number in UNDIR TILEABLE RRGraph is 2 and -2 @@ -2246,7 +2246,7 @@ static std::function alloc_and_load_rr_graph(RRGraphBuilder if (i > 0) { int tracks_per_chan = ((is_global_graph) ? 1 : chan_width.x_list[j]); - build_rr_chan(rr_graph_builder, layer, i, j, CHANX, track_to_pin_lookup_x, sb_conn_map, + build_rr_chan(rr_graph_builder, layer, i, j, t_rr_type::CHANX, track_to_pin_lookup_x, sb_conn_map, switch_block_conn, num_of_3d_conns_custom_SB, CHANX_COST_INDEX_START, chan_width, grid, tracks_per_chan, @@ -2267,7 +2267,7 @@ static std::function alloc_and_load_rr_graph(RRGraphBuilder } if (j > 0) { int tracks_per_chan = ((is_global_graph) ? 1 : chan_width.y_list[i]); - build_rr_chan(rr_graph_builder, layer, i, j, CHANY, track_to_pin_lookup_y, sb_conn_map, + build_rr_chan(rr_graph_builder, layer, i, j, t_rr_type::CHANY, track_to_pin_lookup_y, sb_conn_map, switch_block_conn, num_of_3d_conns_custom_SB, CHANX_COST_INDEX_START + num_seg_types_x, chan_width, grid, tracks_per_chan, @@ -2456,12 +2456,12 @@ static void add_classes_rr_graph(RRGraphBuilder& rr_graph_builder, int class_num_pins = get_class_num_pins_from_class_physical_num(physical_type, class_num); if (class_type == DRIVER) { rr_graph_builder.set_node_cost_index(class_inode, RRIndexedDataId(SOURCE_COST_INDEX)); - rr_graph_builder.set_node_type(class_inode, SOURCE); + rr_graph_builder.set_node_type(class_inode, t_rr_type::SOURCE); } else { VTR_ASSERT(class_type == RECEIVER); rr_graph_builder.set_node_cost_index(class_inode, RRIndexedDataId(SINK_COST_INDEX)); - rr_graph_builder.set_node_type(class_inode, SINK); + rr_graph_builder.set_node_type(class_inode, t_rr_type::SINK); } VTR_ASSERT(class_num_pins <= std::numeric_limits::max()); rr_graph_builder.set_node_capacity(class_inode, (short)class_num_pins); @@ -2496,7 +2496,7 @@ static void add_pins_rr_graph(RRGraphBuilder& rr_graph_builder, int x_offset = x_offset_vec[pin_coord]; int y_offset = y_offset_vec[pin_coord]; e_side pin_side = pin_sides_vec[pin_coord]; - auto node_type = (pin_type == DRIVER) ? OPIN : IPIN; + auto node_type = (pin_type == DRIVER) ? t_rr_type::OPIN : t_rr_type::IPIN; RRNodeId node_id = node_lookup.find_node(layer, i + x_offset, j + y_offset, @@ -2717,7 +2717,7 @@ static void build_bidir_rr_opins(RRGraphBuilder& rr_graph_builder, total_pin_Fc += Fc[pin_index][iseg]; } - RRNodeId node_index = rr_graph_builder.node_lookup().find_node(layer, i, j, OPIN, pin_index, side); + RRNodeId node_index = rr_graph_builder.node_lookup().find_node(layer, i, j, t_rr_type::OPIN, pin_index, side); VTR_ASSERT(node_index); for (auto connected_layer : get_layers_pin_is_connected_to(type, layer, pin_index)) { @@ -3165,14 +3165,14 @@ static void build_rr_chan(RRGraphBuilder& rr_graph_builder, int chan_coord = y_coord; //The absolute coordinate of this channel within the device int seg_dimension = device_ctx.grid.width() - 2; //-2 for no perim channels int chan_dimension = device_ctx.grid.height() - 2; //-2 for no perim channels - const t_chan_details& from_chan_details = (chan_type == CHANX) ? chan_details_x : chan_details_y; - const t_chan_details& opposite_chan_details = (chan_type == CHANX) ? chan_details_y : chan_details_x; - t_rr_type opposite_chan_type = CHANY; - if (chan_type == CHANY) { + const t_chan_details& from_chan_details = (chan_type == t_rr_type::CHANX) ? chan_details_x : chan_details_y; + const t_chan_details& opposite_chan_details = (chan_type == t_rr_type::CHANX) ? chan_details_y : chan_details_x; + t_rr_type opposite_chan_type = t_rr_type::CHANY; + if (chan_type == t_rr_type::CHANY) { //Swap values since CHANX was assumed above std::swap(seg_coord, chan_coord); std::swap(seg_dimension, chan_dimension); - opposite_chan_type = CHANX; + opposite_chan_type = t_rr_type::CHANX; } const t_chan_seg_details* seg_details = from_chan_details[x_coord][y_coord].data(); @@ -3201,7 +3201,7 @@ static void build_rr_chan(RRGraphBuilder& rr_graph_builder, VTR_ASSERT(seg_coord == start); const t_chan_seg_details* from_seg_details = nullptr; - if (chan_type == CHANY) { + if (chan_type == t_rr_type::CHANY) { from_seg_details = chan_details_y[x_coord][start].data(); } else { from_seg_details = chan_details_x[start][y_coord].data(); @@ -3222,11 +3222,11 @@ static void build_rr_chan(RRGraphBuilder& rr_graph_builder, if (chan_coord > 0) { const t_chan_seg_details* to_seg_details; int max_opposite_chan_width; - if (chan_type == CHANX) { + if (chan_type == t_rr_type::CHANX) { to_seg_details = chan_details_y[start][y_coord].data(); max_opposite_chan_width = nodes_per_chan.y_max; } else { - VTR_ASSERT(chan_type == CHANY); + VTR_ASSERT(chan_type == t_rr_type::CHANY); to_seg_details = chan_details_x[x_coord][start].data(); max_opposite_chan_width = nodes_per_chan.x_max; } @@ -3242,11 +3242,11 @@ static void build_rr_chan(RRGraphBuilder& rr_graph_builder, if (chan_coord < chan_dimension) { const t_chan_seg_details* to_seg_details; int max_opposite_chan_width = 0; - if (chan_type == CHANX) { + if (chan_type == e_rr_type::CHANX) { to_seg_details = chan_details_y[start][y_coord + 1].data(); max_opposite_chan_width = nodes_per_chan.y_max; } else { - VTR_ASSERT(chan_type == CHANY); + VTR_ASSERT(chan_type == t_rr_type::CHANY); to_seg_details = chan_details_x[x_coord + 1][start].data(); max_opposite_chan_width = nodes_per_chan.x_max; } @@ -3274,11 +3274,11 @@ static void build_rr_chan(RRGraphBuilder& rr_graph_builder, const t_chan_seg_details* to_seg_details; /* AA: Same channel width for straight through connections assuming uniform width distributions along the axis*/ int max_chan_width = 0; - if (chan_type == CHANX) { + if (chan_type == e_rr_type::CHANX) { to_seg_details = chan_details_x[target_seg][y_coord].data(); max_chan_width = nodes_per_chan.x_max; } else { - VTR_ASSERT(chan_type == CHANY); + VTR_ASSERT(chan_type == t_rr_type::CHANY); to_seg_details = chan_details_y[x_coord][target_seg].data(); max_chan_width = nodes_per_chan.y_max; } @@ -3302,10 +3302,10 @@ static void build_rr_chan(RRGraphBuilder& rr_graph_builder, rr_graph_builder.set_node_cost_index(node, RRIndexedDataId(cost_index_offset + seg_details[track].index())); rr_graph_builder.set_node_capacity(node, 1); /* GLOBAL routing handled elsewhere */ - if (chan_type == CHANX) { + if (chan_type == e_rr_type::CHANX) { rr_graph_builder.set_node_coordinates(node, start, y_coord, end, y_coord); } else { - VTR_ASSERT(chan_type == CHANY); + VTR_ASSERT(chan_type == t_rr_type::CHANY); rr_graph_builder.set_node_coordinates(node, x_coord, start, x_coord, end); } @@ -3348,7 +3348,7 @@ static void build_inter_die_custom_sb_rr_chan(RRGraphBuilder& rr_graph_builder, int offset = 0; while (true) { //going through allocated nodes until no nodes are found within the RRGraph builder - RRNodeId node = rr_graph_builder.node_lookup().find_node(layer, x_coord, y_coord, CHANX, start_track + offset); + RRNodeId node = rr_graph_builder.node_lookup().find_node(layer, x_coord, y_coord, e_rr_type::CHANX, start_track + offset); if (node) { rr_graph_builder.set_node_layer(node, layer); rr_graph_builder.set_node_coordinates(node, x_coord, y_coord, x_coord, y_coord); @@ -3360,7 +3360,7 @@ static void build_inter_die_custom_sb_rr_chan(RRGraphBuilder& rr_graph_builder, rr_graph_builder.set_node_rc_index(node, NodeRCIndex( find_create_rr_rc_data(R, C, mutable_device_ctx.rr_rc_data))); - rr_graph_builder.set_node_type(node, CHANX); + rr_graph_builder.set_node_type(node, e_rr_type::CHANX); rr_graph_builder.set_node_track_num(node, start_track + offset); rr_graph_builder.set_node_direction(node, Direction::NONE); @@ -4210,7 +4210,7 @@ static void build_unidir_rr_opins(RRGraphBuilder& rr_graph_builder, continue; } - RRNodeId opin_node_index = rr_graph_builder.node_lookup().find_node(layer, i, j, OPIN, pin_index, side); + RRNodeId opin_node_index = rr_graph_builder.node_lookup().find_node(layer, i, j, t_rr_type::OPIN, pin_index, side); if (!opin_node_index) continue; //No valid from node for (int iseg = 0; iseg < num_seg_types; iseg++) { @@ -4230,11 +4230,11 @@ static void build_unidir_rr_opins(RRGraphBuilder& rr_graph_builder, * side is the side of the logic or io block. */ bool vert = ((side == TOP) || (side == BOTTOM)); bool pos_dir = ((side == TOP) || (side == RIGHT)); - t_rr_type chan_type = (vert ? CHANX : CHANY); + t_rr_type chan_type = (vert ? e_rr_type::CHANX : t_rr_type::CHANY); int chan = (vert ? (j) : (i)); int seg = (vert ? (i) : (j)); int max_len = (vert ? grid.width() : grid.height()); - e_parallel_axis wanted_axis = chan_type == CHANX ? X_AXIS : Y_AXIS; + e_parallel_axis wanted_axis = chan_type == e_rr_type::CHANX ? X_AXIS : Y_AXIS; int seg_index = get_parallel_seg_index(iseg, seg_index_map, wanted_axis); /*The segment at index iseg doesn't have the proper adjacency so skip building Fc_out conenctions for it*/ @@ -4260,7 +4260,7 @@ static void build_unidir_rr_opins(RRGraphBuilder& rr_graph_builder, continue; } - const t_chan_seg_details* seg_details = (chan_type == CHANX ? chan_details_x[seg][chan] : chan_details_y[chan][seg]).data(); + const t_chan_seg_details* seg_details = (chan_type == e_rr_type::CHANX ? chan_details_x[seg][chan] : chan_details_y[chan][seg]).data(); if (seg_details[0].length() == 0) continue; @@ -4485,13 +4485,13 @@ static int get_opin_direct_connections(RRGraphBuilder& rr_graph_builder, if (directs[i].to_side != NUM_2D_SIDES) { //Explicit side specified, only create if pin exists on that side - RRNodeId inode = rr_graph_builder.node_lookup().find_node(layer, x + directs[i].x_offset, y + directs[i].y_offset, IPIN, ipin, directs[i].to_side); + RRNodeId inode = rr_graph_builder.node_lookup().find_node(layer, x + directs[i].x_offset, y + directs[i].y_offset, e_rr_type::IPIN, ipin, directs[i].to_side); if (inode) { inodes.push_back(inode); } } else { //No side specified, get all candidates - inodes = rr_graph_builder.node_lookup().find_nodes_at_all_sides(layer, x + directs[i].x_offset, y + directs[i].y_offset, IPIN, ipin); + inodes = rr_graph_builder.node_lookup().find_nodes_at_all_sides(layer, x + directs[i].x_offset, y + directs[i].y_offset, e_rr_type::IPIN, ipin); } if (inodes.size() > 0) { @@ -4623,7 +4623,7 @@ static RRNodeId pick_best_direct_connect_target_rr_node(const RRGraphView& rr_gr //candidate would be picked (i.e. to minimize the drawn edge length). // //This function attempts to pick the 'best/closest' of the candidates. - VTR_ASSERT(rr_graph.node_type(from_rr) == OPIN); + VTR_ASSERT(rr_graph.node_type(from_rr) == t_rr_type::OPIN); float best_dist = std::numeric_limits::infinity(); RRNodeId best_rr = RRNodeId::INVALID(); @@ -4635,7 +4635,7 @@ static RRNodeId pick_best_direct_connect_target_rr_node(const RRGraphView& rr_gr } for (RRNodeId to_rr : candidate_rr_nodes) { - VTR_ASSERT(rr_graph.node_type(to_rr) == IPIN); + VTR_ASSERT(rr_graph.node_type(to_rr) == e_rr_type::IPIN); float to_dist = std::abs(rr_graph.node_xlow(from_rr) - rr_graph.node_xlow(to_rr)) + std::abs(rr_graph.node_ylow(from_rr) - rr_graph.node_ylow(to_rr)); diff --git a/vpr/src/route/rr_graph2.cpp b/vpr/src/route/rr_graph2.cpp index 76a71af29a5..a4ccb673440 100644 --- a/vpr/src/route/rr_graph2.cpp +++ b/vpr/src/route/rr_graph2.cpp @@ -709,10 +709,10 @@ int get_bidir_opin_connections(RRGraphBuilder& rr_graph_builder, tr_i = ((side == LEFT) ? (i - 1) : i); tr_j = ((side == BOTTOM) ? (j - 1) : j); - to_type = ((side == LEFT) || (side == RIGHT)) ? CHANY : CHANX; + to_type = ((side == LEFT) || (side == RIGHT)) ? e_rr_type::CHANY : e_rr_type::CHANX; - chan = ((to_type == CHANX) ? tr_j : tr_i); - seg = ((to_type == CHANX) ? tr_i : tr_j); + chan = ((to_type == e_rr_type::CHANX) ? tr_j : tr_i); + seg = ((to_type == e_rr_type::CHANX) ? tr_i : tr_j); bool vert = !((side == TOP) || (side == BOTTOM)); @@ -723,10 +723,10 @@ int get_bidir_opin_connections(RRGraphBuilder& rr_graph_builder, if ((tr_j < 0) || (tr_j > int(device_ctx.grid.height() - 2))) { //-2 for no perimeter channels continue; } - if ((CHANX == to_type) && (tr_i < 1)) { + if ((e_rr_type::CHANX == to_type) && (tr_i < 1)) { continue; } - if ((CHANY == to_type) && (tr_j < 1)) { + if ((e_rr_type::CHANY == to_type) && (tr_j < 1)) { continue; } if (opin_to_track_map[type->index].empty()) { @@ -804,15 +804,15 @@ int get_unidir_opin_connections(RRGraphBuilder& rr_graph_builder, VTR_ASSERT(Fc % 2 == 0); /* get_rr_node_indices needs x and y coords. */ - x = ((CHANX == chan_type) ? seg : chan); - y = ((CHANX == chan_type) ? chan : seg); + x = ((e_rr_type::CHANX == chan_type) ? seg : chan); + y = ((e_rr_type::CHANX == chan_type) ? chan : seg); /* Get the lists of possible muxes. */ int dummy; std::vector inc_muxes; std::vector dec_muxes; /* AA: Determine the channel width instead of using max channels to not create hanging nodes*/ - int max_chan_width = (CHANX == chan_type) ? nodes_per_chan.x_list[y] : nodes_per_chan.y_list[x]; + int max_chan_width = (e_rr_type::CHANX == chan_type) ? nodes_per_chan.x_list[y] : nodes_per_chan.y_list[x]; label_wire_muxes(chan, seg, seg_details, seg_type_index, max_len, Direction::INC, max_chan_width, true, inc_muxes, &num_inc_muxes, &dummy); @@ -1097,8 +1097,8 @@ static void load_chan_rr_indices(const int max_chan_width, for (int chan = 0; chan < num_chans - 1; ++chan) { for (int seg = 1; seg < chan_len - 1; ++seg) { /* Assign an inode to the starts of tracks */ - int x = (type == CHANX ? seg : chan); - int y = (type == CHANX ? chan : seg); + int x = (type == e_rr_type::CHANX ? seg : chan); + int y = (type == e_rr_type::CHANX ? chan : seg); const t_chan_seg_details* seg_details = chan_details[x][y].data(); /* Reserve nodes in lookup to save memory */ @@ -1114,7 +1114,7 @@ static void load_chan_rr_indices(const int max_chan_width, /* TODO: Now we still use the (y, x) convention here for CHANX. Should rework later */ int node_x = chan; int node_y = start; - if (CHANX == type) { + if (e_rr_type::CHANX == type) { std::swap(node_x, node_y); } @@ -1181,16 +1181,16 @@ vtr::NdMatrix get_number_track_to_track_inter_die_conn(t_sb_connection_m //check if both from_node and to_node exists in the rr-graph //CHANY -> CHANX connection if (check_3d_SB_RRnodes(rr_graph_builder, x, y, conn_vector[iconn].from_wire, - conn_vector[iconn].from_wire_layer, CHANY, + conn_vector[iconn].from_wire_layer, e_rr_type::CHANY, conn_vector[iconn].to_wire, conn_vector[iconn].to_wire_layer, - CHANX)) { + e_rr_type::CHANX)) { num_of_3d_conn++; } //CHANX -> CHANY connection if (check_3d_SB_RRnodes(rr_graph_builder, x, y, conn_vector[iconn].from_wire, - conn_vector[iconn].from_wire_layer, CHANX, + conn_vector[iconn].from_wire_layer, e_rr_type::CHANX, conn_vector[iconn].to_wire, conn_vector[iconn].to_wire_layer, - CHANY)) { + e_rr_type::CHANY)) { num_of_3d_conn++; } } @@ -1237,13 +1237,13 @@ void alloc_and_load_inter_die_rr_node_indices(RRGraphBuilder& rr_graph_builder, } //reserve extra nodes for inter-die track-to-track connection - rr_graph_builder.node_lookup().reserve_nodes(layer, y, x, CHANX, conn_count + nodes_per_chan->max); + rr_graph_builder.node_lookup().reserve_nodes(layer, y, x, e_rr_type::CHANX, conn_count + nodes_per_chan->max); for (int rr_node_offset = 0; rr_node_offset < conn_count; rr_node_offset++) { - RRNodeId inode = rr_graph_builder.node_lookup().find_node(layer, x, y, CHANX, nodes_per_chan->max + rr_node_offset); + RRNodeId inode = rr_graph_builder.node_lookup().find_node(layer, x, y, e_rr_type::CHANX, nodes_per_chan->max + rr_node_offset); if (!inode) { inode = RRNodeId(*index); ++(*index); - rr_graph_builder.node_lookup().add_node(inode, layer, y, x, CHANX, nodes_per_chan->max + rr_node_offset); + rr_graph_builder.node_lookup().add_node(inode, layer, y, x, e_rr_type::CHANX, nodes_per_chan->max + rr_node_offset); } } } @@ -1361,8 +1361,8 @@ static void add_pins_spatial_lookup(RRGraphBuilder& rr_graph_builder, for (int height_offset = 0; height_offset < physical_type_ptr->height; ++height_offset) { int y_tile = root_y + height_offset; //only nodes on the tile may be located in a location other than the root-location - rr_graph_builder.node_lookup().reserve_nodes(layer, x_tile, y_tile, OPIN, physical_type_ptr->num_pins, side); - rr_graph_builder.node_lookup().reserve_nodes(layer, x_tile, y_tile, IPIN, physical_type_ptr->num_pins, side); + rr_graph_builder.node_lookup().reserve_nodes(layer, x_tile, y_tile, e_rr_type::OPIN, physical_type_ptr->num_pins, side); + rr_graph_builder.node_lookup().reserve_nodes(layer, x_tile, y_tile, e_rr_type::IPIN, physical_type_ptr->num_pins, side); } } } @@ -1376,11 +1376,11 @@ static void add_pins_spatial_lookup(RRGraphBuilder& rr_graph_builder, int y_tile = root_y + y_offset[pin_coord_idx]; e_side side = pin_sides[pin_coord_idx]; if (pin_type == DRIVER) { - rr_graph_builder.node_lookup().add_node(RRNodeId(*index), layer, x_tile, y_tile, OPIN, pin_num, side); + rr_graph_builder.node_lookup().add_node(RRNodeId(*index), layer, x_tile, y_tile, e_rr_type::OPIN, pin_num, side); assigned_to_rr_node = true; } else { VTR_ASSERT(pin_type == RECEIVER); - rr_graph_builder.node_lookup().add_node(RRNodeId(*index), layer, x_tile, y_tile, IPIN, pin_num, side); + rr_graph_builder.node_lookup().add_node(RRNodeId(*index), layer, x_tile, y_tile, e_rr_type::IPIN, pin_num, side); assigned_to_rr_node = true; } } @@ -1412,16 +1412,16 @@ static void add_classes_spatial_lookup(RRGraphBuilder& rr_graph_builder, int* index) { for (int x_tile = root_x; x_tile < (root_x + block_width); x_tile++) { for (int y_tile = root_y; y_tile < (root_y + block_height); y_tile++) { - rr_graph_builder.node_lookup().reserve_nodes(layer, x_tile, y_tile, SOURCE, class_num_vec.size(), TOTAL_2D_SIDES[0]); - rr_graph_builder.node_lookup().reserve_nodes(layer, x_tile, y_tile, SINK, class_num_vec.size(), TOTAL_2D_SIDES[0]); + rr_graph_builder.node_lookup().reserve_nodes(layer, x_tile, y_tile, e_rr_type::SOURCE, class_num_vec.size(), TOTAL_2D_SIDES[0]); + rr_graph_builder.node_lookup().reserve_nodes(layer, x_tile, y_tile, e_rr_type::SINK, class_num_vec.size(), TOTAL_2D_SIDES[0]); } } for (const int class_num : class_num_vec) { e_pin_type class_type = get_class_type_from_class_physical_num(physical_type_ptr, class_num); - e_rr_type node_type = SINK; + e_rr_type node_type = e_rr_type::SINK; if (class_type == DRIVER) { - node_type = SOURCE; + node_type = e_rr_type::SOURCE; } else { VTR_ASSERT(class_type == RECEIVER); } @@ -1447,13 +1447,13 @@ void alloc_and_load_rr_node_indices(RRGraphBuilder& rr_graph_builder, const t_chan_details& chan_details_x, const t_chan_details& chan_details_y, bool is_flat) { - /* Allocates and loads all the structures needed for fast lookups of the * - * index of an rr_node. rr_node_indices is a matrix containing the index * - * of the *first* rr_node at a given (i,j) location. */ + /* Allocates and loads all the structures needed for fast lookups of the + * index of an rr_node. rr_node_indices is a matrix containing the index + * of the *first* rr_node at a given (i,j) location. */ /* Alloc the lookup table */ for (t_rr_type rr_type : RR_TYPES) { - if (rr_type == CHANX) { + if (rr_type == e_rr_type::CHANX) { rr_graph_builder.node_lookup().resize_nodes(grid.get_num_layers(), grid.height(), grid.width(), rr_type, NUM_2D_SIDES); } else { rr_graph_builder.node_lookup().resize_nodes(grid.get_num_layers(), grid.width(), grid.height(), rr_type, NUM_2D_SIDES); @@ -1465,9 +1465,9 @@ void alloc_and_load_rr_node_indices(RRGraphBuilder& rr_graph_builder, /* Load the data for x and y channels */ load_chan_rr_indices(nodes_per_chan->x_max, grid, grid.width(), grid.height(), - CHANX, chan_details_x, rr_graph_builder, index); + e_rr_type::CHANX, chan_details_x, rr_graph_builder, index); load_chan_rr_indices(nodes_per_chan->y_max, grid, grid.height(), grid.width(), - CHANY, chan_details_y, rr_graph_builder, index); + e_rr_type::CHANY, chan_details_y, rr_graph_builder, index); } void alloc_and_load_intra_cluster_rr_node_indices(RRGraphBuilder& rr_graph_builder, @@ -1544,7 +1544,7 @@ bool verify_rr_node_indices(const DeviceGrid& grid, for (t_rr_type rr_type : RR_TYPES) { /* Get the list of nodes at a specific location (x, y) */ std::vector nodes_from_lookup; - if (rr_type == CHANX || rr_type == CHANY) { + if (rr_type == e_rr_type::CHANX || rr_type == e_rr_type::CHANY) { nodes_from_lookup = rr_graph.node_lookup().find_channel_nodes(l, x, y, rr_type); } else { nodes_from_lookup = rr_graph.node_lookup().find_grid_nodes_at_all_sides(l, x, y, rr_type); @@ -1554,12 +1554,12 @@ bool verify_rr_node_indices(const DeviceGrid& grid, if (rr_graph.node_type(inode) != rr_type) { VPR_ERROR(VPR_ERROR_ROUTE, "RR node type does not match between rr_nodes and rr_node_indices (%s/%s): %s", - rr_node_typename[rr_graph.node_type(inode)], - rr_node_typename[rr_type], + rr_node_typename[(size_t)rr_graph.node_type(inode)], + rr_node_typename[(size_t)rr_type], describe_rr_node(rr_graph, grid, rr_indexed_data, inode, is_flat).c_str()); } - if (rr_graph.node_type(inode) == CHANX) { + if (rr_graph.node_type(inode) == e_rr_type::CHANX) { VTR_ASSERT_MSG(rr_graph.node_ylow(inode) == rr_graph.node_yhigh(inode), "CHANX should be horizontal"); if (y != rr_graph.node_ylow(inode)) { VPR_ERROR(VPR_ERROR_ROUTE, "RR node y position does not agree between rr_nodes (%d) and rr_node_indices (%d): %s", @@ -1575,8 +1575,8 @@ bool verify_rr_node_indices(const DeviceGrid& grid, x, describe_rr_node(rr_graph, grid, rr_indexed_data, inode, is_flat).c_str()); } - } else if (rr_graph.node_type(inode) == CHANY) { - VTR_ASSERT_MSG(rr_graph.node_xlow(inode) == rr_graph.node_xhigh(inode), "CHANY should be veritcal"); + } else if (rr_graph.node_type(inode) == e_rr_type::CHANY) { + VTR_ASSERT_MSG(rr_graph.node_xlow(inode) == rr_graph.node_xhigh(inode), "CHANY should be vertical"); if (x != rr_graph.node_xlow(inode)) { VPR_ERROR(VPR_ERROR_ROUTE, "RR node x position does not agree between rr_nodes (%d) and rr_node_indices (%d): %s", @@ -1592,7 +1592,7 @@ bool verify_rr_node_indices(const DeviceGrid& grid, y, describe_rr_node(rr_graph, grid, rr_indexed_data, inode, is_flat).c_str()); } - } else if (rr_graph.node_type(inode) == SOURCE || rr_graph.node_type(inode) == SINK) { + } else if (rr_graph.node_type(inode) == e_rr_type::SOURCE || rr_graph.node_type(inode) == e_rr_type::SINK) { // Sources have co-ordinates covering the entire block they are in, but not sinks if (!rr_graph.x_in_node_range(x, inode)) { VPR_ERROR(VPR_ERROR_ROUTE, "RR node x positions do not agree between rr_nodes (%d <-> %d) and rr_node_indices (%d): %s", @@ -1610,7 +1610,7 @@ bool verify_rr_node_indices(const DeviceGrid& grid, describe_rr_node(rr_graph, grid, rr_indexed_data, inode, is_flat).c_str()); } } else { - VTR_ASSERT(rr_graph.node_type(inode) == IPIN || rr_graph.node_type(inode) == OPIN); + VTR_ASSERT(rr_graph.node_type(inode) == e_rr_type::IPIN || rr_graph.node_type(inode) == e_rr_type::OPIN); /* As we allow a pin to be indexable on multiple sides, * This check code should be invalid * if (rr_node.xlow() != x) { @@ -1629,7 +1629,7 @@ bool verify_rr_node_indices(const DeviceGrid& grid, */ } - if (rr_type == IPIN || rr_type == OPIN) { + if (rr_type == e_rr_type::IPIN || rr_type == e_rr_type::OPIN) { /* As we allow a pin to be indexable on multiple sides, * This check code should be invalid * if (rr_node.side() != side) { @@ -1660,7 +1660,7 @@ bool verify_rr_node_indices(const DeviceGrid& grid, auto& rr_node = rr_nodes[size_t(inode)]; - if (rr_graph.node_type(inode) == SOURCE || rr_graph.node_type(inode) == SINK) { + if (rr_graph.node_type(inode) == e_rr_type::SOURCE || rr_graph.node_type(inode) == e_rr_type::SINK) { int rr_width = (rr_graph.node_xhigh(rr_node.id()) - rr_graph.node_xlow(rr_node.id()) + 1); int rr_height = (rr_graph.node_yhigh(rr_node.id()) - rr_graph.node_ylow(rr_node.id()) + 1); int rr_area = rr_width * rr_height; @@ -1674,7 +1674,7 @@ bool verify_rr_node_indices(const DeviceGrid& grid, /* As we allow a pin to be indexable on multiple sides, * This check code should not be applied to input and output pins */ - } else if ((OPIN != rr_graph.node_type(inode)) && (IPIN != rr_graph.node_type(inode))) { + } else if ((e_rr_type::OPIN != rr_graph.node_type(inode)) && (e_rr_type::IPIN != rr_graph.node_type(inode))) { if (count != rr_node.length() + 1) { VPR_ERROR(VPR_ERROR_ROUTE, "Mismatch between RR node length (%d) and count within rr_node_indices (%d, should be length + 1): %s", rr_node.length(), @@ -1720,12 +1720,12 @@ int get_track_to_pins(RRGraphBuilder& rr_graph_builder, if (is_cblock(chan, j, track, seg_details)) { for (pass = 0; pass < 2; ++pass) { //pass == 0 => TOP/RIGHT, pass == 1 => BOTTOM/LEFT e_side side; - if (CHANX == chan_type) { + if (e_rr_type::CHANX == chan_type) { x = j; y = chan + pass; side = (0 == pass ? TOP : BOTTOM); } else { - VTR_ASSERT(CHANY == chan_type); + VTR_ASSERT(e_rr_type::CHANY == chan_type); x = chan + pass; y = j; side = (0 == pass ? RIGHT : LEFT); @@ -1757,7 +1757,7 @@ int get_track_to_pins(RRGraphBuilder& rr_graph_builder, } /* Check there is a connection and Fc map isn't wrong */ - RRNodeId to_node = rr_graph_builder.node_lookup().find_node(layer_index, x, y, IPIN, ipin, side); + RRNodeId to_node = rr_graph_builder.node_lookup().find_node(layer_index, x, y, e_rr_type::IPIN, ipin, side); int switch_type = (layer_index == layer) ? wire_to_ipin_switch : wire_to_pin_between_dice_switch; if (to_node) { rr_edges_to_create.emplace_back(from_rr_node, to_node, switch_type, false); @@ -1840,11 +1840,11 @@ int get_track_to_tracks(RRGraphBuilder& rr_graph_builder, int end_sb_seg = get_seg_end(from_seg_details, from_track, from_seg, from_chan, chan_len); /* Figure out the sides of SB the from_wire will use */ - if (CHANX == from_type) { + if (e_rr_type::CHANX == from_type) { from_side_a = RIGHT; from_side_b = LEFT; } else { - VTR_ASSERT(CHANY == from_type); + VTR_ASSERT(e_rr_type::CHANY == from_type); from_side_a = TOP; from_side_b = BOTTOM; } @@ -1899,7 +1899,7 @@ int get_track_to_tracks(RRGraphBuilder& rr_graph_builder, /* to_chan_details may correspond to an x-directed or y-directed channel, depending on which * channel type this function is used; so coordinates are reversed as necessary */ - if (to_type == CHANX) { + if (to_type == e_rr_type::CHANX) { to_seg_details = to_chan_details[to_seg][to_chan].data(); } else { to_seg_details = to_chan_details[to_chan][to_seg].data(); @@ -1925,10 +1925,10 @@ int get_track_to_tracks(RRGraphBuilder& rr_graph_builder, } /* Figure out which side of the SB the destination segment lies on */ - if (CHANX == to_type) { + if (e_rr_type::CHANX == to_type) { to_side = (is_behind ? RIGHT : LEFT); } else { - VTR_ASSERT(CHANY == to_type); + VTR_ASSERT(e_rr_type::CHANY == to_type); to_side = (is_behind ? TOP : BOTTOM); } @@ -2070,11 +2070,11 @@ static int get_bidir_track_to_chan_seg(RRGraphBuilder& rr_graph_builder, short switch_types[2]; /* x, y coords for get_rr_node lookups */ - if (CHANX == to_type) { + if (e_rr_type::CHANX == to_type) { to_x = to_seg; to_y = to_chan; } else { - VTR_ASSERT(CHANY == to_type); + VTR_ASSERT(e_rr_type::CHANY == to_type); to_x = to_chan; to_y = to_seg; } @@ -2198,8 +2198,8 @@ static void get_switchblocks_edges(RRGraphBuilder& rr_graph_builder, * * */ int offset = num_of_3d_conns_custom_SB[tile_x][tile_y] / custom_3d_sb_fanin_fanout; - RRNodeId track_to_chanx_node = rr_graph_builder.node_lookup().find_node(layer, tile_x, tile_y, CHANX, max_chan_width + offset); - RRNodeId diff_layer_chanx_node = rr_graph_builder.node_lookup().find_node(to_layer, tile_x, tile_y, CHANX, max_chan_width + offset); + RRNodeId track_to_chanx_node = rr_graph_builder.node_lookup().find_node(layer, tile_x, tile_y, e_rr_type::CHANX, max_chan_width + offset); + RRNodeId diff_layer_chanx_node = rr_graph_builder.node_lookup().find_node(to_layer, tile_x, tile_y, e_rr_type::CHANX, max_chan_width + offset); RRNodeId chanx_to_track_node = rr_graph_builder.node_lookup().find_node(to_layer, to_x, to_y, to_chan_type, to_wire); if (!track_to_chanx_node || !diff_layer_chanx_node || !chanx_to_track_node) { @@ -2254,14 +2254,14 @@ static int get_track_to_chan_seg(RRGraphBuilder& rr_graph_builder, int tile_x, tile_y; /* get x/y coordinates from seg/chan coordinates */ - if (CHANX == to_chan_type) { + if (e_rr_type::CHANX == to_chan_type) { to_x = tile_x = to_seg; to_y = tile_y = to_chan; if (RIGHT == to_side) { tile_x--; } } else { - VTR_ASSERT(CHANY == to_chan_type); + VTR_ASSERT(e_rr_type::CHANY == to_chan_type); to_x = tile_x = to_chan; to_y = tile_y = to_seg; if (TOP == to_side) { @@ -2338,11 +2338,11 @@ static int get_unidir_track_to_chan_seg(RRGraphBuilder& rr_graph_builder, std::vector mux_labels; /* x, y coords for get_rr_node lookups */ - int to_x = (CHANX == to_type ? to_seg : to_chan); - int to_y = (CHANX == to_type ? to_chan : to_seg); - int sb_x = (CHANX == to_type ? to_sb : to_chan); - int sb_y = (CHANX == to_type ? to_chan : to_sb); - int max_len = (CHANX == to_type ? grid.width() : grid.height()) - 2; //-2 for no perimeter channels + int to_x = (e_rr_type::CHANX == to_type ? to_seg : to_chan); + int to_y = (e_rr_type::CHANX == to_type ? to_chan : to_seg); + int sb_x = (e_rr_type::CHANX == to_type ? to_sb : to_chan); + int sb_y = (e_rr_type::CHANX == to_type ? to_chan : to_sb); + int max_len = (e_rr_type::CHANX == to_type ? grid.width() : grid.height()) - 2; //-2 for no perimeter channels enum Direction to_dir = Direction::DEC; if (to_sb < to_seg) { @@ -3003,11 +3003,11 @@ static int should_create_switchblock(const DeviceGrid& grid, int layer_num, int //Convert the chan/seg indices to real x/y coordinates int y_coord; int x_coord; - if (from_chan_type == CHANX) { + if (from_chan_type == e_rr_type::CHANX) { y_coord = from_chan_coord; x_coord = from_seg_coord; } else { - VTR_ASSERT(from_chan_type == CHANY); + VTR_ASSERT(from_chan_type == e_rr_type::CHANY); y_coord = from_seg_coord; x_coord = from_chan_coord; } @@ -3025,9 +3025,9 @@ static int should_create_switchblock(const DeviceGrid& grid, int layer_num, int return switch_override; } else if (sb_type == e_sb_type::TURNS && from_chan_type != to_chan_type) { return switch_override; - } else if (sb_type == e_sb_type::HORIZONTAL && from_chan_type == CHANX && to_chan_type == CHANX) { + } else if (sb_type == e_sb_type::HORIZONTAL && from_chan_type == e_rr_type::CHANX && to_chan_type == e_rr_type::CHANX) { return switch_override; - } else if (sb_type == e_sb_type::VERTICAL && from_chan_type == CHANY && to_chan_type == CHANY) { + } else if (sb_type == e_sb_type::VERTICAL && from_chan_type == e_rr_type::CHANY && to_chan_type == e_rr_type::CHANY) { return switch_override; } diff --git a/vpr/src/route/rr_graph_area.cpp b/vpr/src/route/rr_graph_area.cpp index 110f056c906..ed5a8f351cc 100644 --- a/vpr/src/route/rr_graph_area.cpp +++ b/vpr/src/route/rr_graph_area.cpp @@ -175,8 +175,8 @@ void count_bidir_routing_transistors(int num_switch, int wire_to_ipin_switch, fl from_rr_type = rr_graph.node_type(from_rr_node); switch (from_rr_type) { - case CHANX: - case CHANY: + case e_rr_type::CHANX: + case e_rr_type::CHANY: num_edges = rr_graph.num_edges(RRNodeId(from_node)); for (iedge = 0; iedge < num_edges; iedge++) { @@ -189,8 +189,8 @@ void count_bidir_routing_transistors(int num_switch, int wire_to_ipin_switch, fl } switch (to_rr_type) { - case CHANX: - case CHANY: + case e_rr_type::CHANX: + case e_rr_type::CHANY: iswitch = rr_graph.edge_switch(RRNodeId(from_node), iedge); if (rr_graph.rr_switch_inf(RRSwitchId(iswitch)).buffered()) { @@ -210,7 +210,7 @@ void count_bidir_routing_transistors(int num_switch, int wire_to_ipin_switch, fl } break; - case IPIN: + case e_rr_type::IPIN: num_inputs_to_cblock[size_t(to_node)]++; max_inputs_to_cblock = std::max(max_inputs_to_cblock, num_inputs_to_cblock[size_t(to_node)]); @@ -228,7 +228,7 @@ void count_bidir_routing_transistors(int num_switch, int wire_to_ipin_switch, fl VPR_ERROR(VPR_ERROR_ROUTE, "in count_routing_transistors:\n" "\tUnexpected connection from node %d (type %s) to node %d (type %s).\n", - from_node, rr_node_typename[from_rr_type], size_t(to_node), rr_node_typename[to_rr_type]); + from_node, rr_node_typename[(size_t)from_rr_type], size_t(to_node), rr_node_typename[(size_t)to_rr_type]); break; } /* End switch on to_rr_type. */ @@ -237,7 +237,7 @@ void count_bidir_routing_transistors(int num_switch, int wire_to_ipin_switch, fl /* Now add in the shared buffer transistors, and reset some flags. */ - if (from_rr_type == CHANX) { + if (from_rr_type == e_rr_type::CHANX) { for (i = rr_graph.node_xlow(from_rr_node) - 1; i <= rr_graph.node_xhigh(from_rr_node); i++) { ntrans_sharing += shared_buffer_trans[i]; @@ -261,7 +261,7 @@ void count_bidir_routing_transistors(int num_switch, int wire_to_ipin_switch, fl } break; - case OPIN: + case e_rr_type::OPIN: num_edges = rr_graph.num_edges(RRNodeId(from_node)); shared_opin_buffer_trans = 0.; @@ -377,8 +377,8 @@ void count_unidir_routing_transistors(std::vector& /*segment_inf* from_rr_type = rr_graph.node_type(from_rr_node); switch (from_rr_type) { - case CHANX: - case CHANY: + case e_rr_type::CHANX: + case e_rr_type::CHANY: num_edges = rr_graph.num_edges(RRNodeId(from_node)); /* Increment number of inputs per cblock if IPIN */ @@ -392,8 +392,8 @@ void count_unidir_routing_transistors(std::vector& /*segment_inf* } switch (to_rr_type) { - case CHANX: - case CHANY: + case e_rr_type::CHANX: + case e_rr_type::CHANY: if (!chan_node_switch_done[size_t(to_node)]) { int switch_index = rr_graph.edge_switch(RRNodeId(from_node), iedge); auto switch_type = rr_graph.rr_switch_inf(RRSwitchId(switch_index)).type(); @@ -434,7 +434,7 @@ void count_unidir_routing_transistors(std::vector& /*segment_inf* break; - case IPIN: + case e_rr_type::IPIN: num_inputs_to_cblock[size_t(to_node)]++; max_inputs_to_cblock = std::max(max_inputs_to_cblock, num_inputs_to_cblock[size_t(to_node)]); @@ -446,7 +446,7 @@ void count_unidir_routing_transistors(std::vector& /*segment_inf* } break; - case SINK: + case e_rr_type::SINK: break; //ignore virtual sinks default: @@ -461,7 +461,7 @@ void count_unidir_routing_transistors(std::vector& /*segment_inf* } /* End for each edge. */ /* Reset some flags */ - if (from_rr_type == CHANX) { + if (from_rr_type == e_rr_type::CHANX) { for (i = rr_graph.node_xlow(from_rr_node); i <= rr_graph.node_xhigh(from_rr_node); i++) cblock_counted[i] = false; @@ -471,7 +471,7 @@ void count_unidir_routing_transistors(std::vector& /*segment_inf* cblock_counted[j] = false; } break; - case OPIN: + case e_rr_type::OPIN: break; default: diff --git a/vpr/src/route/rr_graph_timing_params.cpp b/vpr/src/route/rr_graph_timing_params.cpp index d2c478dffe6..754848fae74 100644 --- a/vpr/src/route/rr_graph_timing_params.cpp +++ b/vpr/src/route/rr_graph_timing_params.cpp @@ -53,12 +53,12 @@ void add_rr_graph_C_from_switches(float C_ipin_cblock) { from_rr_type = rr_graph.node_type(rr_id); - if ((from_rr_type == CHANX || from_rr_type == CHANY)) { + if ((from_rr_type == t_rr_type::CHANX || from_rr_type == t_rr_type::CHANY)) { for (t_edge_size iedge = 0; iedge < rr_graph.num_edges(rr_id); iedge++) { to_node = size_t(rr_graph.edge_sink_node(rr_id, iedge)); to_rr_type = rr_graph.node_type(RRNodeId(to_node)); - if (to_rr_type == CHANX || to_rr_type == CHANY) { + if (to_rr_type == t_rr_type::CHANX || to_rr_type == t_rr_type::CHANY) { switch_index = rr_graph.edge_switch(rr_id, iedge); Cin = rr_graph.rr_switch_inf(RRSwitchId(switch_index)).Cin; Cout = rr_graph.rr_switch_inf(RRSwitchId(switch_index)).Cout; @@ -99,7 +99,7 @@ void add_rr_graph_C_from_switches(float C_ipin_cblock) { } /* End edge to CHANX or CHANY node. */ - else if (to_rr_type == IPIN) { + else if (to_rr_type == t_rr_type::IPIN) { if (INCLUDE_TRACK_BUFFERS) { /* Implements sharing of the track to connection box buffer. * Such a buffer exists at every segment of the wire at which @@ -129,7 +129,7 @@ void add_rr_graph_C_from_switches(float C_ipin_cblock) { * } * } */ - if (from_rr_type == CHANX) { + if (from_rr_type == t_rr_type::CHANX) { iseg_low = rr_graph.node_xlow(rr_id); iseg_high = rr_graph.node_xhigh(rr_id); } else { /* CHANY */ @@ -148,13 +148,13 @@ void add_rr_graph_C_from_switches(float C_ipin_cblock) { } /* End node is CHANX or CHANY */ - else if (from_rr_type == OPIN) { + else if (from_rr_type == t_rr_type::OPIN) { for (t_edge_size iedge = 0; iedge < rr_graph.num_edges(rr_id); iedge++) { switch_index = rr_graph.edge_switch(rr_id, iedge); to_node = size_t(rr_graph.edge_sink_node(rr_id, iedge)); to_rr_type = rr_graph.node_type(RRNodeId(to_node)); - if (to_rr_type != CHANX && to_rr_type != CHANY) + if (to_rr_type != t_rr_type::CHANX && to_rr_type != t_rr_type::CHANY) continue; if (rr_graph.node_direction(RRNodeId(to_node)) == Direction::BIDIR) { @@ -179,7 +179,7 @@ void add_rr_graph_C_from_switches(float C_ipin_cblock) { switch_index = rr_graph.edge_switch(inode, iedge); to_node = size_t(rr_graph.edge_sink_node(inode, iedge)); to_rr_type = rr_graph.node_type(RRNodeId(to_node)); - if (to_rr_type == CHANX || to_rr_type == CHANY) { + if (to_rr_type == t_rr_type::CHANX || to_rr_type == t_rr_type::CHANY) { if (rr_graph.node_direction(RRNodeId(to_node)) != Direction::BIDIR) { /* Cout was not added in these cases */ Couts_to_add[to_node] = std::max(Couts_to_add[to_node], rr_graph.rr_switch_inf(RRSwitchId(switch_index)).Cout); diff --git a/vpr/src/route/segment_stats.cpp b/vpr/src/route/segment_stats.cpp index f05e0874cdb..3d7de733ce3 100644 --- a/vpr/src/route/segment_stats.cpp +++ b/vpr/src/route/segment_stats.cpp @@ -1,4 +1,3 @@ -#include #include "vtr_log.h" #include "vtr_memory.h" @@ -60,14 +59,14 @@ void get_segment_usage_stats(std::vector& segment_inf) { for (RRNodeId inode : device_ctx.rr_graph.nodes()) { auto node_type = rr_graph.node_type(inode); - if (node_type == CHANX || node_type == CHANY) { + if (node_type == e_rr_type::CHANX || node_type == e_rr_type::CHANY) { cost_index = rr_graph.node_cost_index(inode); size_t seg_type = device_ctx.rr_indexed_data[cost_index].seg_index; int length = segment_inf[seg_type].longline ? LONGLINE : segment_inf[seg_type].length; const short& inode_capacity = rr_graph.node_capacity(inode); int occ = route_ctx.rr_node_route_inf[inode].occ(); - auto ax = (node_type == CHANX) ? X_AXIS : Y_AXIS; + auto ax = (node_type == e_rr_type::CHANX) ? X_AXIS : Y_AXIS; directed_occ_by_length[ax][length] += occ; directed_cap_by_length[ax][length] += inode_capacity; diff --git a/vpr/src/timing/VprTimingGraphResolver.cpp b/vpr/src/timing/VprTimingGraphResolver.cpp index 791615e5585..81fbef6db39 100644 --- a/vpr/src/timing/VprTimingGraphResolver.cpp +++ b/vpr/src/timing/VprTimingGraphResolver.cpp @@ -342,11 +342,11 @@ void VprTimingGraphResolver::get_detailed_interconnect_components_helper(std::ve // Process the current interconnect component if it is of type OPIN, CHANX, CHANY, IPIN // Only process SOURCE, SINK in debug report mode auto rr_type = rr_graph.node_type(RRNodeId(current_node->inode)); - if (rr_type == OPIN - || rr_type == IPIN - || rr_type == CHANX - || rr_type == CHANY - || ((rr_type == SOURCE || rr_type == SINK) && (detail_level() == e_timing_report_detail::DEBUG))) { + if (rr_type == t_rr_type::OPIN + || rr_type == t_rr_type::IPIN + || rr_type == t_rr_type::CHANX + || rr_type == t_rr_type::CHANY + || ((rr_type == t_rr_type::SOURCE || rr_type == t_rr_type::SINK) && (detail_level() == e_timing_report_detail::DEBUG))) { tatum::DelayComponent net_component; // declare a new instance of DelayComponent net_component.type_name = rr_graph.node_coordinate_to_string(RRNodeId(current_node->inode)); diff --git a/vpr/src/util/vpr_utils.cpp b/vpr/src/util/vpr_utils.cpp index 853725c5bb9..f86a56328a6 100644 --- a/vpr/src/util/vpr_utils.cpp +++ b/vpr/src/util/vpr_utils.cpp @@ -93,13 +93,13 @@ std::string rr_node_arch_name(RRNodeId inode, bool is_flat) { auto rr_node = inode; std::string rr_node_arch_name; - if (rr_graph.node_type(inode) == OPIN || rr_graph.node_type(inode) == IPIN) { + if (rr_graph.node_type(inode) == e_rr_type::OPIN || rr_graph.node_type(inode) == e_rr_type::IPIN) { //Pin names auto type = device_ctx.grid.get_physical_type({rr_graph.node_xlow(rr_node), rr_graph.node_ylow(rr_node), rr_graph.node_layer(rr_node)}); rr_node_arch_name += block_type_pin_index_to_name(type, rr_graph.node_pin_num(rr_node), is_flat); - } else if (rr_graph.node_type(inode) == SOURCE || rr_graph.node_type(inode) == SINK) { + } else if (rr_graph.node_type(inode) == e_rr_type::SOURCE || rr_graph.node_type(inode) == e_rr_type::SINK) { //Set of pins associated with SOURCE/SINK auto type = device_ctx.grid.get_physical_type({rr_graph.node_xlow(rr_node), rr_graph.node_ylow(rr_node), @@ -115,7 +115,7 @@ std::string rr_node_arch_name(RRNodeId inode, bool is_flat) { rr_node_arch_name += pin_names[0]; } } else { - VTR_ASSERT(rr_graph.node_type(inode) == CHANX || rr_graph.node_type(inode) == CHANY); + VTR_ASSERT(rr_graph.node_type(inode) == e_rr_type::CHANX || rr_graph.node_type(inode) == e_rr_type::CHANY); //Wire segment name auto cost_index = rr_graph.node_cost_index(inode); int seg_index = device_ctx.rr_indexed_data[cost_index].seg_index; @@ -1737,7 +1737,7 @@ std::vector get_all_pb_graph_node_primitives(const t_pb_ bool is_inter_cluster_node(const RRGraphView& rr_graph_view, RRNodeId node_id) { auto node_type = rr_graph_view.node_type(node_id); - if (node_type == CHANX || node_type == CHANY) { + if (node_type == e_rr_type::CHANX || node_type == e_rr_type::CHANY) { return true; } else { int x_low = rr_graph_view.node_xlow(node_id); @@ -1745,10 +1745,10 @@ bool is_inter_cluster_node(const RRGraphView& rr_graph_view, int layer = rr_graph_view.node_layer(node_id); int node_ptc = rr_graph_view.node_ptc_num(node_id); const t_physical_tile_type_ptr physical_tile = g_vpr_ctx.device().grid.get_physical_type({x_low, y_low, layer}); - if (node_type == IPIN || node_type == OPIN) { + if (node_type == e_rr_type::IPIN || node_type == e_rr_type::OPIN) { return is_pin_on_tile(physical_tile, node_ptc); } else { - VTR_ASSERT_DEBUG(node_type == SINK || node_type == SOURCE); + VTR_ASSERT_DEBUG(node_type == e_rr_type::SINK || node_type == e_rr_type::SOURCE); return is_class_on_tile(physical_tile, node_ptc); } } @@ -1759,14 +1759,14 @@ int get_rr_node_max_ptc(const RRGraphView& rr_graph_view, bool is_flat) { auto node_type = rr_graph_view.node_type(node_id); - VTR_ASSERT(node_type == IPIN || node_type == OPIN || node_type == SINK || node_type == SOURCE); + VTR_ASSERT(node_type == e_rr_type::IPIN || node_type == e_rr_type::OPIN || node_type == e_rr_type::SINK || node_type == e_rr_type::SOURCE); const DeviceContext& device_ctx = g_vpr_ctx.device(); auto physical_type = device_ctx.grid.get_physical_type({rr_graph_view.node_xlow(node_id), rr_graph_view.node_ylow(node_id), rr_graph_view.node_layer(node_id)}); - if (node_type == SINK || node_type == SOURCE) { + if (node_type == e_rr_type::SINK || node_type == e_rr_type::SOURCE) { return get_tile_class_max_ptc(physical_type, is_flat); } else { return get_tile_pin_max_ptc(physical_type, is_flat); @@ -1850,18 +1850,18 @@ bool directconnect_exists(RRNodeId src_rr_node, RRNodeId sink_rr_node) { const auto& device_ctx = g_vpr_ctx.device(); const auto& rr_graph = device_ctx.rr_graph; - VTR_ASSERT(rr_graph.node_type(src_rr_node) == SOURCE && rr_graph.node_type(sink_rr_node) == SINK); + VTR_ASSERT(rr_graph.node_type(src_rr_node) == e_rr_type::SOURCE && rr_graph.node_type(sink_rr_node) == e_rr_type::SINK); // A direct connection is defined as a specific path: `SOURCE -> OPIN -> IPIN -> SINK`. //TODO: This is a constant depth search, but still may be too slow for (t_edge_size i_src_edge = 0; i_src_edge < rr_graph.num_edges(src_rr_node); ++i_src_edge) { RRNodeId opin_rr_node = rr_graph.edge_sink_node(src_rr_node, i_src_edge); - if (rr_graph.node_type(opin_rr_node) != OPIN) continue; + if (rr_graph.node_type(opin_rr_node) != e_rr_type::OPIN) continue; for (t_edge_size i_opin_edge = 0; i_opin_edge < rr_graph.num_edges(opin_rr_node); ++i_opin_edge) { RRNodeId ipin_rr_node = rr_graph.edge_sink_node(opin_rr_node, i_opin_edge); - if (rr_graph.node_type(ipin_rr_node) != IPIN) continue; + if (rr_graph.node_type(ipin_rr_node) != e_rr_type::IPIN) continue; for (t_edge_size i_ipin_edge = 0; i_ipin_edge < rr_graph.num_edges(ipin_rr_node); ++i_ipin_edge) { if (sink_rr_node == rr_graph.edge_sink_node(ipin_rr_node, i_ipin_edge)) { diff --git a/vpr/test/test_vpr.cpp b/vpr/test/test_vpr.cpp index c05d33e54f9..99651bfe5cd 100644 --- a/vpr/test/test_vpr.cpp +++ b/vpr/test/test_vpr.cpp @@ -142,7 +142,7 @@ TEST_CASE("read_rr_graph_metadata", "[vpr]") { const char* echo_file_name = getEchoFileName(E_ECHO_RR_GRAPH_INDEXED_DATA); for (const RRNodeId& inode : device_ctx.rr_graph.nodes()) { - if ((rr_graph.node_type(inode) == CHANX || rr_graph.node_type(inode) == CHANY) && rr_graph.num_edges(inode) > 0) { + if ((rr_graph.node_type(inode) == e_rr_type::CHANX || rr_graph.node_type(inode) == e_rr_type::CHANY) && rr_graph.num_edges(inode) > 0) { src_inode = size_t(inode); break; } @@ -267,7 +267,7 @@ TEST_CASE("read_rr_edge_override", "[vpr]") { const char* echo_file_name = getEchoFileName(E_ECHO_RR_GRAPH_INDEXED_DATA); for (const RRNodeId inode : device_ctx.rr_graph.nodes()) { - if ((rr_graph.node_type(inode) == CHANX || rr_graph.node_type(inode) == CHANY) && rr_graph.num_edges(inode) > 0) { + if ((rr_graph.node_type(inode) == e_rr_type::CHANX || rr_graph.node_type(inode) == e_rr_type::CHANY) && rr_graph.num_edges(inode) > 0) { src_inode = inode; break; } From 161f605833889bab4530fa310866b825ff4b0ceb Mon Sep 17 00:00:00 2001 From: soheilshahrouz Date: Fri, 25 Apr 2025 12:40:55 -0400 Subject: [PATCH 02/12] remove typedef t_rr_type --- libs/librrgraph/src/base/check_rr_graph.cpp | 78 +++++++-------- .../src/base/check_rr_graph_obj.cpp | 4 +- libs/librrgraph/src/base/rr_graph_builder.cpp | 14 +-- libs/librrgraph/src/base/rr_graph_builder.h | 2 +- libs/librrgraph/src/base/rr_graph_obj.cpp | 8 +- libs/librrgraph/src/base/rr_graph_obj.h | 14 +-- libs/librrgraph/src/base/rr_graph_storage.cpp | 8 +- libs/librrgraph/src/base/rr_graph_storage.h | 8 +- libs/librrgraph/src/base/rr_graph_utils.cpp | 24 ++--- libs/librrgraph/src/base/rr_graph_utils.h | 2 +- libs/librrgraph/src/base/rr_graph_view.h | 4 +- libs/librrgraph/src/base/rr_node_types.h | 10 +- .../librrgraph/src/base/rr_spatial_lookup.cpp | 24 ++--- libs/librrgraph/src/base/rr_spatial_lookup.h | 22 ++--- .../src/io/rr_graph_uxsdcxx_serializer.h | 6 +- .../utils/alloc_and_load_rr_indexed_data.cpp | 6 +- vpr/src/base/read_route.cpp | 2 +- vpr/src/base/stats.cpp | 16 ++-- vpr/src/base/vpr_types.h | 6 +- vpr/src/draw/draw.cpp | 6 +- vpr/src/draw/draw_basic.cpp | 38 ++++---- vpr/src/draw/draw_rr.cpp | 96 +++++++++---------- vpr/src/draw/draw_rr_edges.cpp | 2 +- vpr/src/pack/post_routing_pb_pin_fixup.cpp | 2 +- .../pack/sync_netlists_to_routing_flat.cpp | 8 +- .../compute_delta_delays_utils.cpp | 6 +- vpr/src/route/annotate_routing.cpp | 4 +- vpr/src/route/build_switchblocks.cpp | 18 ++-- vpr/src/route/check_route.cpp | 52 +++++----- vpr/src/route/connection_router.cpp | 20 ++-- vpr/src/route/overuse_report.cpp | 16 ++-- vpr/src/route/route.cpp | 2 +- vpr/src/route/route_common.cpp | 4 +- vpr/src/route/route_net.cpp | 2 +- vpr/src/route/route_profiling.cpp | 4 +- vpr/src/route/route_utilization.cpp | 4 +- vpr/src/route/route_utilization.h | 4 +- vpr/src/route/router_lookahead.cpp | 4 +- .../route/router_lookahead_compressed_map.cpp | 28 +++--- .../route/router_lookahead_extended_map.cpp | 2 +- vpr/src/route/router_lookahead_map.cpp | 8 +- vpr/src/route/router_lookahead_map_utils.cpp | 4 +- vpr/src/route/router_lookahead_map_utils.h | 2 +- vpr/src/route/router_stats.h | 12 +-- vpr/src/route/rr_graph.cpp | 50 +++++----- vpr/src/route/rr_graph2.cpp | 36 +++---- vpr/src/route/rr_graph2.h | 6 +- vpr/src/route/rr_graph_area.cpp | 4 +- vpr/src/route/rr_graph_sbox.h | 4 +- vpr/src/route/rr_graph_timing_params.cpp | 16 ++-- vpr/src/timing/VprTimingGraphResolver.cpp | 10 +- vpr/src/util/vpr_utils.cpp | 12 +-- 52 files changed, 372 insertions(+), 372 deletions(-) diff --git a/libs/librrgraph/src/base/check_rr_graph.cpp b/libs/librrgraph/src/base/check_rr_graph.cpp index f74995aeff9..72ab0966645 100644 --- a/libs/librrgraph/src/base/check_rr_graph.cpp +++ b/libs/librrgraph/src/base/check_rr_graph.cpp @@ -80,7 +80,7 @@ void check_rr_graph(const RRGraphView& rr_graph, continue; } - t_rr_type rr_type = rr_graph.node_type(rr_node); + e_rr_type rr_type = rr_graph.node_type(rr_node); int num_edges = rr_graph.num_edges(RRNodeId(inode)); check_rr_node(rr_graph, rr_indexed_data, grid, chan_width, route_type, inode, is_flat); @@ -137,7 +137,7 @@ void check_rr_graph(const RRGraphView& rr_graph, VTR_ASSERT_MSG(num_edges_to_node > 1, "Expect multiple edges"); - t_rr_type to_rr_type = rr_graph.node_type(RRNodeId(to_node)); + e_rr_type to_rr_type = rr_graph.node_type(RRNodeId(to_node)); /* It is unusual to have more than one programmable switch (in the same direction) between a from_node and a to_node, * as the duplicate switch doesn't add more routing flexibility. @@ -154,12 +154,12 @@ void check_rr_graph(const RRGraphView& rr_graph, * - CHAN -> IPIN connections (unique rr_node for IPIN nodes on multiple sides) * - OPIN -> CHAN connections (unique rr_node for OPIN nodes on multiple sides) */ - bool is_chan_to_chan = (rr_type == t_rr_type::CHANX || rr_type == t_rr_type::CHANY) && (to_rr_type == t_rr_type::CHANY || to_rr_type == t_rr_type::CHANX); - bool is_chan_to_ipin = (rr_type == t_rr_type::CHANX || rr_type == t_rr_type::CHANY) && to_rr_type == t_rr_type::IPIN; - bool is_opin_to_chan = rr_type == t_rr_type::OPIN && (to_rr_type == t_rr_type::CHANX || to_rr_type == t_rr_type::CHANY); + bool is_chan_to_chan = (rr_type == e_rr_type::CHANX || rr_type == e_rr_type::CHANY) && (to_rr_type == e_rr_type::CHANY || to_rr_type == e_rr_type::CHANX); + bool is_chan_to_ipin = (rr_type == e_rr_type::CHANX || rr_type == e_rr_type::CHANY) && to_rr_type == e_rr_type::IPIN; + bool is_opin_to_chan = rr_type == e_rr_type::OPIN && (to_rr_type == e_rr_type::CHANX || to_rr_type == e_rr_type::CHANY); bool is_internal_edge = false; if (is_flat) { - is_internal_edge = (rr_type == t_rr_type::IPIN && to_rr_type == t_rr_type::IPIN) || (rr_type == t_rr_type::OPIN && to_rr_type == t_rr_type::OPIN); + is_internal_edge = (rr_type == e_rr_type::IPIN && to_rr_type == e_rr_type::IPIN) || (rr_type == e_rr_type::OPIN && to_rr_type == e_rr_type::OPIN); } if (!(is_chan_to_chan || is_chan_to_ipin || is_opin_to_chan || is_internal_edge)) { VPR_ERROR(VPR_ERROR_ROUTE, @@ -168,8 +168,8 @@ void check_rr_graph(const RRGraphView& rr_graph, } //Between two wire segments - VTR_ASSERT_MSG(to_rr_type == t_rr_type::CHANX || to_rr_type == t_rr_type::CHANY || to_rr_type == t_rr_type::IPIN, "Expect channel type or input pin type"); - VTR_ASSERT_MSG(rr_type == t_rr_type::CHANX || rr_type == t_rr_type::CHANY || rr_type == t_rr_type::OPIN, "Expect channel type or output pin type"); + VTR_ASSERT_MSG(to_rr_type == e_rr_type::CHANX || to_rr_type == e_rr_type::CHANY || to_rr_type == e_rr_type::IPIN, "Expect channel type or input pin type"); + VTR_ASSERT_MSG(rr_type == e_rr_type::CHANX || rr_type == e_rr_type::CHANY || rr_type == e_rr_type::OPIN, "Expect channel type or output pin type"); //While multiple connections between the same wires can be electrically legal, //they are redundant if they are of the same switch type. @@ -190,8 +190,8 @@ void check_rr_graph(const RRGraphView& rr_graph, /* Redundant edges are not allowed for chan <-> chan connections * but allowed for input pin <-> chan or output pin <-> chan connections */ - if ((to_rr_type == t_rr_type::CHANX || to_rr_type == t_rr_type::CHANY) - && (rr_type == t_rr_type::CHANX || rr_type == t_rr_type::CHANY)) { + if ((to_rr_type == e_rr_type::CHANX || to_rr_type == e_rr_type::CHANY) + && (rr_type == e_rr_type::CHANX || rr_type == e_rr_type::CHANY)) { auto switch_type = rr_graph.rr_switch_inf(RRSwitchId(kv.first)).type(); VPR_ERROR(VPR_ERROR_ROUTE, "in check_rr_graph: node %d has %d redundant connections to node %d of switch type %d (%s)", @@ -232,7 +232,7 @@ void check_rr_graph(const RRGraphView& rr_graph, for (const RRNodeId& rr_node : rr_graph.nodes()) { size_t inode = (size_t)rr_node; - t_rr_type rr_type = rr_graph.node_type(rr_node); + e_rr_type rr_type = rr_graph.node_type(rr_node); int ptc_num = rr_graph.node_ptc_num(rr_node); int layer_num = rr_graph.node_layer(rr_node); int xlow = rr_graph.node_xlow(rr_node); @@ -240,7 +240,7 @@ void check_rr_graph(const RRGraphView& rr_graph, t_physical_tile_type_ptr type = grid.get_physical_type({xlow, ylow, layer_num}); - if (rr_type == t_rr_type::IPIN || rr_type == t_rr_type::OPIN) { + if (rr_type == e_rr_type::IPIN || rr_type == e_rr_type::OPIN) { // #TODO: No edges are added for internal pins. However, they need to be checked somehow! if (ptc_num >= type->num_pins) { VTR_LOG_ERROR("in check_rr_graph: node %d (%s) type: %s is internal node.\n", @@ -248,14 +248,14 @@ void check_rr_graph(const RRGraphView& rr_graph, } } - if (rr_type != t_rr_type::SOURCE) { + if (rr_type != e_rr_type::SOURCE) { if (total_edges_to_node[inode] < 1 && !rr_node_is_global_clb_ipin(rr_graph, grid, rr_node)) { /* A global CLB input pin will not have any edges, and neither will * * a SOURCE or the start of a carry-chain. Anything else is an error. * For simplicity, carry-chain input pin are entirely ignored in this test */ bool is_chain = false; - if (rr_type == t_rr_type::IPIN) { + if (rr_type == e_rr_type::IPIN) { for (const t_fc_specification& fc_spec : types[type->index].fc_specs) { if (fc_spec.fc_value == 0 && fc_spec.seg_index == 0) { is_chain = true; @@ -269,11 +269,11 @@ void check_rr_graph(const RRGraphView& rr_graph, || (rr_graph.node_ylow(rr_node) == 1) || (rr_graph.node_xhigh(rr_node) == int(grid.width()) - 2) || (rr_graph.node_yhigh(rr_node) == int(grid.height()) - 2)); - bool is_wire = (rr_graph.node_type(rr_node) == t_rr_type::CHANX - || rr_graph.node_type(rr_node) == t_rr_type::CHANY); + bool is_wire = (rr_graph.node_type(rr_node) == e_rr_type::CHANX + || rr_graph.node_type(rr_node) == e_rr_type::CHANY); if (!is_chain && !is_fringe && !is_wire) { - if (rr_graph.node_type(rr_node) == t_rr_type::IPIN || rr_graph.node_type(rr_node) == t_rr_type::OPIN) { + if (rr_graph.node_type(rr_node) == e_rr_type::IPIN || rr_graph.node_type(rr_node) == e_rr_type::OPIN) { if (has_adjacent_channel(rr_graph, grid, node)) { auto block_type = grid.get_physical_type({rr_graph.node_xlow(rr_node), rr_graph.node_ylow(rr_node), @@ -320,7 +320,7 @@ static bool rr_node_is_global_clb_ipin(const RRGraphView& rr_graph, const Device rr_graph.node_ylow(inode), rr_graph.node_layer(inode)}); - if (rr_graph.node_type(inode) != t_rr_type::IPIN) + if (rr_graph.node_type(inode) != e_rr_type::IPIN) return (false); ipin = rr_graph.node_pin_num(inode); @@ -342,7 +342,7 @@ void check_rr_node(const RRGraphView& rr_graph, //Make sure over-flow doesn't happen VTR_ASSERT(inode >= 0); int xlow, ylow, xhigh, yhigh, layer_num, ptc_num, capacity; - t_rr_type rr_type; + e_rr_type rr_type; t_physical_tile_type_ptr type; int nodes_per_chan, tracks_per_node; RRIndexedDataId cost_index; @@ -389,7 +389,7 @@ void check_rr_node(const RRGraphView& rr_graph, type = grid.get_physical_type({xlow, ylow, layer_num}); switch (rr_type) { - case t_rr_type::SOURCE: + case e_rr_type::SOURCE: if (type == nullptr) { VPR_FATAL_ERROR(VPR_ERROR_ROUTE, "in check_rr_node: node %d (type %d) is at an illegal clb location (%d, %d).\n", inode, rr_type, xlow, ylow); @@ -400,7 +400,7 @@ void check_rr_node(const RRGraphView& rr_graph, "in check_rr_node: node %d (type %d) has endpoints (%d,%d) and (%d,%d)\n", inode, rr_type, xlow, ylow, xhigh, yhigh); } break; - case t_rr_type::SINK: { + case e_rr_type::SINK: { if (type == nullptr) { VPR_FATAL_ERROR(VPR_ERROR_ROUTE, "in check_rr_node: node %d (type %d) is at an illegal clb location (%d, %d).\n", inode, rr_type, xlow, ylow); @@ -413,8 +413,8 @@ void check_rr_node(const RRGraphView& rr_graph, } break; } - case t_rr_type::IPIN: - case t_rr_type::OPIN: + case e_rr_type::IPIN: + case e_rr_type::OPIN: if (type == nullptr) { VPR_FATAL_ERROR(VPR_ERROR_ROUTE, "in check_rr_node: node %d (type %d) is at an illegal clb location (%d, %d).\n", inode, rr_type, xlow, ylow); @@ -425,7 +425,7 @@ void check_rr_node(const RRGraphView& rr_graph, } break; - case t_rr_type::CHANX: + case e_rr_type::CHANX: if (xlow < 1 || xhigh > int(grid.width()) - 2 || yhigh > int(grid.height()) - 2 || yhigh != ylow) { VPR_FATAL_ERROR(VPR_ERROR_ROUTE, "in check_rr_node: CHANX out of range for endpoints (%d,%d) and (%d,%d)\n", xlow, ylow, xhigh, yhigh); @@ -436,7 +436,7 @@ void check_rr_node(const RRGraphView& rr_graph, } break; - case t_rr_type::CHANY: + case e_rr_type::CHANY: if (xhigh > int(grid.width()) - 2 || ylow < 1 || yhigh > int(grid.height()) - 2 || xlow != xhigh) { VPR_FATAL_ERROR(VPR_ERROR_ROUTE, "Error in check_rr_node: CHANY out of range for endpoints (%d,%d) and (%d,%d)\n", xlow, ylow, xhigh, yhigh); @@ -459,12 +459,12 @@ void check_rr_node(const RRGraphView& rr_graph, e_pin_type class_type = OPEN; int class_num_pins = -1; switch (rr_type) { - case t_rr_type::SOURCE: - case t_rr_type::SINK: + case e_rr_type::SOURCE: + case e_rr_type::SINK: class_type = get_class_type_from_class_physical_num(type, ptc_num); class_num_pins = get_class_num_pins_from_class_physical_num(type, ptc_num); if (ptc_num >= class_max_ptc - || class_type != ((rr_type == t_rr_type::SOURCE) ? DRIVER : RECEIVER)) { + || class_type != ((rr_type == e_rr_type::SOURCE) ? DRIVER : RECEIVER)) { VPR_ERROR(VPR_ERROR_ROUTE, "in check_rr_node: inode %d (type %d) had a ptc_num of %d.\n", inode, rr_type, ptc_num); } @@ -474,11 +474,11 @@ void check_rr_node(const RRGraphView& rr_graph, } break; - case t_rr_type::OPIN: - case t_rr_type::IPIN: + case e_rr_type::OPIN: + case e_rr_type::IPIN: class_type = get_pin_type_from_pin_physical_num(type, ptc_num); if (ptc_num >= pin_max_ptc - || class_type != ((rr_type == t_rr_type::OPIN) ? DRIVER : RECEIVER)) { + || class_type != ((rr_type == e_rr_type::OPIN) ? DRIVER : RECEIVER)) { VPR_ERROR(VPR_ERROR_ROUTE, "in check_rr_node: inode %d (type %d) had a ptc_num of %d.\n", inode, rr_type, ptc_num); } @@ -488,14 +488,14 @@ void check_rr_node(const RRGraphView& rr_graph, } break; - case t_rr_type::CHANX: - case t_rr_type::CHANY: + case e_rr_type::CHANX: + case e_rr_type::CHANY: if (route_type == DETAILED) { nodes_per_chan = chan_width.max; tracks_per_node = 1; } else { nodes_per_chan = 1; - tracks_per_node = ((rr_type == t_rr_type::CHANX) ? chan_width.x_list[ylow] : chan_width.y_list[xlow]); + tracks_per_node = ((rr_type == e_rr_type::CHANX) ? chan_width.x_list[ylow] : chan_width.y_list[xlow]); } //if a chanx/chany has length 0, it means it is used to connect different dice together @@ -522,7 +522,7 @@ void check_rr_node(const RRGraphView& rr_graph, C = rr_graph.node_C(rr_node); R = rr_graph.node_R(rr_node); - if (rr_type == t_rr_type::CHANX || rr_type == t_rr_type::CHANY) { + if (rr_type == e_rr_type::CHANX || rr_type == e_rr_type::CHANY) { if (C < 0. || R < 0.) { VPR_ERROR(VPR_ERROR_ROUTE, "in check_rr_node: node %d of type %d has R = %g and C = %g.\n", inode, rr_type, R, C); @@ -540,12 +540,12 @@ static void check_unbuffered_edges(const RRGraphView& rr_graph, int from_node) { * bidirectional. It may be a slow check, so don't use it all the time. */ int from_edge, to_node, to_edge, from_num_edges, to_num_edges; - t_rr_type from_rr_type, to_rr_type; + e_rr_type from_rr_type, to_rr_type; short from_switch_type; bool trans_matched; from_rr_type = rr_graph.node_type(RRNodeId(from_node)); - if (from_rr_type != t_rr_type::CHANX && from_rr_type != t_rr_type::CHANY) + if (from_rr_type != e_rr_type::CHANX && from_rr_type != e_rr_type::CHANY) return; from_num_edges = rr_graph.num_edges(RRNodeId(from_node)); @@ -554,7 +554,7 @@ static void check_unbuffered_edges(const RRGraphView& rr_graph, int from_node) { to_node = size_t(rr_graph.edge_sink_node(RRNodeId(from_node), from_edge)); to_rr_type = rr_graph.node_type(RRNodeId(to_node)); - if (to_rr_type != t_rr_type::CHANX && to_rr_type != t_rr_type::CHANY) + if (to_rr_type != e_rr_type::CHANX && to_rr_type != e_rr_type::CHANY) continue; from_switch_type = rr_graph.edge_switch(RRNodeId(from_node), from_edge); @@ -592,7 +592,7 @@ static bool has_adjacent_channel(const RRGraphView& rr_graph, const DeviceGrid& /* TODO: this function should be reworked later to adapt RRGraphView interface * once xlow(), ylow(), side() APIs are implemented */ - VTR_ASSERT(rr_graph.node_type(node.id()) == t_rr_type::IPIN || rr_graph.node_type(node.id()) == e_rr_type::OPIN); + VTR_ASSERT(rr_graph.node_type(node.id()) == e_rr_type::IPIN || rr_graph.node_type(node.id()) == e_rr_type::OPIN); if ((rr_graph.node_xlow(node.id()) == 0 && !rr_graph.is_node_on_specific_side(node.id(), RIGHT)) //left device edge connects only along block's right side || (rr_graph.node_ylow(node.id()) == int(grid.height() - 1) && !rr_graph.is_node_on_specific_side(node.id(), BOTTOM)) //top device edge connects only along block's bottom side diff --git a/libs/librrgraph/src/base/check_rr_graph_obj.cpp b/libs/librrgraph/src/base/check_rr_graph_obj.cpp index 300b2dd9515..9ab1d7f2a3d 100644 --- a/libs/librrgraph/src/base/check_rr_graph_obj.cpp +++ b/libs/librrgraph/src/base/check_rr_graph_obj.cpp @@ -94,7 +94,7 @@ static bool check_rr_graph_source_nodes(const RRGraph& rr_graph) { */ for (auto node : rr_graph.nodes()) { /* Pass nodes whose types are not SOURCE */ - if (t_rr_type::SOURCE != rr_graph.node_type(node)) { + if (e_rr_type::SOURCE != rr_graph.node_type(node)) { continue; } if ((0 != rr_graph.node_fan_in(node)) @@ -123,7 +123,7 @@ static bool check_rr_graph_sink_nodes(const RRGraph& rr_graph) { */ for (auto node : rr_graph.nodes()) { /* Pass nodes whose types are not SINK */ - if (t_rr_type::SINK != rr_graph.node_type(node)) { + if (e_rr_type::SINK != rr_graph.node_type(node)) { continue; } if ((0 == rr_graph.node_fan_in(node)) diff --git a/libs/librrgraph/src/base/rr_graph_builder.cpp b/libs/librrgraph/src/base/rr_graph_builder.cpp index 9233639a9ab..48852706c52 100644 --- a/libs/librrgraph/src/base/rr_graph_builder.cpp +++ b/libs/librrgraph/src/base/rr_graph_builder.cpp @@ -26,7 +26,7 @@ MetadataStorage>& RRGraphBuilder::rr_edge_metadata() } void RRGraphBuilder::add_node_to_all_locs(RRNodeId node) { - t_rr_type node_type = node_storage_.node_type(node); + e_rr_type node_type = node_storage_.node_type(node); short node_ptc_num = node_storage_.node_ptc_num(node); short node_layer = node_storage_.node_layer(node); short node_twist = node_storage_.node_ptc_twist(node); @@ -36,20 +36,20 @@ void RRGraphBuilder::add_node_to_all_locs(RRNodeId node) { node_ptc_num += node_twist * node_offset; node_offset++; switch (node_type) { - case t_rr_type::SOURCE: - case t_rr_type::SINK: - case t_rr_type::CHANY: + case e_rr_type::SOURCE: + case e_rr_type::SINK: + case e_rr_type::CHANY: node_lookup_.add_node(node, node_layer, ix, iy, node_type, node_ptc_num, TOTAL_2D_SIDES[0]); break; - case t_rr_type::CHANX: + case e_rr_type::CHANX: /* Currently need to swap x and y for CHANX because of chan, seg convention * TODO: Once the builders is reworked for use consistent (x, y) convention, * the following swapping can be removed */ node_lookup_.add_node(node, node_layer, iy, ix, node_type, node_ptc_num, TOTAL_2D_SIDES[0]); break; - case t_rr_type::OPIN: - case t_rr_type::IPIN: + case e_rr_type::OPIN: + case e_rr_type::IPIN: for (const e_side& side : TOTAL_2D_SIDES) { if (node_storage_.is_node_on_specific_side(node, side)) { node_lookup_.add_node(node,node_layer, ix, iy, node_type, node_ptc_num, side); diff --git a/libs/librrgraph/src/base/rr_graph_builder.h b/libs/librrgraph/src/base/rr_graph_builder.h index 4844a785d70..487457e7bc5 100644 --- a/libs/librrgraph/src/base/rr_graph_builder.h +++ b/libs/librrgraph/src/base/rr_graph_builder.h @@ -119,7 +119,7 @@ class RRGraphBuilder { } /** @brief Set the type of a node with a given valid id */ - inline void set_node_type(RRNodeId id, t_rr_type type) { + inline void set_node_type(RRNodeId id, e_rr_type type) { node_storage_.set_node_type(id, type); } diff --git a/libs/librrgraph/src/base/rr_graph_obj.cpp b/libs/librrgraph/src/base/rr_graph_obj.cpp index 91c18e9cb4c..9f52f523eb7 100644 --- a/libs/librrgraph/src/base/rr_graph_obj.cpp +++ b/libs/librrgraph/src/base/rr_graph_obj.cpp @@ -32,7 +32,7 @@ RRGraph::segment_range RRGraph::segments() const { } //Node attributes -t_rr_type RRGraph::node_type(const RRNodeId& node) const { +e_rr_type RRGraph::node_type(const RRNodeId& node) const { VTR_ASSERT_SAFE(valid_node_id(node)); return node_types_[node]; } @@ -372,7 +372,7 @@ std::vector RRGraph::find_edges(const RRNodeId& src_node, const RRNode return matching_edges; } -RRNodeId RRGraph::find_node(const short& x, const short& y, const t_rr_type type, const int& ptc, const e_side& side) const { +RRNodeId RRGraph::find_node(const short& x, const short& y, const e_rr_type type, const int& ptc, const e_side& side) const { initialize_fast_node_lookup(); const size_t itype = (size_t)type; @@ -417,7 +417,7 @@ RRNodeId RRGraph::find_node(const short& x, const short& y, const t_rr_type type } /* Find the channel width (number of tracks) of a channel [x][y] */ -short RRGraph::chan_num_tracks(const short& x, const short& y, const t_rr_type& type) const { +short RRGraph::chan_num_tracks(const short& x, const short& y, const e_rr_type& type) const { /* Must be CHANX or CHANY */ VTR_ASSERT_MSG(e_rr_type::CHANX == type || e_rr_type::CHANY == type, "Required node_type to be CHANX or CHANY!"); @@ -798,7 +798,7 @@ void RRGraph::reserve_segments(const int& num_segments) { } /* Mutators */ -RRNodeId RRGraph::create_node(const t_rr_type& type) { +RRNodeId RRGraph::create_node(const e_rr_type& type) { //Allocate an ID RRNodeId node_id = RRNodeId(node_ids_.size()); diff --git a/libs/librrgraph/src/base/rr_graph_obj.h b/libs/librrgraph/src/base/rr_graph_obj.h index bd4e781046e..f3a3f8c8477 100644 --- a/libs/librrgraph/src/base/rr_graph_obj.h +++ b/libs/librrgraph/src/base/rr_graph_obj.h @@ -60,7 +60,7 @@ * // Get the unique node id that you may get * // from other data structures or functions * RRNodeId node_id; - * t_rr_type node_type = rr_graph.node_type(node_id); + * e_rr_type node_type = rr_graph.node_type(node_id); * * // Access all the fan-out edges from a given node * for (const RREdgeId& out_edge_id : rr_graph.node_out_edges(node_id)) { @@ -257,9 +257,9 @@ class RRGraph { /* get the type of a RRGraph node : types of each node, can be channel wires (CHANX or CHANY) or * logic block pins(OPIN or IPIN) or virtual nodes (SOURCE or SINK) - * see t_rr_type definition for more details + * see e_rr_type definition for more details */ - t_rr_type node_type(const RRNodeId& node) const; + e_rr_type node_type(const RRNodeId& node) const; /* Get coordinate of a node. (xlow, xhigh, ylow, yhigh): * For OPIN/IPIN/SOURCE/SINK, xlow = xhigh and ylow = yhigh @@ -510,9 +510,9 @@ class RRGraph { /* Find the edges connecting two nodes */ std::vector find_edges(const RRNodeId& src_node, const RRNodeId& sink_node) const; /* Find a node with given features from internal fast look-up */ - RRNodeId find_node(const short& x, const short& y, const t_rr_type type, const int& ptc, const e_side& side = NUM_2D_SIDES) const; + RRNodeId find_node(const short& x, const short& y, const e_rr_type type, const int& ptc, const e_side& side = NUM_2D_SIDES) const; /* Find the number of routing tracks in a routing channel with a given coordinate */ - short chan_num_tracks(const short& x, const short& y, const t_rr_type& type) const; + short chan_num_tracks(const short& x, const short& y, const e_rr_type& type) const; /* This flag is raised when the RRgraph contains invalid nodes/edges etc. * Invalid nodes/edges exist when users remove nodes/edges from RRGraph @@ -589,7 +589,7 @@ class RRGraph { * RRNodeId node = create_node(); * set_node_xlow(node, 0); */ - RRNodeId create_node(const t_rr_type& type); + RRNodeId create_node(const e_rr_type& type); /* Add a edge to the RRGraph, by providing the source and sink node * This function will automatically create a node and * configure the nodes and edges in connection @@ -782,7 +782,7 @@ class RRGraph { private: /* Internal Data */ /* Node related data */ vtr::vector node_ids_; /* Unique identifiers for the nodes */ - vtr::vector node_types_; + vtr::vector node_types_; vtr::vector> node_bounding_boxes_; diff --git a/libs/librrgraph/src/base/rr_graph_storage.cpp b/libs/librrgraph/src/base/rr_graph_storage.cpp index 89afcaeeba4..787ec67098e 100644 --- a/libs/librrgraph/src/base/rr_graph_storage.cpp +++ b/libs/librrgraph/src/base/rr_graph_storage.cpp @@ -673,7 +673,7 @@ static int get_node_pin_num( vtr::array_view_id node_storage, vtr::array_view_id node_ptc, RRNodeId id) { - t_rr_type node_type = node_storage[id].type_; + e_rr_type node_type = node_storage[id].type_; if (node_type != e_rr_type::IPIN && node_type != e_rr_type::OPIN) { VTR_LOG_ERROR("Attempted to access RR node 'pin_num' for non-IPIN/OPIN type '%s'", rr_node_typename[(size_t)node_type]); } @@ -684,7 +684,7 @@ static int get_node_track_num( vtr::array_view_id node_storage, vtr::array_view_id node_ptc, RRNodeId id) { - t_rr_type node_type = node_storage[id].type_; + e_rr_type node_type = node_storage[id].type_; if (node_type != e_rr_type::CHANX && node_type != e_rr_type::CHANY) { VTR_LOG_ERROR("Attempted to access RR node 'track_num' for non-CHANX/CHANY type '%s'", rr_node_typename[(size_t)node_type]); } @@ -695,7 +695,7 @@ static int get_node_class_num( vtr::array_view_id node_storage, vtr::array_view_id node_ptc, RRNodeId id) { - t_rr_type node_type = node_storage[id].type_; + e_rr_type node_type = node_storage[id].type_; if (node_type != e_rr_type::SOURCE && node_type != e_rr_type::SINK) { VTR_LOG_ERROR("Attempted to access RR node 'class_num' for non-SOURCE/SINK type '%s'", rr_node_typename[(size_t)node_type]); } @@ -721,7 +721,7 @@ int t_rr_graph_storage::node_class_num(RRNodeId id) const { id); } -void t_rr_graph_storage::set_node_type(RRNodeId id, t_rr_type new_type) { +void t_rr_graph_storage::set_node_type(RRNodeId id, e_rr_type new_type) { node_storage_[id].type_ = new_type; } diff --git a/libs/librrgraph/src/base/rr_graph_storage.h b/libs/librrgraph/src/base/rr_graph_storage.h index 3bb930f55b2..a76e57fe731 100644 --- a/libs/librrgraph/src/base/rr_graph_storage.h +++ b/libs/librrgraph/src/base/rr_graph_storage.h @@ -63,7 +63,7 @@ struct alignas(16) t_rr_node_data { int16_t xhigh_ = -1; int16_t yhigh_ = -1; - t_rr_type type_ = t_rr_type::NUM_RR_TYPES; + e_rr_type type_ = e_rr_type::NUM_RR_TYPES; /* The character is a hex number which is a 4-bit truth table for node sides * The 4-bits in serial represent 4 sides on which a node could appear @@ -164,7 +164,7 @@ class t_rr_graph_storage { * Node methods * ****************/ - t_rr_type node_type(RRNodeId id) const { + e_rr_type node_type(RRNodeId id) const { return node_storage_[id].type_; } const char* node_type_string(RRNodeId id) const; @@ -619,7 +619,7 @@ class t_rr_graph_storage { void set_node_track_num(RRNodeId id, int); //Same as set_ptc_num() by checks type() is consistent void set_node_class_num(RRNodeId id, int); //Same as set_ptc_num() by checks type() is consistent - void set_node_type(RRNodeId id, t_rr_type new_type); + void set_node_type(RRNodeId id, e_rr_type new_type); void set_node_name(RRNodeId id, const std::string& new_name); void set_node_coordinates(RRNodeId id, short x1, short y1, short x2, short y2); void set_node_layer(RRNodeId id, short layer); @@ -982,7 +982,7 @@ class t_rr_graph_view { return node_storage_.size(); } - t_rr_type node_type(RRNodeId id) const { + e_rr_type node_type(RRNodeId id) const { return node_storage_[id].type_; } const char* node_type_string(RRNodeId id) const; diff --git a/libs/librrgraph/src/base/rr_graph_utils.cpp b/libs/librrgraph/src/base/rr_graph_utils.cpp index 215ef5cc9d8..6a76ac6bac2 100644 --- a/libs/librrgraph/src/base/rr_graph_utils.cpp +++ b/libs/librrgraph/src/base/rr_graph_utils.cpp @@ -75,8 +75,8 @@ std::vector find_rr_graph_switches(const RRGraph& rr_graph, return switches; } -int seg_index_of_cblock(const RRGraphView& rr_graph, t_rr_type from_rr_type, int to_node) { - if (from_rr_type == t_rr_type::CHANX) +int seg_index_of_cblock(const RRGraphView& rr_graph, e_rr_type from_rr_type, int to_node) { + if (from_rr_type == e_rr_type::CHANX) return (rr_graph.node_xlow(RRNodeId(to_node))); else /* CHANY */ @@ -84,15 +84,15 @@ int seg_index_of_cblock(const RRGraphView& rr_graph, t_rr_type from_rr_type, int } int seg_index_of_sblock(const RRGraphView& rr_graph, int from_node, int to_node) { - t_rr_type from_rr_type, to_rr_type; + e_rr_type from_rr_type, to_rr_type; from_rr_type = rr_graph.node_type(RRNodeId(from_node)); to_rr_type = rr_graph.node_type(RRNodeId(to_node)); - if (from_rr_type == t_rr_type::CHANX) { - if (to_rr_type == t_rr_type::CHANY) { + if (from_rr_type == e_rr_type::CHANX) { + if (to_rr_type == e_rr_type::CHANY) { return (rr_graph.node_xlow(RRNodeId(to_node))); - } else if (to_rr_type == t_rr_type::CHANX) { + } else if (to_rr_type == e_rr_type::CHANX) { if (rr_graph.node_xlow(RRNodeId(to_node)) > rr_graph.node_xlow(RRNodeId(from_node))) { /* Going right */ return (rr_graph.node_xhigh(RRNodeId(from_node))); } else { /* Going left */ @@ -106,10 +106,10 @@ int seg_index_of_sblock(const RRGraphView& rr_graph, int from_node, int to_node) } } /* End from_rr_type is CHANX */ - else if (from_rr_type == t_rr_type::CHANY) { - if (to_rr_type == t_rr_type::CHANX) { + else if (from_rr_type == e_rr_type::CHANY) { + if (to_rr_type == e_rr_type::CHANX) { return (rr_graph.node_ylow(RRNodeId(to_node))); - } else if (to_rr_type == t_rr_type::CHANY) { + } else if (to_rr_type == e_rr_type::CHANY) { if (rr_graph.node_ylow(RRNodeId(to_node)) > rr_graph.node_ylow(RRNodeId(from_node))) { /* Going up */ return (rr_graph.node_yhigh(RRNodeId(from_node))); } else { /* Going down */ @@ -218,17 +218,17 @@ void rr_set_sink_locs(const RRGraphView& rr_graph, RRGraphBuilder& rr_graph_buil } // Remove old locations from lookup - VTR_ASSERT(rr_graph_builder.node_lookup().find_node(node_layer, new_loc.x(), new_loc.y(), t_rr_type::SINK, node_ptc) != RRNodeId::INVALID()); + VTR_ASSERT(rr_graph_builder.node_lookup().find_node(node_layer, new_loc.x(), new_loc.y(), e_rr_type::SINK, node_ptc) != RRNodeId::INVALID()); for (int x = tile_bb.xmin(); x <= tile_bb.xmax(); ++x) { for (int y = tile_bb.ymin(); y <= tile_bb.ymax(); ++y) { if (x == new_loc.x() && y == new_loc.y()) /* The new sink location */ continue; - if (rr_graph_builder.node_lookup().find_node(node_layer, x, y, t_rr_type::SINK, node_ptc) == RRNodeId::INVALID()) /* Already removed */ + if (rr_graph_builder.node_lookup().find_node(node_layer, x, y, e_rr_type::SINK, node_ptc) == RRNodeId::INVALID()) /* Already removed */ continue; - bool removed_successfully = rr_graph_builder.node_lookup().remove_node(node_id, node_layer, x, y, t_rr_type::SINK, node_ptc); + bool removed_successfully = rr_graph_builder.node_lookup().remove_node(node_id, node_layer, x, y, e_rr_type::SINK, node_ptc); VTR_ASSERT(removed_successfully); } } diff --git a/libs/librrgraph/src/base/rr_graph_utils.h b/libs/librrgraph/src/base/rr_graph_utils.h index c7fb3fd66c8..7ede4baafb9 100644 --- a/libs/librrgraph/src/base/rr_graph_utils.h +++ b/libs/librrgraph/src/base/rr_graph_utils.h @@ -76,7 +76,7 @@ void rr_set_sink_locs(const RRGraphView& rr_graph, RRGraphBuilder& rr_graph_buil * @brief Returns the segment number (distance along the channel) of the connection box from from_rr_type (CHANX or * CHANY) to to_node (IPIN). */ -int seg_index_of_cblock(const RRGraphView& rr_graph, t_rr_type from_rr_type, int to_node); +int seg_index_of_cblock(const RRGraphView& rr_graph, e_rr_type from_rr_type, int to_node); /** * @brief Returns the segment number (distance along the channel) of the switch box from from_node (CHANX or CHANY) to diff --git a/libs/librrgraph/src/base/rr_graph_view.h b/libs/librrgraph/src/base/rr_graph_view.h index 83668e05d08..e420e46ddd8 100644 --- a/libs/librrgraph/src/base/rr_graph_view.h +++ b/libs/librrgraph/src/base/rr_graph_view.h @@ -123,7 +123,7 @@ class RRGraphView { /** @brief Return the type of a specified node. */ - inline t_rr_type node_type(RRNodeId node) const { + inline e_rr_type node_type(RRNodeId node) const { return node_storage_.node_type(node); } @@ -256,7 +256,7 @@ class RRGraphView { /** @brief Check if a routing resource node is initialized. */ inline bool node_is_initialized(RRNodeId node) const { - return !((node_type(node) == t_rr_type::NUM_RR_TYPES) + return !((node_type(node) == e_rr_type::NUM_RR_TYPES) && (node_xlow(node) == -1) && (node_ylow(node) == -1) && (node_xhigh(node) == -1) && (node_yhigh(node) == -1)); } diff --git a/libs/librrgraph/src/base/rr_node_types.h b/libs/librrgraph/src/base/rr_node_types.h index 3895861e3d0..6b4fd306e48 100644 --- a/libs/librrgraph/src/base/rr_node_types.h +++ b/libs/librrgraph/src/base/rr_node_types.h @@ -20,7 +20,7 @@ * - SOURCE * - SINK */ -typedef enum class e_rr_type : unsigned char { +enum class e_rr_type : unsigned char { SOURCE = 0, /// RR_TYPES = {{e_rr_type::SOURCE, e_rr_type::SINK, e_rr_type::IPIN, +constexpr std::array RR_TYPES = {{e_rr_type::SOURCE, e_rr_type::SINK, e_rr_type::IPIN, e_rr_type::OPIN, e_rr_type::CHANX, e_rr_type::CHANY}}; -constexpr std::array rr_node_typename{{"SOURCE", "SINK", "IPIN", "OPIN", "CHANX", "CHANY"}}; +constexpr std::array rr_node_typename{{"SOURCE", "SINK", "IPIN", "OPIN", "CHANX", "CHANY"}}; /* * Direction::INC: wire driver is positioned at the low-coordinate end of the wire. @@ -124,4 +124,4 @@ struct t_rr_rc_data { // This is the data type of fast lookups of an rr-node given an (rr_type, layer, x, y, and the side) //[0..num_rr_types-1][0..num_layer-1][0..grid_width-1][0..grid_height-1][0..NUM_2D_SIDES-1][0..max_ptc-1] -typedef std::array, 4>, (size_t)t_rr_type::NUM_RR_TYPES> t_rr_node_indices; +typedef std::array, 4>, (size_t)e_rr_type::NUM_RR_TYPES> t_rr_node_indices; diff --git a/libs/librrgraph/src/base/rr_spatial_lookup.cpp b/libs/librrgraph/src/base/rr_spatial_lookup.cpp index 00db875b932..de5fdfdebef 100644 --- a/libs/librrgraph/src/base/rr_spatial_lookup.cpp +++ b/libs/librrgraph/src/base/rr_spatial_lookup.cpp @@ -7,7 +7,7 @@ RRSpatialLookup::RRSpatialLookup() { RRNodeId RRSpatialLookup::find_node(int layer, int x, int y, - t_rr_type type, + e_rr_type type, int ptc, e_side side) const { /* Find actual side to be used @@ -83,7 +83,7 @@ std::vector RRSpatialLookup::find_nodes_in_range(int layer, int ylow, int xhigh, int yhigh, - t_rr_type type, + e_rr_type type, int ptc, e_side side) const { std::set nodes; @@ -102,7 +102,7 @@ std::vector RRSpatialLookup::find_nodes_in_range(int layer, std::vector RRSpatialLookup::find_nodes(int layer, int x, int y, - t_rr_type type, + e_rr_type type, e_side side) const { /* TODO: The implementation of this API should be worked * when rr_node_indices adapts RRNodeId natively! @@ -173,7 +173,7 @@ std::vector RRSpatialLookup::find_nodes(int layer, std::vector RRSpatialLookup::find_channel_nodes(int layer, int x, int y, - t_rr_type type) const { + e_rr_type type) const { /* Pre-check: node type should be routing tracks! */ if (type != e_rr_type::CHANX && type != e_rr_type::CHANY) { return std::vector(); @@ -185,7 +185,7 @@ std::vector RRSpatialLookup::find_channel_nodes(int layer, std::vector RRSpatialLookup::find_nodes_at_all_sides(int layer, int x, int y, - t_rr_type rr_type, + e_rr_type rr_type, int ptc) const { std::vector indices; @@ -214,7 +214,7 @@ std::vector RRSpatialLookup::find_nodes_at_all_sides(int layer, std::vector RRSpatialLookup::find_grid_nodes_at_all_sides(int layer, int x, int y, - t_rr_type rr_type) const { + e_rr_type rr_type) const { VTR_ASSERT(rr_type == e_rr_type::SOURCE || rr_type == e_rr_type::OPIN || rr_type == e_rr_type::IPIN || rr_type == e_rr_type::SINK); if (rr_type == e_rr_type::SOURCE || rr_type == e_rr_type::SINK) { return find_nodes(layer,x, y, rr_type); @@ -238,7 +238,7 @@ std::vector RRSpatialLookup::find_grid_nodes_at_all_sides(int layer, void RRSpatialLookup::reserve_nodes(int layer, int x, int y, - t_rr_type type, + e_rr_type type, int num_nodes, e_side side) { VTR_ASSERT_SAFE(4 == rr_node_indices_[(size_t)type].ndims()); @@ -257,7 +257,7 @@ void RRSpatialLookup::add_node(RRNodeId node, int layer, int x, int y, - t_rr_type type, + e_rr_type type, int ptc, e_side side) { VTR_ASSERT(node.is_valid()); /* Must have a valid node id to be added */ @@ -283,7 +283,7 @@ bool RRSpatialLookup::remove_node(RRNodeId node, int layer, int x, int y, - t_rr_type type, + e_rr_type type, int ptc, e_side side) { VTR_ASSERT(node.is_valid()); @@ -291,7 +291,7 @@ bool RRSpatialLookup::remove_node(RRNodeId node, VTR_ASSERT_SAFE(layer >= 0); VTR_ASSERT_SAFE(x >= 0); VTR_ASSERT_SAFE(y >= 0); - VTR_ASSERT_SAFE(type != t_rr_type::NUM_RR_TYPES); + VTR_ASSERT_SAFE(type != e_rr_type::NUM_RR_TYPES); VTR_ASSERT_SAFE(ptc >= 0); VTR_ASSERT_SAFE(side != NUM_2D_SIDES); @@ -313,7 +313,7 @@ bool RRSpatialLookup::remove_node(RRNodeId node, void RRSpatialLookup::mirror_nodes(const int layer, const vtr::Point& src_coord, const vtr::Point& des_coord, - t_rr_type type, + e_rr_type type, e_side side) { VTR_ASSERT(e_rr_type::SOURCE == type); resize_nodes(layer, des_coord.x(), des_coord.y(), type, side); @@ -323,7 +323,7 @@ void RRSpatialLookup::mirror_nodes(const int layer, void RRSpatialLookup::resize_nodes(int layer, int x, int y, - t_rr_type type, + e_rr_type type, e_side side) { /* Expand the fast look-up if the new node is out-of-range * This may seldom happen because the rr_graph building function diff --git a/libs/librrgraph/src/base/rr_spatial_lookup.h b/libs/librrgraph/src/base/rr_spatial_lookup.h index 049175e587c..1af0b6652af 100644 --- a/libs/librrgraph/src/base/rr_spatial_lookup.h +++ b/libs/librrgraph/src/base/rr_spatial_lookup.h @@ -71,7 +71,7 @@ class RRSpatialLookup { RRNodeId find_node(int layer, int x, int y, - t_rr_type type, + e_rr_type type, int ptc, e_side side = NUM_2D_SIDES) const; @@ -94,7 +94,7 @@ class RRSpatialLookup { int ylow, int xhigh, int yhigh, - t_rr_type type, + e_rr_type type, int ptc, e_side side = e_side::NUM_2D_SIDES) const; @@ -116,7 +116,7 @@ class RRSpatialLookup { std::vector find_channel_nodes(int layer, int x, int y, - t_rr_type type) const; + e_rr_type type) const; /** * @brief Like find_node() but returns all matching nodes on all the sides. @@ -127,7 +127,7 @@ class RRSpatialLookup { std::vector find_nodes_at_all_sides(int layer, int x, int y, - t_rr_type rr_type, + e_rr_type rr_type, int ptc) const; /** @@ -138,7 +138,7 @@ class RRSpatialLookup { std::vector find_grid_nodes_at_all_sides(int layer, int x, int y, - t_rr_type rr_type) const; + e_rr_type rr_type) const; /* -- Mutators -- */ public: @@ -146,7 +146,7 @@ class RRSpatialLookup { void reserve_nodes(int layer, int x, int y, - t_rr_type type, + e_rr_type type, int num_nodes, e_side side = TOTAL_2D_SIDES[0]); @@ -179,7 +179,7 @@ class RRSpatialLookup { int layer, int x, int y, - t_rr_type type, + e_rr_type type, int ptc, e_side side = TOTAL_2D_SIDES[0]); @@ -203,7 +203,7 @@ class RRSpatialLookup { int layer, int x, int y, - t_rr_type type, + e_rr_type type, int ptc, e_side side = TOTAL_2D_SIDES[0]); @@ -249,7 +249,7 @@ class RRSpatialLookup { void mirror_nodes(const int layer, const vtr::Point& src_coord, const vtr::Point& des_coord, - t_rr_type type, + e_rr_type type, e_side side); /** @@ -266,7 +266,7 @@ class RRSpatialLookup { void resize_nodes(int layer, int x, int y, - t_rr_type type, + e_rr_type type, e_side side); /** @brief Reorder the internal look up to be more memory efficient */ @@ -285,7 +285,7 @@ class RRSpatialLookup { std::vector find_nodes(int layer, int x, int y, - t_rr_type type, + e_rr_type type, e_side side = TOTAL_2D_SIDES[0]) const; /* -- Internal data storage -- */ diff --git a/libs/librrgraph/src/io/rr_graph_uxsdcxx_serializer.h b/libs/librrgraph/src/io/rr_graph_uxsdcxx_serializer.h index ad23948815d..1ee3676dda4 100644 --- a/libs/librrgraph/src/io/rr_graph_uxsdcxx_serializer.h +++ b/libs/librrgraph/src/io/rr_graph_uxsdcxx_serializer.h @@ -1847,7 +1847,7 @@ class RrGraphSerializer final : public uxsd::RrGraphBase { auto& rr_graph_builder = (*rr_graph_builder_); /* Alloc the lookup table */ - for (t_rr_type rr_type : RR_TYPES) { + for (e_rr_type rr_type : RR_TYPES) { if (rr_type == e_rr_type::CHANX) { rr_graph_builder.node_lookup().resize_nodes(grid_.get_num_layers(), grid_.height(), grid_.width(), rr_type, NUM_2D_SIDES); } else { @@ -2004,7 +2004,7 @@ class RrGraphSerializer final : public uxsd::RrGraphBase { } } - t_rr_type from_uxsd_node_type(uxsd::enum_node_type type) { + e_rr_type from_uxsd_node_type(uxsd::enum_node_type type) { switch (type) { case uxsd::enum_node_type::CHANX: return e_rr_type::CHANX; @@ -2024,7 +2024,7 @@ class RrGraphSerializer final : public uxsd::RrGraphBase { type); } } - uxsd::enum_node_type to_uxsd_node_type(t_rr_type type) { + uxsd::enum_node_type to_uxsd_node_type(e_rr_type type) { switch (type) { case e_rr_type::CHANX: return uxsd::enum_node_type::CHANX; diff --git a/libs/librrgraph/src/utils/alloc_and_load_rr_indexed_data.cpp b/libs/librrgraph/src/utils/alloc_and_load_rr_indexed_data.cpp index 0496e605a49..a3d4a554f90 100644 --- a/libs/librrgraph/src/utils/alloc_and_load_rr_indexed_data.cpp +++ b/libs/librrgraph/src/utils/alloc_and_load_rr_indexed_data.cpp @@ -190,8 +190,8 @@ std::vector find_ortho_cost_index(const RRGraphView& rr_graph, for (const RRNodeId& rr_node : rr_graph.nodes()) { for (size_t iedge = 0; iedge < rr_graph.num_edges(rr_node); ++iedge) { RRNodeId to_node = rr_graph.edge_sink_node(rr_node, iedge); - t_rr_type from_node_type = rr_graph.node_type(rr_node); - t_rr_type to_node_type = rr_graph.node_type(to_node); + e_rr_type from_node_type = rr_graph.node_type(rr_node); + e_rr_type to_node_type = rr_graph.node_type(to_node); size_t from_node_cost_index = (size_t)rr_graph.node_cost_index(rr_node); size_t to_node_cost_index = (size_t)rr_graph.node_cost_index(to_node); @@ -526,7 +526,7 @@ static void load_rr_indexed_data_T_values(const RRGraphView& rr_graph, * data. */ for (const RRNodeId& rr_id : rr_graph.nodes()) { - t_rr_type rr_type = rr_graph.node_type(rr_id); + e_rr_type rr_type = rr_graph.node_type(rr_id); if (rr_type != e_rr_type::CHANX && rr_type != e_rr_type::CHANY) { continue; diff --git a/vpr/src/base/read_route.cpp b/vpr/src/base/read_route.cpp index fc354a90c9e..0b8231925e7 100644 --- a/vpr/src/base/read_route.cpp +++ b/vpr/src/base/read_route.cpp @@ -579,7 +579,7 @@ void print_route(const Netlist<>& net_list, while (tptr != nullptr) { RRNodeId inode = RRNodeId(tptr->index); - t_rr_type rr_type = rr_graph.node_type(inode); + e_rr_type rr_type = rr_graph.node_type(inode); int ilow = rr_graph.node_xlow(inode); int jlow = rr_graph.node_ylow(inode); int layer_num = rr_graph.node_layer(inode); diff --git a/vpr/src/base/stats.cpp b/vpr/src/base/stats.cpp index e2959ae6633..dbd88cebb0b 100644 --- a/vpr/src/base/stats.cpp +++ b/vpr/src/base/stats.cpp @@ -310,13 +310,13 @@ static void load_channel_occupancies(const Netlist<>& net_list, for (const RouteTreeNode& rt_node : tree.value().all_nodes()) { RRNodeId inode = rt_node.inode; - t_rr_type rr_type = rr_graph.node_type(inode); + e_rr_type rr_type = rr_graph.node_type(inode); - if (rr_type == t_rr_type::CHANX) { + if (rr_type == e_rr_type::CHANX) { int j = rr_graph.node_ylow(inode); for (int i = rr_graph.node_xlow(inode); i <= rr_graph.node_xhigh(inode); i++) chanx_occ[i][j]++; - } else if (rr_type == t_rr_type::CHANY) { + } else if (rr_type == e_rr_type::CHANY) { int i = rr_graph.node_xlow(inode); for (int j = rr_graph.node_ylow(inode); j <= rr_graph.node_yhigh(inode); j++) chany_occ[i][j]++; @@ -344,7 +344,7 @@ void get_num_bends_and_length(ParentNetId inet, int* bends_ptr, int* len_ptr, in "in get_num_bends_and_length: net #%lu has no routing.\n", size_t(inet)); } - t_rr_type prev_type = rr_graph.node_type(tree->root().inode); + e_rr_type prev_type = rr_graph.node_type(tree->root().inode); RouteTree::iterator it = tree->all_nodes().begin(); RouteTree::iterator end = tree->all_nodes().end(); ++it; /* start from the next node after source */ @@ -352,18 +352,18 @@ void get_num_bends_and_length(ParentNetId inet, int* bends_ptr, int* len_ptr, in for (; it != end; ++it) { const RouteTreeNode& rt_node = *it; RRNodeId inode = rt_node.inode; - t_rr_type curr_type = rr_graph.node_type(inode); + e_rr_type curr_type = rr_graph.node_type(inode); - if (curr_type == t_rr_type::CHANX || curr_type == t_rr_type::CHANY) { + if (curr_type == e_rr_type::CHANX || curr_type == e_rr_type::CHANY) { segments++; length += rr_graph.node_length(inode); - if (curr_type != prev_type && (prev_type == t_rr_type::CHANX || prev_type == t_rr_type::CHANY)) + if (curr_type != prev_type && (prev_type == e_rr_type::CHANX || prev_type == e_rr_type::CHANY)) bends++; } /* The all_nodes iterator walks all nodes in the tree. If we are at a leaf and going back to the top, prev_type is invalid: just set it to SINK */ - prev_type = rt_node.is_leaf() ? t_rr_type::SINK : curr_type; + prev_type = rt_node.is_leaf() ? e_rr_type::SINK : curr_type; } *bends_ptr = bends; diff --git a/vpr/src/base/vpr_types.h b/vpr/src/base/vpr_types.h index c2ca97e73fe..64e2a24ba24 100644 --- a/vpr/src/base/vpr_types.h +++ b/vpr/src/base/vpr_types.h @@ -1360,9 +1360,9 @@ struct t_det_routing_arch { std::string read_rr_edge_override_filename; }; -constexpr bool is_pin(e_rr_type type) { return (type == t_rr_type::IPIN || type == t_rr_type::OPIN); } -constexpr bool is_chan(e_rr_type type) { return (type == t_rr_type::CHANX || type == t_rr_type::CHANY); } -constexpr bool is_src_sink(e_rr_type type) { return (type == t_rr_type::SOURCE || type == t_rr_type::SINK); } +constexpr bool is_pin(e_rr_type type) { return (type == e_rr_type::IPIN || type == e_rr_type::OPIN); } +constexpr bool is_chan(e_rr_type type) { return (type == e_rr_type::CHANX || type == e_rr_type::CHANY); } +constexpr bool is_src_sink(e_rr_type type) { return (type == e_rr_type::SOURCE || type == e_rr_type::SINK); } /** * @brief Extra information about each rr_node needed only during routing diff --git a/vpr/src/draw/draw.cpp b/vpr/src/draw/draw.cpp index fe984f275d0..0f3ec5902fe 100644 --- a/vpr/src/draw/draw.cpp +++ b/vpr/src/draw/draw.cpp @@ -623,7 +623,7 @@ int get_track_num(int inode, const vtr::OffsetMatrix& chanx_track, const vt /* Returns the track number of this routing resource node. */ int i, j; - t_rr_type rr_type; + e_rr_type rr_type; auto& device_ctx = g_vpr_ctx.device(); const auto& rr_graph = device_ctx.rr_graph; RRNodeId rr_node = RRNodeId(inode); @@ -638,10 +638,10 @@ int get_track_num(int inode, const vtr::OffsetMatrix& chanx_track, const vt j = rr_graph.node_ylow(rr_node); /* length channel segments. */ switch (rr_type) { - case t_rr_type::CHANX: + case e_rr_type::CHANX: return (chanx_track[i][j]); - case t_rr_type::CHANY: + case e_rr_type::CHANY: return (chany_track[i][j]); default: diff --git a/vpr/src/draw/draw_basic.cpp b/vpr/src/draw/draw_basic.cpp index 770c8532115..82e0fa134ca 100644 --- a/vpr/src/draw/draw_basic.cpp +++ b/vpr/src/draw/draw_basic.cpp @@ -351,13 +351,13 @@ void draw_congestion(ezgl::renderer* g) { color.alpha = transparency_factor; switch (rr_graph.node_type(inode)) { - case t_rr_type::CHANX: //fallthrough - case t_rr_type::CHANY: + case e_rr_type::CHANX: //fallthrough + case e_rr_type::CHANY: draw_rr_chan(inode, color, g); break; - case t_rr_type::IPIN: //fallthrough - case t_rr_type::OPIN: + case e_rr_type::IPIN: //fallthrough + case e_rr_type::OPIN: draw_rr_pin(inode, color, g); break; default: @@ -651,15 +651,15 @@ void draw_partial_route(const std::vector& rr_nodes_to_draw, ezgl::ren ezgl::color color = draw_state->draw_rr_node[inode].color; switch (rr_type) { - case t_rr_type::OPIN: { + case e_rr_type::OPIN: { draw_rr_pin(inode, color, g); break; } - case t_rr_type::IPIN: { + case e_rr_type::IPIN: { draw_rr_pin(inode, color, g); if (edge_visibility.visible) { g->set_color(color, edge_visibility.alpha); - if (rr_graph.node_type(prev_node) == t_rr_type::OPIN) { + if (rr_graph.node_type(prev_node) == e_rr_type::OPIN) { draw_pin_to_pin(prev_node, inode, g); } else { draw_pin_to_chan_edge(inode, prev_node, g); @@ -667,7 +667,7 @@ void draw_partial_route(const std::vector& rr_nodes_to_draw, ezgl::ren } break; } - case t_rr_type::CHANX: { + case e_rr_type::CHANX: { if (draw_state->draw_route_type == GLOBAL) chanx_track[rr_graph.node_xlow(inode)][rr_graph.node_ylow(inode)]++; @@ -675,15 +675,15 @@ void draw_partial_route(const std::vector& rr_nodes_to_draw, ezgl::ren if (edge_visibility.visible) { g->set_color(color, edge_visibility.alpha); switch (prev_type) { - case t_rr_type::CHANX: { + case e_rr_type::CHANX: { draw_chanx_to_chanx_edge(prev_node, inode, switch_type, g); break; } - case t_rr_type::CHANY: { + case e_rr_type::CHANY: { draw_chanx_to_chany_edge(inode, prev_node, FROM_Y_TO_X, switch_type, g); break; } - case t_rr_type::OPIN: { + case e_rr_type::OPIN: { draw_pin_to_chan_edge(prev_node, inode, g); break; } @@ -697,7 +697,7 @@ void draw_partial_route(const std::vector& rr_nodes_to_draw, ezgl::ren break; } - case t_rr_type::CHANY: { + case e_rr_type::CHANY: { if (draw_state->draw_route_type == GLOBAL) chany_track[rr_graph.node_xlow(inode)][rr_graph.node_ylow(inode)]++; @@ -706,17 +706,17 @@ void draw_partial_route(const std::vector& rr_nodes_to_draw, ezgl::ren if (edge_visibility.visible) { g->set_color(color, edge_visibility.alpha); switch (prev_type) { - case t_rr_type::CHANX: { + case e_rr_type::CHANX: { draw_chanx_to_chany_edge(prev_node, inode, FROM_X_TO_Y, switch_type, g); break; } - case t_rr_type::CHANY: { + case e_rr_type::CHANY: { draw_chany_to_chany_edge(RRNodeId(prev_node), RRNodeId(inode), switch_type, g); break; } - case t_rr_type::OPIN: { + case e_rr_type::OPIN: { draw_pin_to_chan_edge(prev_node, inode, g); break; @@ -839,11 +839,11 @@ void draw_routing_util(ezgl::renderer* g) { t_draw_coords* draw_coords = get_draw_coords_vars(); auto& device_ctx = g_vpr_ctx.device(); - auto chanx_usage = calculate_routing_usage(t_rr_type::CHANX, draw_state->is_flat, false); - auto chany_usage = calculate_routing_usage(t_rr_type::CHANY, draw_state->is_flat, false); + auto chanx_usage = calculate_routing_usage(e_rr_type::CHANX, draw_state->is_flat, false); + auto chany_usage = calculate_routing_usage(e_rr_type::CHANY, draw_state->is_flat, false); - auto chanx_avail = calculate_routing_avail(t_rr_type::CHANX); - auto chany_avail = calculate_routing_avail(t_rr_type::CHANY); + auto chanx_avail = calculate_routing_avail(e_rr_type::CHANX); + auto chany_avail = calculate_routing_avail(e_rr_type::CHANY); float min_util = 0.; float max_util = -std::numeric_limits::infinity(); diff --git a/vpr/src/draw/draw_rr.cpp b/vpr/src/draw/draw_rr.cpp index ad9e8e38cfb..d9c6c71c5f3 100644 --- a/vpr/src/draw/draw_rr.cpp +++ b/vpr/src/draw/draw_rr.cpp @@ -62,20 +62,20 @@ void draw_rr(ezgl::renderer* g) { if (!draw_state->draw_rr_node[inode].node_highlighted) { /* If not highlighted node, assign color based on type. */ switch (rr_graph.node_type(inode)) { - case t_rr_type::CHANX: - case t_rr_type::CHANY: + case e_rr_type::CHANX: + case e_rr_type::CHANY: draw_state->draw_rr_node[inode].color = DEFAULT_RR_NODE_COLOR; break; - case t_rr_type::OPIN: + case e_rr_type::OPIN: draw_state->draw_rr_node[inode].color = ezgl::PINK; break; - case t_rr_type::IPIN: + case e_rr_type::IPIN: draw_state->draw_rr_node[inode].color = blk_LIGHTSKYBLUE; break; - case t_rr_type::SOURCE: + case e_rr_type::SOURCE: draw_state->draw_rr_node[inode].color = ezgl::PLUM; break; - case t_rr_type::SINK: + case e_rr_type::SINK: draw_state->draw_rr_node[inode].color = ezgl::DARK_SLATE_BLUE; break; default: @@ -90,30 +90,30 @@ void draw_rr(ezgl::renderer* g) { /* Now call drawing routines to draw the node. */ switch (rr_graph.node_type(inode)) { - case t_rr_type::SINK: + case e_rr_type::SINK: draw_rr_src_sink(inode, draw_state->draw_rr_node[inode].color, g); break; - case t_rr_type::SOURCE: + case e_rr_type::SOURCE: draw_rr_edges(inode, g); draw_rr_src_sink(inode, draw_state->draw_rr_node[inode].color, g); break; - case t_rr_type::CHANX: + case e_rr_type::CHANX: draw_rr_chan(inode, draw_state->draw_rr_node[inode].color, g); draw_rr_edges(inode, g); break; - case t_rr_type::CHANY: + case e_rr_type::CHANY: draw_rr_chan(inode, draw_state->draw_rr_node[inode].color, g); draw_rr_edges(inode, g); break; - case t_rr_type::IPIN: + case e_rr_type::IPIN: draw_rr_pin(inode, draw_state->draw_rr_node[inode].color, g); draw_rr_edges(inode, g); break; - case t_rr_type::OPIN: + case e_rr_type::OPIN: draw_rr_pin(inode, draw_state->draw_rr_node[inode].color, g); draw_rr_edges(inode, g); break; @@ -133,9 +133,9 @@ void draw_rr_chan(RRNodeId inode, const ezgl::color color, ezgl::renderer* g) { int transparency_factor = get_rr_node_transparency(inode); - t_rr_type type = rr_graph.node_type(inode); + e_rr_type type = rr_graph.node_type(inode); - VTR_ASSERT(type == t_rr_type::CHANX || type == t_rr_type::CHANY); + VTR_ASSERT(type == e_rr_type::CHANX || type == e_rr_type::CHANY); ezgl::rectangle bound_box = draw_get_rr_chan_bbox(inode); Direction dir = rr_graph.node_direction(inode); @@ -163,7 +163,7 @@ void draw_rr_chan(RRNodeId inode, const ezgl::color color, ezgl::renderer* g) { e_side mux_dir = TOP; int coord_min = -1; int coord_max = -1; - if (type == t_rr_type::CHANX) { + if (type == e_rr_type::CHANX) { coord_min = rr_graph.node_xlow(inode); coord_max = rr_graph.node_xhigh(inode); if (dir == Direction::INC) { @@ -172,7 +172,7 @@ void draw_rr_chan(RRNodeId inode, const ezgl::color color, ezgl::renderer* g) { mux_dir = LEFT; } } else { - VTR_ASSERT(type == t_rr_type::CHANY); + VTR_ASSERT(type == e_rr_type::CHANY); coord_min = rr_graph.node_ylow(inode); coord_max = rr_graph.node_yhigh(inode); if (dir == Direction::INC) { @@ -201,7 +201,7 @@ void draw_rr_chan(RRNodeId inode, const ezgl::color color, ezgl::renderer* g) { ezgl::point2d arrow_loc_min(0, 0); ezgl::point2d arrow_loc_max(0, 0); - if (type == t_rr_type::CHANX) { + if (type == e_rr_type::CHANX) { float sb_xmin = draw_coords->tile_x[k]; arrow_loc_min = {sb_xmin + arrow_offset, start.y}; @@ -281,14 +281,14 @@ void draw_rr_edges(RRNodeId inode, ezgl::renderer* g) { int transparency_factor = get_rr_node_transparency(rr_node); - t_rr_type from_type, to_type; + e_rr_type from_type, to_type; short switch_type; from_type = rr_graph.node_type(rr_node); if ((draw_state->draw_rr_toggle == DRAW_NODES_RR) - || (draw_state->draw_rr_toggle == DRAW_NODES_SBOX_RR && (from_type == t_rr_type::OPIN || from_type == t_rr_type::SOURCE || from_type == t_rr_type::IPIN)) - || (draw_state->draw_rr_toggle == DRAW_NODES_SBOX_CBOX_RR && (from_type == t_rr_type::SOURCE || from_type == t_rr_type::IPIN))) { + || (draw_state->draw_rr_toggle == DRAW_NODES_SBOX_RR && (from_type == e_rr_type::OPIN || from_type == e_rr_type::SOURCE || from_type == e_rr_type::IPIN)) + || (draw_state->draw_rr_toggle == DRAW_NODES_SBOX_CBOX_RR && (from_type == e_rr_type::SOURCE || from_type == e_rr_type::IPIN))) { return; /* Nothing to draw. */ } @@ -301,10 +301,10 @@ void draw_rr_edges(RRNodeId inode, ezgl::renderer* g) { continue; // skip drawing if edge is not valid to draw switch (from_type) { - case t_rr_type::OPIN: + case e_rr_type::OPIN: switch (to_type) { - case t_rr_type::CHANX: - case t_rr_type::CHANY: + case e_rr_type::CHANX: + case e_rr_type::CHANY: if (rgb_is_same(draw_state->draw_rr_node[inode].color, ezgl::MAGENTA)) { // If OPIN was clicked on, set color to fan-out ezgl::color color = draw_state->draw_rr_node[to_node].color; @@ -318,7 +318,7 @@ void draw_rr_edges(RRNodeId inode, ezgl::renderer* g) { } draw_pin_to_chan_edge(inode, to_node, g); break; - case t_rr_type::IPIN: + case e_rr_type::IPIN: if (rgb_is_same(draw_state->draw_rr_node[inode].color, ezgl::MAGENTA)) { ezgl::color color = draw_state->draw_rr_node[to_node].color; g->set_color(color, transparency_factor); @@ -338,9 +338,9 @@ void draw_rr_edges(RRNodeId inode, ezgl::renderer* g) { } break; - case t_rr_type::CHANX: /* from_type */ + case e_rr_type::CHANX: /* from_type */ switch (to_type) { - case t_rr_type::IPIN: + case e_rr_type::IPIN: if (draw_state->draw_rr_toggle == DRAW_NODES_SBOX_RR) { break; } @@ -365,7 +365,7 @@ void draw_rr_edges(RRNodeId inode, ezgl::renderer* g) { draw_pin_to_chan_edge(to_node, inode, g); break; - case t_rr_type::CHANX: + case e_rr_type::CHANX: if (rgb_is_same(draw_state->draw_rr_node[inode].color, ezgl::MAGENTA)) { ezgl::color color = draw_state->draw_rr_node[to_node].color; g->set_color(color, transparency_factor); @@ -383,7 +383,7 @@ void draw_rr_edges(RRNodeId inode, ezgl::renderer* g) { switch_type, g); break; - case t_rr_type::CHANY: + case e_rr_type::CHANY: if (rgb_is_same(draw_state->draw_rr_node[inode].color, ezgl::MAGENTA)) { ezgl::color color = draw_state->draw_rr_node[to_node].color; g->set_color(color, transparency_factor); @@ -408,9 +408,9 @@ void draw_rr_edges(RRNodeId inode, ezgl::renderer* g) { } break; - case t_rr_type::CHANY: /* from_type */ + case e_rr_type::CHANY: /* from_type */ switch (to_type) { - case t_rr_type::IPIN: + case e_rr_type::IPIN: if (draw_state->draw_rr_toggle == DRAW_NODES_SBOX_RR) { break; } @@ -435,7 +435,7 @@ void draw_rr_edges(RRNodeId inode, ezgl::renderer* g) { draw_pin_to_chan_edge(to_node, inode, g); break; - case t_rr_type::CHANX: + case e_rr_type::CHANX: if (rgb_is_same(draw_state->draw_rr_node[inode].color, ezgl::MAGENTA)) { ezgl::color color = draw_state->draw_rr_node[to_node].color; g->set_color(color, transparency_factor); @@ -453,7 +453,7 @@ void draw_rr_edges(RRNodeId inode, ezgl::renderer* g) { FROM_Y_TO_X, switch_type, g); break; - case t_rr_type::CHANY: + case e_rr_type::CHANY: if (rgb_is_same(draw_state->draw_rr_node[inode].color, ezgl::MAGENTA)) { ezgl::color color = draw_state->draw_rr_node[to_node].color; g->set_color(color, transparency_factor); @@ -478,9 +478,9 @@ void draw_rr_edges(RRNodeId inode, ezgl::renderer* g) { break; } break; - case t_rr_type::IPIN: // from_type + case e_rr_type::IPIN: // from_type switch (to_type) { - case t_rr_type::SINK: + case e_rr_type::SINK: g->set_color(ezgl::DARK_SLATE_BLUE, transparency_factor); draw_pin_to_sink(inode, to_node, g); break; @@ -492,9 +492,9 @@ void draw_rr_edges(RRNodeId inode, ezgl::renderer* g) { break; } break; - case t_rr_type::SOURCE: // from_type + case e_rr_type::SOURCE: // from_type switch (to_type) { - case t_rr_type::OPIN: + case e_rr_type::OPIN: g->set_color(ezgl::PLUM, transparency_factor); draw_source_to_pin(inode, to_node, g); break; @@ -686,8 +686,8 @@ RRNodeId draw_check_rr_node_hit(float click_x, float click_y) { continue; /* Don't check RR nodes on currently invisible layers*/ } switch (rr_graph.node_type(inode)) { - case t_rr_type::IPIN: - case t_rr_type::OPIN: { + case e_rr_type::IPIN: + case e_rr_type::OPIN: { int i = rr_graph.node_xlow(inode); int j = rr_graph.node_ylow(inode); t_physical_tile_type_ptr type = device_ctx.grid.get_physical_type({i, j, layer_num}); @@ -709,8 +709,8 @@ RRNodeId draw_check_rr_node_hit(float click_x, float click_y) { } break; } - case t_rr_type::SOURCE: - case t_rr_type::SINK: { + case e_rr_type::SOURCE: + case e_rr_type::SINK: { float xcen, ycen; draw_get_rr_src_sink_coords(rr_graph.rr_nodes()[size_t(inode)], &xcen, &ycen); @@ -721,8 +721,8 @@ RRNodeId draw_check_rr_node_hit(float click_x, float click_y) { } break; } - case t_rr_type::CHANX: - case t_rr_type::CHANY: { + case e_rr_type::CHANX: + case e_rr_type::CHANY: { bound_box = draw_get_rr_chan_bbox(inode); // Check if we clicked on this wire, with 30% @@ -815,22 +815,22 @@ void draw_rr_costs(ezgl::renderer* g, const vtr::vector& rr_cos color.alpha = transparency_factor; switch (rr_graph.node_type(inode)) { - case t_rr_type::CHANX: //fallthrough - case t_rr_type::CHANY: + case e_rr_type::CHANX: //fallthrough + case e_rr_type::CHANY: draw_rr_chan(inode, color, g); if (with_edges) draw_rr_edges(inode, g); break; - case t_rr_type::IPIN: //fallthrough + case e_rr_type::IPIN: //fallthrough draw_rr_pin(inode, color, g); if (with_edges) draw_rr_edges(inode, g); break; - case t_rr_type::OPIN: + case e_rr_type::OPIN: draw_rr_pin(inode, color, g); if (with_edges) draw_rr_edges(inode, g); break; - case t_rr_type::SOURCE: - case t_rr_type::SINK: + case e_rr_type::SOURCE: + case e_rr_type::SINK: color.alpha *= 0.8; draw_rr_src_sink(inode, color, g); if (with_edges) draw_rr_edges(inode, g); diff --git a/vpr/src/draw/draw_rr_edges.cpp b/vpr/src/draw/draw_rr_edges.cpp index b61be53b1db..2aff5c3d35c 100644 --- a/vpr/src/draw/draw_rr_edges.cpp +++ b/vpr/src/draw/draw_rr_edges.cpp @@ -434,7 +434,7 @@ void draw_pin_to_chan_edge(RRNodeId pin_node, RRNodeId chan_node, ezgl::renderer * Any rr_node of a grid should have at least 1 side!!! */ e_side pin_side = NUM_2D_SIDES; - const t_rr_type channel_type = rr_graph.node_type(chan_node); + const e_rr_type channel_type = rr_graph.node_type(chan_node); if (1 == pin_candidate_sides.size()) { pin_side = pin_candidate_sides[0]; } else { diff --git a/vpr/src/pack/post_routing_pb_pin_fixup.cpp b/vpr/src/pack/post_routing_pb_pin_fixup.cpp index e66958e1d44..3cffcc3b56c 100644 --- a/vpr/src/pack/post_routing_pb_pin_fixup.cpp +++ b/vpr/src/pack/post_routing_pb_pin_fixup.cpp @@ -124,7 +124,7 @@ static void update_cluster_pin_with_post_routing_results(const Netlist<>& net_li auto pin_type = get_pin_type_from_pin_physical_num(physical_tile, physical_pin); - t_rr_type rr_node_type; + e_rr_type rr_node_type; if (pin_type == DRIVER) { rr_node_type = e_rr_type::OPIN; } else { diff --git a/vpr/src/pack/sync_netlists_to_routing_flat.cpp b/vpr/src/pack/sync_netlists_to_routing_flat.cpp index cbde73d230a..354f58f932b 100644 --- a/vpr/src/pack/sync_netlists_to_routing_flat.cpp +++ b/vpr/src/pack/sync_netlists_to_routing_flat.cpp @@ -100,7 +100,7 @@ static void get_intra_cluster_connections(const RouteTree& tree, std::vectorinode); - if ((type == t_rr_type::IPIN || type == t_rr_type::OPIN) && (parent_type == t_rr_type::IPIN || parent_type == t_rr_type::OPIN)) { + if ((type == e_rr_type::IPIN || type == e_rr_type::OPIN) && (parent_type == e_rr_type::IPIN || parent_type == e_rr_type::OPIN)) { auto clb = get_cluster_block_from_rr_node(node.inode); auto parent_clb = get_cluster_block_from_rr_node(parent->inode); if (clb == parent_clb) @@ -336,7 +336,7 @@ static void sync_clustered_netlist_to_routing(void) { int clb_nets_so_far = 0; for (auto& rt_node : tree->all_nodes()) { auto node_type = rr_graph.node_type(rt_node.inode); - if (node_type != t_rr_type::IPIN && node_type != t_rr_type::OPIN) + if (node_type != e_rr_type::IPIN && node_type != e_rr_type::OPIN) continue; auto physical_tile = device_ctx.grid.get_physical_type({rr_graph.node_xlow(rt_node.inode), @@ -353,7 +353,7 @@ static void sync_clustered_netlist_to_routing(void) { /* OPIN on the tile: create a new clb_net_id and add all ports & pins into here * Due to how the route tree is traversed, all nodes until the next OPIN on the tile will * be under this OPIN, so this is valid (we don't need to get the branch explicitly) */ - if (node_type == t_rr_type::OPIN) { + if (node_type == e_rr_type::OPIN) { std::string net_name; net_name = atom_ctx.netlist().net_name(parent_net_id) + "_" + std::to_string(clb_nets_so_far); clb_net_id = clb_netlist.create_net(net_name); @@ -376,7 +376,7 @@ static void sync_clustered_netlist_to_routing(void) { VTR_ASSERT_MSG(false, "Unsupported port type"); port_id = clb_netlist.create_port(clb, pb_graph_pin->port->name, pb_graph_pin->port->num_pins, port_type); } - PinType pin_type = node_type == t_rr_type::OPIN ? PinType::DRIVER : PinType::SINK; + PinType pin_type = node_type == e_rr_type::OPIN ? PinType::DRIVER : PinType::SINK; ClusterPinId new_pin = clb_netlist.create_pin(port_id, pb_graph_pin->pin_number, clb_net_id, pin_type, pb_graph_pin->pin_count_in_cluster); clb_netlist.set_pin_net(new_pin, pin_type, clb_net_id); diff --git a/vpr/src/place/delay_model/compute_delta_delays_utils.cpp b/vpr/src/place/delay_model/compute_delta_delays_utils.cpp index f75ac77bc42..17b866c6330 100644 --- a/vpr/src/place/delay_model/compute_delta_delays_utils.cpp +++ b/vpr/src/place/delay_model/compute_delta_delays_utils.cpp @@ -532,7 +532,7 @@ static void generic_compute_matrix_dijkstra_expansion(RouterDelayProfiler& /*rou auto best_driver_ptcs = get_best_classes(DRIVER, device_ctx.grid.get_physical_type({source_x, source_y, from_layer_num})); for (int driver_ptc : best_driver_ptcs) { VTR_ASSERT(driver_ptc != OPEN); - RRNodeId source_rr_node = device_ctx.rr_graph.node_lookup().find_node(from_layer_num, source_x, source_y, t_rr_type::SOURCE, driver_ptc); + RRNodeId source_rr_node = device_ctx.rr_graph.node_lookup().find_node(from_layer_num, source_x, source_y, e_rr_type::SOURCE, driver_ptc); VTR_ASSERT(source_rr_node != RRNodeId::INVALID()); auto delays = calculate_all_path_delays_from_rr_node(source_rr_node, router_opts, is_flat); @@ -651,7 +651,7 @@ static float route_connection_delay(RouterDelayProfiler& route_profiler, for (int driver_ptc : best_driver_ptcs) { VTR_ASSERT(driver_ptc != OPEN); - RRNodeId source_rr_node = device_ctx.rr_graph.node_lookup().find_node(source_layer, source_x, source_y, t_rr_type::SOURCE, driver_ptc); + RRNodeId source_rr_node = device_ctx.rr_graph.node_lookup().find_node(source_layer, source_x, source_y, e_rr_type::SOURCE, driver_ptc); VTR_ASSERT(source_rr_node != RRNodeId::INVALID()); @@ -903,7 +903,7 @@ bool find_direct_connect_sample_locations(const t_direct_inf* direct, // Find a source/sink RR node associated with the pins of the direct { - RRNodeId src_rr_candidate = node_lookup.find_node(found_layer_num, from_x, from_y, t_rr_type::SOURCE, from_pin_class); + RRNodeId src_rr_candidate = node_lookup.find_node(found_layer_num, from_x, from_y, e_rr_type::SOURCE, from_pin_class); VTR_ASSERT(src_rr_candidate); out_src_node = src_rr_candidate; } diff --git a/vpr/src/route/annotate_routing.cpp b/vpr/src/route/annotate_routing.cpp index 6a11000e0da..13eccea0fee 100644 --- a/vpr/src/route/annotate_routing.cpp +++ b/vpr/src/route/annotate_routing.cpp @@ -41,8 +41,8 @@ vtr::vector annotate_rr_node_nets(const ClusteringContex for (auto& rt_node : tree->all_nodes()) { const RRNodeId rr_node = rt_node.inode; /* Ignore source and sink nodes, they are the common node multiple starting and ending points */ - if ((t_rr_type::SOURCE != rr_graph.node_type(rr_node)) - && (t_rr_type::SINK != rr_graph.node_type(rr_node))) { + if ((e_rr_type::SOURCE != rr_graph.node_type(rr_node)) + && (e_rr_type::SINK != rr_graph.node_type(rr_node))) { /* Sanity check: ensure we do not revoke any net mapping * In some routing architectures, node capacity is more than 1 * which allows a node to be mapped by multiple nets diff --git a/vpr/src/route/build_switchblocks.cpp b/vpr/src/route/build_switchblocks.cpp index 487f3f6d640..b9bf8b819cc 100644 --- a/vpr/src/route/build_switchblocks.cpp +++ b/vpr/src/route/build_switchblocks.cpp @@ -229,8 +229,8 @@ static void compute_wireconn_connections( int to_x, int to_y, int to_layer, - t_rr_type from_chan_type, - t_rr_type to_chan_type, + e_rr_type from_chan_type, + e_rr_type to_chan_type, const t_wire_type_sizes* wire_type_sizes_x, const t_wire_type_sizes* wire_type_sizes_y, const t_switchblock_inf* sb, @@ -262,7 +262,7 @@ static int evaluate_num_conns_formula(t_wireconn_scratchpad* scratchpad, std::st static void get_switchpoint_wires( const DeviceGrid& grid, const t_chan_seg_details* chan_details, - t_rr_type chan_type, + e_rr_type chan_type, int x, int y, e_side side, @@ -292,7 +292,7 @@ static void get_switchpoint_wires( * * @return returns the type of channel that we are indexing into (ie, CHANX or CHANY) and channel coordinates and type */ -static const t_chan_details& index_into_correct_chan(int tile_x, int tile_y, int tile_layer, enum e_side src_side, enum e_side dest_side, const t_chan_details& chan_details_x, const t_chan_details& chan_details_y, int& chan_x, int& chan_y, int& chan_layer, t_rr_type& chan_type); +static const t_chan_details& index_into_correct_chan(int tile_x, int tile_y, int tile_layer, enum e_side src_side, enum e_side dest_side, const t_chan_details& chan_details_x, const t_chan_details& chan_details_y, int& chan_x, int& chan_y, int& chan_layer, e_rr_type& chan_type); /** * @brief check whether a specific track location is valid within the device grid @@ -663,7 +663,7 @@ static void count_wire_type_sizes(const t_chan_seg_details* channel, int nodes_p static void get_switchpoint_wires( const DeviceGrid& grid, const t_chan_seg_details* chan_details, - t_rr_type chan_type, + e_rr_type chan_type, int x, int y, e_side side, @@ -773,7 +773,7 @@ static void compute_wire_connections(int x_coord, t_wireconn_scratchpad* scratchpad) { int from_x, from_y, from_layer; /* index into source channel */ int to_x, to_y, to_layer; /* index into destination channel */ - t_rr_type from_chan_type, to_chan_type; /* the type of channel - i.e. CHANX or CHANY */ + e_rr_type from_chan_type, to_chan_type; /* the type of channel - i.e. CHANX or CHANY */ from_x = from_y = to_x = to_y = from_layer = to_layer = UNDEFINED; SB_Side_Connection side_conn(from_side, to_side); /* for indexing into this switchblock's permutation funcs */ @@ -843,8 +843,8 @@ static void compute_wireconn_connections( int to_x, int to_y, int to_layer, - t_rr_type from_chan_type, - t_rr_type to_chan_type, + e_rr_type from_chan_type, + e_rr_type to_chan_type, const t_wire_type_sizes* wire_type_sizes_from, const t_wire_type_sizes* wire_type_sizes_to, const t_switchblock_inf* sb, @@ -1024,7 +1024,7 @@ static int evaluate_num_conns_formula(t_wireconn_scratchpad* scratchpad, std::st return scratchpad->formula_parser.parse_formula(num_conns_formula, vars); } -static const t_chan_details& index_into_correct_chan(int tile_x, int tile_y, int tile_layer, enum e_side src_side, enum e_side dest_side, const t_chan_details& chan_details_x, const t_chan_details& chan_details_y, int& chan_x, int& chan_y, int& chan_layer, t_rr_type& chan_type) { +static const t_chan_details& index_into_correct_chan(int tile_x, int tile_y, int tile_layer, enum e_side src_side, enum e_side dest_side, const t_chan_details& chan_details_x, const t_chan_details& chan_details_y, int& chan_x, int& chan_y, int& chan_layer, e_rr_type& chan_type) { chan_type = e_rr_type::CHANX; /* here we use the VPR convention that a tile 'owns' the channels directly to the right * and above it */ diff --git a/vpr/src/route/check_route.cpp b/vpr/src/route/check_route.cpp index 4cd58651181..0eeae4e86cc 100644 --- a/vpr/src/route/check_route.cpp +++ b/vpr/src/route/check_route.cpp @@ -157,7 +157,7 @@ void check_route(const Netlist<>& net_list, } } - if (rr_graph.node_type(inode) == t_rr_type::SINK) { + if (rr_graph.node_type(inode) == e_rr_type::SINK) { check_sink(net_list, inode, net_pin_index, net_id, pin_done.get()); num_sinks += 1; } @@ -200,7 +200,7 @@ static void check_sink(const Netlist<>& net_list, auto& device_ctx = g_vpr_ctx.device(); const auto& rr_graph = device_ctx.rr_graph; - VTR_ASSERT(rr_graph.node_type(inode) == t_rr_type::SINK); + VTR_ASSERT(rr_graph.node_type(inode) == e_rr_type::SINK); if (net_pin_index == OPEN) { /* If there is no legal net pin index associated with this sink node */ VPR_FATAL_ERROR(VPR_ERROR_ROUTE, @@ -222,8 +222,8 @@ static void check_source(const Netlist<>& net_list, auto& device_ctx = g_vpr_ctx.device(); const auto& rr_graph = device_ctx.rr_graph; - t_rr_type rr_type = rr_graph.node_type(inode); - if (rr_type != t_rr_type::SOURCE) { + e_rr_type rr_type = rr_graph.node_type(inode); + if (rr_type != e_rr_type::SOURCE) { VPR_FATAL_ERROR(VPR_ERROR_ROUTE, "in check_source: net %d begins with a node of type %d.\n", size_t(net_id), rr_type); } @@ -276,7 +276,7 @@ static bool check_adjacent(RRNodeId from_node, RRNodeId to_node, bool is_flat) { int from_layer, from_xlow, from_ylow, to_layer, to_xlow, to_ylow, from_ptc, to_ptc, iclass; int num_adj, to_xhigh, to_yhigh, from_xhigh, from_yhigh; bool reached; - t_rr_type from_type, to_type; + e_rr_type from_type, to_type; t_physical_tile_type_ptr from_grid_type, to_grid_type; auto& device_ctx = g_vpr_ctx.device(); @@ -319,7 +319,7 @@ static bool check_adjacent(RRNodeId from_node, RRNodeId to_node, bool is_flat) { // If to_node is a SINK, it could be anywhere within its containing device grid tile, and it is reasonable for // any input pins or within-cluster pins to reach it. Hence, treat its size as that of its containing tile. - if (to_type == t_rr_type::SINK) { + if (to_type == e_rr_type::SINK) { vtr::Rect tile_bb = device_ctx.grid.get_tile_bb({to_xlow, to_ylow, to_layer}); to_xlow = tile_bb.xmin(); @@ -331,8 +331,8 @@ static bool check_adjacent(RRNodeId from_node, RRNodeId to_node, bool is_flat) { // Layer numbers are should not be more than one layer apart for connected nodes VTR_ASSERT(abs(from_layer - to_layer) <= 1); switch (from_type) { - case t_rr_type::SOURCE: - VTR_ASSERT(to_type == t_rr_type::OPIN); + case e_rr_type::SOURCE: + VTR_ASSERT(to_type == e_rr_type::OPIN); //The OPIN should be contained within the bounding box of it's connected source if (from_xlow <= to_xlow @@ -349,34 +349,34 @@ static bool check_adjacent(RRNodeId from_node, RRNodeId to_node, bool is_flat) { } break; - case t_rr_type::SINK: + case e_rr_type::SINK: /* SINKS are adjacent to not connected */ break; - case t_rr_type::OPIN: + case e_rr_type::OPIN: from_grid_type = device_ctx.grid.get_physical_type({from_xlow, from_ylow, from_layer}); - if (to_type == t_rr_type::CHANX || to_type == t_rr_type::CHANY) { + if (to_type == e_rr_type::CHANX || to_type == e_rr_type::CHANY) { num_adj += 1; //adjacent } else if (is_flat) { - VTR_ASSERT(to_type == t_rr_type::OPIN || to_type == t_rr_type::IPIN); // If pin is located inside a cluster + VTR_ASSERT(to_type == e_rr_type::OPIN || to_type == e_rr_type::IPIN); // If pin is located inside a cluster return true; } else { - VTR_ASSERT(to_type == t_rr_type::IPIN); /* direct OPIN to IPIN connections not necessarily adjacent */ + VTR_ASSERT(to_type == e_rr_type::IPIN); /* direct OPIN to IPIN connections not necessarily adjacent */ return true; /* Special case, direct OPIN to IPIN connections need not be adjacent */ } break; - case t_rr_type::IPIN: + case e_rr_type::IPIN: from_grid_type = device_ctx.grid.get_physical_type({from_xlow, from_ylow, from_layer}); if (is_flat) { - VTR_ASSERT(to_type == t_rr_type::OPIN || to_type == t_rr_type::IPIN || to_type == t_rr_type::SINK); + VTR_ASSERT(to_type == e_rr_type::OPIN || to_type == e_rr_type::IPIN || to_type == e_rr_type::SINK); } else { - VTR_ASSERT(to_type == t_rr_type::SINK); + VTR_ASSERT(to_type == e_rr_type::SINK); } //An IPIN should be contained within the bounding box of its connected sink's tile - if (to_type == t_rr_type::SINK) { + if (to_type == e_rr_type::SINK) { if (from_xlow >= to_xlow && from_ylow >= to_ylow && from_xhigh <= to_xhigh @@ -403,10 +403,10 @@ static bool check_adjacent(RRNodeId from_node, RRNodeId to_node, bool is_flat) { } break; - case t_rr_type::CHANX: + case e_rr_type::CHANX: if (to_type == e_rr_type::IPIN) { num_adj += 1; //adjacent - } else if (to_type == t_rr_type::CHANX) { + } else if (to_type == e_rr_type::CHANX) { from_xhigh = rr_graph.node_xhigh(from_node); to_xhigh = rr_graph.node_xhigh(to_node); if (from_ylow == to_ylow) { @@ -428,7 +428,7 @@ static bool check_adjacent(RRNodeId from_node, RRNodeId to_node, bool is_flat) { } /* UDSD Modification by WMF End */ } - } else if (to_type == t_rr_type::CHANY) { + } else if (to_type == e_rr_type::CHANY) { num_adj += chanx_chany_adjacent(from_node, to_node); } else { VPR_FATAL_ERROR(VPR_ERROR_ROUTE, @@ -436,10 +436,10 @@ static bool check_adjacent(RRNodeId from_node, RRNodeId to_node, bool is_flat) { } break; - case t_rr_type::CHANY: + case e_rr_type::CHANY: if (to_type == e_rr_type::IPIN) { num_adj += 1; //adjacent - } else if (to_type == t_rr_type::CHANY) { + } else if (to_type == e_rr_type::CHANY) { from_yhigh = rr_graph.node_yhigh(from_node); to_yhigh = rr_graph.node_yhigh(to_node); if (from_xlow == to_xlow) { @@ -460,7 +460,7 @@ static bool check_adjacent(RRNodeId from_node, RRNodeId to_node, bool is_flat) { } /* UDSD Modification by WMF End */ } - } else if (to_type == t_rr_type::CHANX) { + } else if (to_type == e_rr_type::CHANX) { num_adj += chanx_chany_adjacent(to_node, from_node); } else { VPR_FATAL_ERROR(VPR_ERROR_ROUTE, @@ -551,7 +551,7 @@ static void check_locally_used_clb_opins(const t_clb_opins_used& clb_opins_used_ bool is_flat) { /* Checks that enough OPINs on CLBs have been set aside (used up) to make a * * legal routing if subblocks connect to OPINs directly. */ - t_rr_type rr_type; + e_rr_type rr_type; auto& cluster_ctx = g_vpr_ctx.clustering(); auto& device_ctx = g_vpr_ctx.device(); @@ -571,7 +571,7 @@ static void check_locally_used_clb_opins(const t_clb_opins_used& clb_opins_used_ /* Now check that node is an OPIN of the right type. */ rr_type = rr_graph.node_type(RRNodeId(inode)); - if (rr_type != t_rr_type::OPIN) { + if (rr_type != e_rr_type::OPIN) { VPR_FATAL_ERROR(VPR_ERROR_ROUTE, "in check_locally_used_opins: block #%lu (%s)\n" "\tClass %d local OPIN is wrong rr_type -- rr_node #%d of type %d.\n", @@ -883,7 +883,7 @@ bool StubFinder::RecurseTree(const RouteTreeNode& rt_node) { if (rt_node.is_leaf()) { //If a leaf of the route tree is not a SINK, then it is a stub - if (rr_graph.node_type(rt_node.inode) != t_rr_type::SINK) { + if (rr_graph.node_type(rt_node.inode) != e_rr_type::SINK) { return true; //It is the current root of this stub } else { return false; diff --git a/vpr/src/route/connection_router.cpp b/vpr/src/route/connection_router.cpp index 76ec6e85a54..5e50fa25fb8 100644 --- a/vpr/src/route/connection_router.cpp +++ b/vpr/src/route/connection_router.cpp @@ -196,7 +196,7 @@ void ConnectionRouter::timing_driven_route_connection_from_heap(RRNodeId s VTR_ASSERT_SAFE(sink_node != RRNodeId::INVALID()); t_bb target_bb; - if (rr_graph_->node_type(sink_node) == t_rr_type::SINK) { // We need to get a bounding box for the sink's entire tile + if (rr_graph_->node_type(sink_node) == e_rr_type::SINK) { // We need to get a bounding box for the sink's entire tile vtr::Rect tile_bb = grid_.get_tile_bb({rr_graph_->node_xlow(sink_node), rr_graph_->node_ylow(sink_node), rr_graph_->node_layer(sink_node)}); @@ -476,8 +476,8 @@ void ConnectionRouter::timing_driven_expand_neighbour(const RTExploredNode * more promising routes, but makes route-through (via CLBs) impossible. * * Change this if you want to investigate route-throughs. */ if (target_node != RRNodeId::INVALID()) { - t_rr_type to_type = rr_graph_->node_type(to_node); - if (to_type == t_rr_type::IPIN) { + e_rr_type to_type = rr_graph_->node_type(to_node); + if (to_type == e_rr_type::IPIN) { // Check if this IPIN leads to the target block // IPIN's of the target block should be contained within it's bounding box int to_xlow = rr_graph_->node_xlow(to_node); @@ -758,7 +758,7 @@ void ConnectionRouter::evaluate_timing_driven_node_costs(RTExploredNode* t //cost. cong_cost = 0.; } - if (conn_params_->router_opt_choke_points_ && is_flat_ && rr_graph_->node_type(to->index) == t_rr_type::IPIN) { + if (conn_params_->router_opt_choke_points_ && is_flat_ && rr_graph_->node_type(to->index) == e_rr_type::IPIN) { auto find_res = conn_params_->connection_choking_spots_.find(to->index); if (find_res != conn_params_->connection_choking_spots_.end()) { cong_cost = cong_cost / pow(2, (float)find_res->second); @@ -770,9 +770,9 @@ void ConnectionRouter::evaluate_timing_driven_node_costs(RTExploredNode* t to->backward_path_cost += cost_params.criticality * Tdel; //Delay cost if (cost_params.bend_cost != 0.) { - t_rr_type from_type = rr_graph_->node_type(from_node); - t_rr_type to_type = rr_graph_->node_type(to->index); - if ((from_type == t_rr_type::CHANX && to_type == t_rr_type::CHANY) || (from_type == t_rr_type::CHANY && to_type == t_rr_type::CHANX)) { + e_rr_type from_type = rr_graph_->node_type(from_node); + e_rr_type to_type = rr_graph_->node_type(to->index); + if ((from_type == e_rr_type::CHANX && to_type == e_rr_type::CHANY) || (from_type == e_rr_type::CHANY && to_type == e_rr_type::CHANX)) { to->backward_path_cost += cost_params.bend_cost; //Bend cost } } @@ -1012,7 +1012,7 @@ t_bb ConnectionRouter::add_high_fanout_route_tree_to_heap( // Expand HF BB to include the node (clip by original BB) expand_highfanout_bounding_box(highfanout_bb, net_bounding_box, rr_node_to_add, rr_graph_); - if (rr_graph_->node_type(rr_node_to_add) == t_rr_type::CHANY || rr_graph_->node_type(rr_node_to_add) == t_rr_type::CHANX) { + if (rr_graph_->node_type(rr_node_to_add) == e_rr_type::CHANY || rr_graph_->node_type(rr_node_to_add) == e_rr_type::CHANX) { chan_nodes_added++; } } @@ -1045,7 +1045,7 @@ t_bb ConnectionRouter::add_high_fanout_route_tree_to_heap( static inline bool relevant_node_to_target(const RRGraphView* rr_graph, RRNodeId node_to_add, RRNodeId target_node) { - VTR_ASSERT_SAFE(rr_graph->node_type(target_node) == t_rr_type::SINK); + VTR_ASSERT_SAFE(rr_graph->node_type(target_node) == e_rr_type::SINK); auto node_to_add_type = rr_graph->node_type(node_to_add); return node_to_add_type != e_rr_type::IPIN || node_in_same_physical_tile(node_to_add, target_node); } @@ -1062,7 +1062,7 @@ static inline void update_router_stats(RouterStats* router_stats, if constexpr (VTR_ENABLE_DEBUG_LOGGING_CONST_EXPR) { auto node_type = rr_graph->node_type(rr_node_id); - VTR_ASSERT(node_type != t_rr_type::NUM_RR_TYPES); + VTR_ASSERT(node_type != e_rr_type::NUM_RR_TYPES); if (is_inter_cluster_node(*rr_graph, rr_node_id)) { if (is_push) { diff --git a/vpr/src/route/overuse_report.cpp b/vpr/src/route/overuse_report.cpp index 86773a32445..028a4e85e70 100644 --- a/vpr/src/route/overuse_report.cpp +++ b/vpr/src/route/overuse_report.cpp @@ -130,7 +130,7 @@ void report_overused_nodes(const Netlist<>& net_list, int y = rr_graph.node_ylow(node_id); int layer_num = rr_graph.node_layer(node_id); switch (node_type) { - case t_rr_type::IPIN: + case e_rr_type::IPIN: case e_rr_type::OPIN: report_overused_ipin_opin(os, node_id, @@ -139,12 +139,12 @@ void report_overused_nodes(const Netlist<>& net_list, x -= g_vpr_ctx.device().grid.get_physical_type({x, y, layer_num})->width; y -= g_vpr_ctx.device().grid.get_physical_type({x, y, layer_num})->width; break; - case t_rr_type::CHANX: - case t_rr_type::CHANY: + case e_rr_type::CHANX: + case e_rr_type::CHANY: report_overused_chanx_chany(os, node_id); break; - case t_rr_type::SOURCE: - case t_rr_type::SINK: + case e_rr_type::SOURCE: + case e_rr_type::SINK: report_overused_source_sink(os, node_id); report_sinks = true; break; @@ -484,7 +484,7 @@ static void print_block_pins_nets(std::ostream& os, } for (int pin = pin_num_range.low; pin <= pin_num_range.high; pin++) { - t_rr_type rr_type = (get_pin_type_from_pin_physical_num(physical_type, pin) == DRIVER) ? t_rr_type::OPIN : t_rr_type::IPIN; + e_rr_type rr_type = (get_pin_type_from_pin_physical_num(physical_type, pin) == DRIVER) ? e_rr_type::OPIN : e_rr_type::IPIN; RRNodeId node_id = get_pin_rr_node_id(rr_graph.node_lookup(), physical_type, layer, root_x, root_y, pin); // When flat router is enabled, RR Node chains collapse into a single node. Thus, when // looking up the RR Node ID, it may return an invalid node ID. In this case, we skip @@ -494,10 +494,10 @@ static void print_block_pins_nets(std::ostream& os, } VTR_ASSERT(node_id.is_valid()); auto search_result = rr_node_to_net_map.find(node_id); - if (rr_type == t_rr_type::OPIN) { + if (rr_type == e_rr_type::OPIN) { os << " OPIN - "; } else { - VTR_ASSERT(rr_type == t_rr_type::IPIN); + VTR_ASSERT(rr_type == e_rr_type::IPIN); os << " IPIN - "; } os << "RRNodeId: " << size_t(node_id) << " - Physical Num: " << pin << "\n"; diff --git a/vpr/src/route/route.cpp b/vpr/src/route/route.cpp index 0712bb1f738..fc240344163 100644 --- a/vpr/src/route/route.cpp +++ b/vpr/src/route/route.cpp @@ -618,7 +618,7 @@ bool route(const Netlist<>& net_list, "total_internal_heap_pushes: %zu total_internal_heap_pops: %zu total_external_heap_pushes: %zu total_external_heap_pops: %zu ", router_stats.intra_cluster_node_pushes, router_stats.intra_cluster_node_pops, router_stats.inter_cluster_node_pushes, router_stats.inter_cluster_node_pops); - for (int node_type_idx = 0; node_type_idx < (int)t_rr_type::NUM_RR_TYPES; node_type_idx++) { + for (int node_type_idx = 0; node_type_idx < (int)e_rr_type::NUM_RR_TYPES; node_type_idx++) { VTR_LOG("total_external_%s_pushes: %zu ", rr_node_typename[node_type_idx], router_stats.inter_cluster_node_type_cnt_pushes[node_type_idx]); VTR_LOG("total_external_%s_pops: %zu ", rr_node_typename[node_type_idx], router_stats.inter_cluster_node_type_cnt_pops[node_type_idx]); VTR_LOG("total_internal_%s_pushes: %zu ", rr_node_typename[node_type_idx], router_stats.intra_cluster_node_type_cnt_pushes[node_type_idx]); diff --git a/vpr/src/route/route_common.cpp b/vpr/src/route/route_common.cpp index 038b6aee6f2..68701b46731 100644 --- a/vpr/src/route/route_common.cpp +++ b/vpr/src/route/route_common.cpp @@ -474,7 +474,7 @@ static vtr::vector> load_net_rr_terminals(con tile_bb.ymin(), tile_bb.xmax(), tile_bb.ymax(), - t_rr_type::SINK, + e_rr_type::SINK, iclass); VTR_ASSERT_SAFE(sink_nodes.size() == 1); inode = sink_nodes[0]; @@ -566,7 +566,7 @@ static vtr::vector> load_rr_clb_sources(con bool is_flat) { vtr::vector> rr_blk_source; - t_rr_type rr_type; + e_rr_type rr_type; rr_blk_source.resize(net_list.blocks().size()); diff --git a/vpr/src/route/route_net.cpp b/vpr/src/route/route_net.cpp index 7f032b0dcca..4d89ae04cfe 100644 --- a/vpr/src/route/route_net.cpp +++ b/vpr/src/route/route_net.cpp @@ -228,7 +228,7 @@ size_t calculate_wirelength_available() { size_t available_wirelength = 0; // But really what's happening is that this for loop iterates over every node and determines the available wirelength for (const RRNodeId& rr_id : device_ctx.rr_graph.nodes()) { - const t_rr_type channel_type = rr_graph.node_type(rr_id); + const e_rr_type channel_type = rr_graph.node_type(rr_id); if (channel_type == e_rr_type::CHANX || channel_type == e_rr_type::CHANY) { available_wirelength += rr_graph.node_capacity(rr_id) * rr_graph.node_length(rr_id); } diff --git a/vpr/src/route/route_profiling.cpp b/vpr/src/route/route_profiling.cpp index dffa3f59446..dd87ee57e28 100644 --- a/vpr/src/route/route_profiling.cpp +++ b/vpr/src/route/route_profiling.cpp @@ -148,7 +148,7 @@ struct Congested_node_types { void congestion_analysis() { #if 0 // each type indexes into array which holds the congestion for that type - std::vector congestion_per_type((size_t)t_rr_type::NUM_RR_TYPES, 0); + std::vector congestion_per_type((size_t)e_rr_type::NUM_RR_TYPES, 0); // print out specific node information if congestion for type is low enough int total_congestion = 0; @@ -164,7 +164,7 @@ void congestion_analysis() { constexpr int specific_node_print_threshold = 5; Congested_node_types congested; - for (int type = SOURCE; type < t_rr_type::NUM_RR_TYPES; ++type) { + for (int type = SOURCE; type < e_rr_type::NUM_RR_TYPES; ++type) { float congestion_percentage = (float)congestion_per_type[type] / (float) total_congestion * 100; VTR_LOG(" %6s: %10.6f %\n", node_typename[type], congestion_percentage); // nodes of that type need specific printing diff --git a/vpr/src/route/route_utilization.cpp b/vpr/src/route/route_utilization.cpp index c2aeb155ab2..53badb9297c 100644 --- a/vpr/src/route/route_utilization.cpp +++ b/vpr/src/route/route_utilization.cpp @@ -3,7 +3,7 @@ #include "draw_types.h" #include "draw_global.h" -vtr::Matrix calculate_routing_usage(t_rr_type rr_type, bool is_flat, bool is_print) { +vtr::Matrix calculate_routing_usage(e_rr_type rr_type, bool is_flat, bool is_print) { VTR_ASSERT(rr_type == e_rr_type::CHANX || rr_type == e_rr_type::CHANY); const auto& device_ctx = g_vpr_ctx.device(); @@ -63,7 +63,7 @@ vtr::Matrix calculate_routing_usage(t_rr_type rr_type, bool is_flat, bool return usage; } -vtr::Matrix calculate_routing_avail(t_rr_type rr_type) { +vtr::Matrix calculate_routing_avail(e_rr_type rr_type) { //Calculate the number of available resources in each x/y channel VTR_ASSERT(rr_type == e_rr_type::CHANX || rr_type == e_rr_type::CHANY); diff --git a/vpr/src/route/route_utilization.h b/vpr/src/route/route_utilization.h index ba8d6995738..194df6deb14 100644 --- a/vpr/src/route/route_utilization.h +++ b/vpr/src/route/route_utilization.h @@ -4,7 +4,7 @@ #include "draw_types.h" #include "draw_global.h" -vtr::Matrix calculate_routing_avail(t_rr_type rr_type); +vtr::Matrix calculate_routing_avail(e_rr_type rr_type); /** * @brief: Calculates and returns the usage over the entire grid for the specified @@ -15,7 +15,7 @@ vtr::Matrix calculate_routing_avail(t_rr_type rr_type); * @param only_visible: If true, only record the usage of rr_nodes on layers that are visible according to the current * drawing settings. */ -vtr::Matrix calculate_routing_usage(t_rr_type rr_type, bool is_flat, bool is_print); +vtr::Matrix calculate_routing_usage(e_rr_type rr_type, bool is_flat, bool is_print); float routing_util(float used, float avail); #endif diff --git a/vpr/src/route/router_lookahead.cpp b/vpr/src/route/router_lookahead.cpp index 17bb64a7b4e..fb2849cecf6 100644 --- a/vpr/src/route/router_lookahead.cpp +++ b/vpr/src/route/router_lookahead.cpp @@ -71,7 +71,7 @@ std::pair ClassicLookahead::get_expected_delay_and_cong(RRNodeId n auto& device_ctx = g_vpr_ctx.device(); const auto& rr_graph = device_ctx.rr_graph; - t_rr_type rr_type = rr_graph.node_type(node); + e_rr_type rr_type = rr_graph.node_type(node); if (rr_type == e_rr_type::CHANX || rr_type == e_rr_type::CHANY) { auto [num_segs_same_dir, num_segs_ortho_dir] = get_expected_segs_to_target(node, target_node); @@ -139,7 +139,7 @@ static std::pair get_expected_segs_to_target(RRNodeId inode, RRNodeId float inv_length = device_ctx.rr_indexed_data[cost_index].inv_length; int ortho_cost_index = device_ctx.rr_indexed_data[cost_index].ortho_cost_index; float ortho_inv_length = device_ctx.rr_indexed_data[RRIndexedDataId(ortho_cost_index)].inv_length; - t_rr_type rr_type = rr_graph.node_type(inode); + e_rr_type rr_type = rr_graph.node_type(inode); if (rr_type == e_rr_type::CHANX) { ylow = rr_graph.node_ylow(inode); diff --git a/vpr/src/route/router_lookahead_compressed_map.cpp b/vpr/src/route/router_lookahead_compressed_map.cpp index 0b7ea09a62c..e45593f68e8 100644 --- a/vpr/src/route/router_lookahead_compressed_map.cpp +++ b/vpr/src/route/router_lookahead_compressed_map.cpp @@ -146,14 +146,14 @@ static void compute_router_wire_compressed_lookahead(const std::vector> sample_nodes; + std::map> sample_nodes; std::vector chan_types; if (segment_inf.parallel_axis == X_AXIS) - chan_types.push_back(t_rr_type::CHANX); + chan_types.push_back(e_rr_type::CHANX); else if (segment_inf.parallel_axis == Y_AXIS) - chan_types.push_back(t_rr_type::CHANY); + chan_types.push_back(e_rr_type::CHANY); else //Both for BOTH_AXIS segments and special segments such as clock_networks we want to search in both directions. - chan_types.insert(chan_types.end(), {t_rr_type::CHANX, t_rr_type::CHANY}); + chan_types.insert(chan_types.end(), {e_rr_type::CHANX, e_rr_type::CHANY}); for (e_rr_type chan_type : chan_types) { util::t_routing_cost_map routing_cost_map = util::get_routing_cost_map(longest_seg_length, @@ -180,7 +180,7 @@ static void compute_router_wire_compressed_lookahead(const std::vector CompressedMapLookahead::get_expected_delay_and_cong(RRNo float expected_cong_cost = std::numeric_limits::infinity(); e_rr_type from_type = rr_graph.node_type(from_node); - if (from_type == t_rr_type::SOURCE || from_type == t_rr_type::OPIN) { + if (from_type == e_rr_type::SOURCE || from_type == e_rr_type::OPIN) { //When estimating costs from a SOURCE/OPIN we look-up to find which wire types (and the //cost to reach them) in src_opin_delays. Once we know what wire types are //reachable, we query the f_wire_cost_map (i.e. the wire lookahead) to get the final @@ -472,7 +472,7 @@ std::pair CompressedMapLookahead::get_expected_delay_and_cong(RRNo .c_str()) .c_str()); - } else if (from_type == t_rr_type::CHANX || from_type == t_rr_type::CHANY) { + } else if (from_type == e_rr_type::CHANX || from_type == e_rr_type::CHANY) { //When estimating costs from a wire, we directly look-up the result in the wire lookahead (f_wire_cost_map) auto from_cost_index = rr_graph.node_cost_index(from_node); @@ -502,7 +502,7 @@ std::pair CompressedMapLookahead::get_expected_delay_and_cong(RRNo .c_str()); expected_delay_cost = cost_entry.delay * params.criticality; expected_cong_cost = cost_entry.congestion * (1 - params.criticality); - } else if (from_type == t_rr_type::IPIN) { /* Change if you're allowing route-throughs */ + } else if (from_type == e_rr_type::IPIN) { /* Change if you're allowing route-throughs */ return std::make_pair(0., device_ctx.rr_indexed_data[RRIndexedDataId(SINK_COST_INDEX)].base_cost); } else { /* Change this if you want to investigate route-throughs */ return std::make_pair(0., 0.); diff --git a/vpr/src/route/router_lookahead_extended_map.cpp b/vpr/src/route/router_lookahead_extended_map.cpp index e7d774e49cd..8ae1c02f708 100644 --- a/vpr/src/route/router_lookahead_extended_map.cpp +++ b/vpr/src/route/router_lookahead_extended_map.cpp @@ -586,7 +586,7 @@ float ExtendedMapLookahead::get_expected_cost( auto& device_ctx = g_vpr_ctx.device(); const auto& rr_graph = device_ctx.rr_graph; - t_rr_type rr_type = rr_graph.node_type(current_node); + e_rr_type rr_type = rr_graph.node_type(current_node); if (rr_type == e_rr_type::CHANX || rr_type == e_rr_type::CHANY || rr_type == e_rr_type::SOURCE || rr_type == e_rr_type::OPIN) { float delay_cost, cong_cost; diff --git a/vpr/src/route/router_lookahead_map.cpp b/vpr/src/route/router_lookahead_map.cpp index 2d5972acabe..b8782a45c5a 100644 --- a/vpr/src/route/router_lookahead_map.cpp +++ b/vpr/src/route/router_lookahead_map.cpp @@ -167,9 +167,9 @@ float MapLookahead::get_expected_cost(RRNodeId current_node, RRNodeId target_nod auto& device_ctx = g_vpr_ctx.device(); const auto& rr_graph = device_ctx.rr_graph; - t_rr_type from_rr_type = rr_graph.node_type(current_node); + e_rr_type from_rr_type = rr_graph.node_type(current_node); - VTR_ASSERT_SAFE(rr_graph.node_type(target_node) == t_rr_type::SINK); + VTR_ASSERT_SAFE(rr_graph.node_type(target_node) == e_rr_type::SINK); if (is_flat_) { return get_expected_cost_flat_router(current_node, target_node, params, R_upstream); @@ -190,9 +190,9 @@ float MapLookahead::get_expected_cost_flat_router(RRNodeId current_node, RRNodeI auto& device_ctx = g_vpr_ctx.device(); const auto& rr_graph = device_ctx.rr_graph; - t_rr_type from_rr_type = rr_graph.node_type(current_node); + e_rr_type from_rr_type = rr_graph.node_type(current_node); - VTR_ASSERT_SAFE(rr_graph.node_type(target_node) == t_rr_type::SINK); + VTR_ASSERT_SAFE(rr_graph.node_type(target_node) == e_rr_type::SINK); float delay_cost = 0.; float cong_cost = 0.; diff --git a/vpr/src/route/router_lookahead_map_utils.cpp b/vpr/src/route/router_lookahead_map_utils.cpp index 6c626d7df1a..7d1ed4889fb 100644 --- a/vpr/src/route/router_lookahead_map_utils.cpp +++ b/vpr/src/route/router_lookahead_map_utils.cpp @@ -544,7 +544,7 @@ t_ipin_primitive_sink_delays compute_intra_tile_dijkstra(const RRGraphView& rr_g } /* returns index of a node from which to start routing */ -RRNodeId get_start_node(int layer, int start_x, int start_y, int target_x, int target_y, t_rr_type rr_type, int seg_index, int track_offset) { +RRNodeId get_start_node(int layer, int start_x, int start_y, int target_x, int target_y, e_rr_type rr_type, int seg_index, int track_offset) { auto& device_ctx = g_vpr_ctx.device(); const auto& rr_graph = device_ctx.rr_graph; const auto& node_lookup = rr_graph.node_lookup(); @@ -1254,7 +1254,7 @@ static void run_intra_tile_dijkstra(const RRGraphView& rr_graph, node_expanded[curr.node] = true; } auto curr_type = rr_graph.node_type(curr.node); - VTR_ASSERT(curr_type != t_rr_type::CHANX && curr_type != t_rr_type::CHANY); + VTR_ASSERT(curr_type != e_rr_type::CHANX && curr_type != e_rr_type::CHANY); if (curr_type != e_rr_type::SINK) { for (RREdgeId edge : rr_graph.edge_range(curr.node)) { RRNodeId next_node = rr_graph.rr_nodes().edge_sink_node(edge); diff --git a/vpr/src/route/router_lookahead_map_utils.h b/vpr/src/route/router_lookahead_map_utils.h index 217bd0d2206..6222a71967f 100644 --- a/vpr/src/route/router_lookahead_map_utils.h +++ b/vpr/src/route/router_lookahead_map_utils.h @@ -325,7 +325,7 @@ t_ipin_primitive_sink_delays compute_intra_tile_dijkstra(const RRGraphView& rr_g int y); /* returns index of a node from which to start routing */ -RRNodeId get_start_node(int layer, int start_x, int start_y, int target_x, int target_y, t_rr_type rr_type, int seg_index, int track_offset); +RRNodeId get_start_node(int layer, int start_x, int start_y, int target_x, int target_y, e_rr_type rr_type, int seg_index, int track_offset); /** * @brief Computes the absolute delta_x and delta_y offset diff --git a/vpr/src/route/router_stats.h b/vpr/src/route/router_stats.h index 176455c80e6..01b9ee03ee0 100644 --- a/vpr/src/route/router_stats.h +++ b/vpr/src/route/router_stats.h @@ -38,13 +38,13 @@ struct RouterStats { size_t inter_cluster_node_pops = 0; size_t intra_cluster_node_pushes = 0; size_t intra_cluster_node_pops = 0; - size_t inter_cluster_node_type_cnt_pushes[(size_t)t_rr_type::NUM_RR_TYPES] = {0}; - size_t inter_cluster_node_type_cnt_pops[(size_t)t_rr_type::NUM_RR_TYPES] = {0}; - size_t intra_cluster_node_type_cnt_pushes[(size_t)t_rr_type::NUM_RR_TYPES] = {0}; - size_t intra_cluster_node_type_cnt_pops[(size_t)t_rr_type::NUM_RR_TYPES] = {0}; + size_t inter_cluster_node_type_cnt_pushes[(size_t)e_rr_type::NUM_RR_TYPES] = {0}; + size_t inter_cluster_node_type_cnt_pops[(size_t)e_rr_type::NUM_RR_TYPES] = {0}; + size_t intra_cluster_node_type_cnt_pushes[(size_t)e_rr_type::NUM_RR_TYPES] = {0}; + size_t intra_cluster_node_type_cnt_pops[(size_t)e_rr_type::NUM_RR_TYPES] = {0}; // For debugging purposes - size_t rt_node_pushes[(size_t)t_rr_type::NUM_RR_TYPES] = {0}; + size_t rt_node_pushes[(size_t)e_rr_type::NUM_RR_TYPES] = {0}; /** Add rhs's stats to mine */ void combine(RouterStats& rhs) { @@ -56,7 +56,7 @@ struct RouterStats { heap_pops += rhs.heap_pops; inter_cluster_node_pops += rhs.inter_cluster_node_pops; intra_cluster_node_pops += rhs.intra_cluster_node_pops; - for (size_t node_type_idx = 0; node_type_idx < (size_t)t_rr_type::NUM_RR_TYPES; node_type_idx++) { + for (size_t node_type_idx = 0; node_type_idx < (size_t)e_rr_type::NUM_RR_TYPES; node_type_idx++) { inter_cluster_node_type_cnt_pushes[node_type_idx] += rhs.inter_cluster_node_type_cnt_pushes[node_type_idx]; inter_cluster_node_type_cnt_pops[node_type_idx] += rhs.inter_cluster_node_type_cnt_pops[node_type_idx]; intra_cluster_node_type_cnt_pushes[node_type_idx] += rhs.intra_cluster_node_type_cnt_pushes[node_type_idx]; diff --git a/vpr/src/route/rr_graph.cpp b/vpr/src/route/rr_graph.cpp index cbb24825014..a6219c5b896 100644 --- a/vpr/src/route/rr_graph.cpp +++ b/vpr/src/route/rr_graph.cpp @@ -518,7 +518,7 @@ static void build_rr_chan(RRGraphBuilder& rr_graph_builder, const int layer, const int x_coord, const int y_coord, - const t_rr_type chan_type, + const e_rr_type chan_type, const t_track_to_pin_lookup& track_to_pin_lookup, t_sb_connection_map* sb_conn_map, const vtr::NdMatrix, 3>& switch_block_conn, @@ -1462,11 +1462,11 @@ static void build_rr_graph(e_graph_type graph_type, // clock_modeling::DEDICATED_NETWORK will append some rr nodes after // the regular graph. for (int i = 0; i < num_rr_nodes; i++) { - if (rr_graph.node_type(RRNodeId(i)) == t_rr_type::CHANX) { + if (rr_graph.node_type(RRNodeId(i)) == e_rr_type::CHANX) { int ylow = rr_graph.node_ylow(RRNodeId(i)); device_ctx.rr_graph_builder.set_node_capacity(RRNodeId(i), nodes_per_chan.x_list[ylow]); } - if (rr_graph.node_type(RRNodeId(i)) == t_rr_type::CHANY) { + if (rr_graph.node_type(RRNodeId(i)) == e_rr_type::CHANY) { int xlow = rr_graph.node_xlow(RRNodeId(i)); device_ctx.rr_graph_builder.set_node_capacity(RRNodeId(i), nodes_per_chan.y_list[xlow]); } @@ -1479,7 +1479,7 @@ static void build_rr_graph(e_graph_type graph_type, for (int rr_node_id = 0; rr_node_id < num_rr_nodes; rr_node_id++) { auto node_type = rr_graph.node_type(RRNodeId(rr_node_id)); auto node_dir = rr_graph.node_direction(RRNodeId(rr_node_id)); - if (node_type != t_rr_type::CHANX && node_type != t_rr_type::CHANY) { //SRC/SINK/IPIN/OPIN + if (node_type != e_rr_type::CHANX && node_type != e_rr_type::CHANY) { //SRC/SINK/IPIN/OPIN device_ctx.rr_graph_builder.set_node_ptc_twist_incr(RRNodeId(rr_node_id), 0); } else { //The current ptc twist increment number in UNDIR TILEABLE RRGraph is 2 and -2 @@ -2246,7 +2246,7 @@ static std::function alloc_and_load_rr_graph(RRGraphBuilder if (i > 0) { int tracks_per_chan = ((is_global_graph) ? 1 : chan_width.x_list[j]); - build_rr_chan(rr_graph_builder, layer, i, j, t_rr_type::CHANX, track_to_pin_lookup_x, sb_conn_map, + build_rr_chan(rr_graph_builder, layer, i, j, e_rr_type::CHANX, track_to_pin_lookup_x, sb_conn_map, switch_block_conn, num_of_3d_conns_custom_SB, CHANX_COST_INDEX_START, chan_width, grid, tracks_per_chan, @@ -2267,7 +2267,7 @@ static std::function alloc_and_load_rr_graph(RRGraphBuilder } if (j > 0) { int tracks_per_chan = ((is_global_graph) ? 1 : chan_width.y_list[i]); - build_rr_chan(rr_graph_builder, layer, i, j, t_rr_type::CHANY, track_to_pin_lookup_y, sb_conn_map, + build_rr_chan(rr_graph_builder, layer, i, j, e_rr_type::CHANY, track_to_pin_lookup_y, sb_conn_map, switch_block_conn, num_of_3d_conns_custom_SB, CHANX_COST_INDEX_START + num_seg_types_x, chan_width, grid, tracks_per_chan, @@ -2456,12 +2456,12 @@ static void add_classes_rr_graph(RRGraphBuilder& rr_graph_builder, int class_num_pins = get_class_num_pins_from_class_physical_num(physical_type, class_num); if (class_type == DRIVER) { rr_graph_builder.set_node_cost_index(class_inode, RRIndexedDataId(SOURCE_COST_INDEX)); - rr_graph_builder.set_node_type(class_inode, t_rr_type::SOURCE); + rr_graph_builder.set_node_type(class_inode, e_rr_type::SOURCE); } else { VTR_ASSERT(class_type == RECEIVER); rr_graph_builder.set_node_cost_index(class_inode, RRIndexedDataId(SINK_COST_INDEX)); - rr_graph_builder.set_node_type(class_inode, t_rr_type::SINK); + rr_graph_builder.set_node_type(class_inode, e_rr_type::SINK); } VTR_ASSERT(class_num_pins <= std::numeric_limits::max()); rr_graph_builder.set_node_capacity(class_inode, (short)class_num_pins); @@ -2496,7 +2496,7 @@ static void add_pins_rr_graph(RRGraphBuilder& rr_graph_builder, int x_offset = x_offset_vec[pin_coord]; int y_offset = y_offset_vec[pin_coord]; e_side pin_side = pin_sides_vec[pin_coord]; - auto node_type = (pin_type == DRIVER) ? t_rr_type::OPIN : t_rr_type::IPIN; + auto node_type = (pin_type == DRIVER) ? e_rr_type::OPIN : e_rr_type::IPIN; RRNodeId node_id = node_lookup.find_node(layer, i + x_offset, j + y_offset, @@ -2717,7 +2717,7 @@ static void build_bidir_rr_opins(RRGraphBuilder& rr_graph_builder, total_pin_Fc += Fc[pin_index][iseg]; } - RRNodeId node_index = rr_graph_builder.node_lookup().find_node(layer, i, j, t_rr_type::OPIN, pin_index, side); + RRNodeId node_index = rr_graph_builder.node_lookup().find_node(layer, i, j, e_rr_type::OPIN, pin_index, side); VTR_ASSERT(node_index); for (auto connected_layer : get_layers_pin_is_connected_to(type, layer, pin_index)) { @@ -3134,7 +3134,7 @@ static void build_rr_chan(RRGraphBuilder& rr_graph_builder, const int layer, const int x_coord, const int y_coord, - const t_rr_type chan_type, + const e_rr_type chan_type, const t_track_to_pin_lookup& track_to_pin_lookup, t_sb_connection_map* sb_conn_map, const vtr::NdMatrix, 3>& switch_block_conn, @@ -3165,14 +3165,14 @@ static void build_rr_chan(RRGraphBuilder& rr_graph_builder, int chan_coord = y_coord; //The absolute coordinate of this channel within the device int seg_dimension = device_ctx.grid.width() - 2; //-2 for no perim channels int chan_dimension = device_ctx.grid.height() - 2; //-2 for no perim channels - const t_chan_details& from_chan_details = (chan_type == t_rr_type::CHANX) ? chan_details_x : chan_details_y; - const t_chan_details& opposite_chan_details = (chan_type == t_rr_type::CHANX) ? chan_details_y : chan_details_x; - t_rr_type opposite_chan_type = t_rr_type::CHANY; - if (chan_type == t_rr_type::CHANY) { + const t_chan_details& from_chan_details = (chan_type == e_rr_type::CHANX) ? chan_details_x : chan_details_y; + const t_chan_details& opposite_chan_details = (chan_type == e_rr_type::CHANX) ? chan_details_y : chan_details_x; + e_rr_type opposite_chan_type = e_rr_type::CHANY; + if (chan_type == e_rr_type::CHANY) { //Swap values since CHANX was assumed above std::swap(seg_coord, chan_coord); std::swap(seg_dimension, chan_dimension); - opposite_chan_type = t_rr_type::CHANX; + opposite_chan_type = e_rr_type::CHANX; } const t_chan_seg_details* seg_details = from_chan_details[x_coord][y_coord].data(); @@ -3201,7 +3201,7 @@ static void build_rr_chan(RRGraphBuilder& rr_graph_builder, VTR_ASSERT(seg_coord == start); const t_chan_seg_details* from_seg_details = nullptr; - if (chan_type == t_rr_type::CHANY) { + if (chan_type == e_rr_type::CHANY) { from_seg_details = chan_details_y[x_coord][start].data(); } else { from_seg_details = chan_details_x[start][y_coord].data(); @@ -3222,11 +3222,11 @@ static void build_rr_chan(RRGraphBuilder& rr_graph_builder, if (chan_coord > 0) { const t_chan_seg_details* to_seg_details; int max_opposite_chan_width; - if (chan_type == t_rr_type::CHANX) { + if (chan_type == e_rr_type::CHANX) { to_seg_details = chan_details_y[start][y_coord].data(); max_opposite_chan_width = nodes_per_chan.y_max; } else { - VTR_ASSERT(chan_type == t_rr_type::CHANY); + VTR_ASSERT(chan_type == e_rr_type::CHANY); to_seg_details = chan_details_x[x_coord][start].data(); max_opposite_chan_width = nodes_per_chan.x_max; } @@ -3246,7 +3246,7 @@ static void build_rr_chan(RRGraphBuilder& rr_graph_builder, to_seg_details = chan_details_y[start][y_coord + 1].data(); max_opposite_chan_width = nodes_per_chan.y_max; } else { - VTR_ASSERT(chan_type == t_rr_type::CHANY); + VTR_ASSERT(chan_type == e_rr_type::CHANY); to_seg_details = chan_details_x[x_coord + 1][start].data(); max_opposite_chan_width = nodes_per_chan.x_max; } @@ -3278,7 +3278,7 @@ static void build_rr_chan(RRGraphBuilder& rr_graph_builder, to_seg_details = chan_details_x[target_seg][y_coord].data(); max_chan_width = nodes_per_chan.x_max; } else { - VTR_ASSERT(chan_type == t_rr_type::CHANY); + VTR_ASSERT(chan_type == e_rr_type::CHANY); to_seg_details = chan_details_y[x_coord][target_seg].data(); max_chan_width = nodes_per_chan.y_max; } @@ -3305,7 +3305,7 @@ static void build_rr_chan(RRGraphBuilder& rr_graph_builder, if (chan_type == e_rr_type::CHANX) { rr_graph_builder.set_node_coordinates(node, start, y_coord, end, y_coord); } else { - VTR_ASSERT(chan_type == t_rr_type::CHANY); + VTR_ASSERT(chan_type == e_rr_type::CHANY); rr_graph_builder.set_node_coordinates(node, x_coord, start, x_coord, end); } @@ -4210,7 +4210,7 @@ static void build_unidir_rr_opins(RRGraphBuilder& rr_graph_builder, continue; } - RRNodeId opin_node_index = rr_graph_builder.node_lookup().find_node(layer, i, j, t_rr_type::OPIN, pin_index, side); + RRNodeId opin_node_index = rr_graph_builder.node_lookup().find_node(layer, i, j, e_rr_type::OPIN, pin_index, side); if (!opin_node_index) continue; //No valid from node for (int iseg = 0; iseg < num_seg_types; iseg++) { @@ -4230,7 +4230,7 @@ static void build_unidir_rr_opins(RRGraphBuilder& rr_graph_builder, * side is the side of the logic or io block. */ bool vert = ((side == TOP) || (side == BOTTOM)); bool pos_dir = ((side == TOP) || (side == RIGHT)); - t_rr_type chan_type = (vert ? e_rr_type::CHANX : t_rr_type::CHANY); + e_rr_type chan_type = (vert ? e_rr_type::CHANX : e_rr_type::CHANY); int chan = (vert ? (j) : (i)); int seg = (vert ? (i) : (j)); int max_len = (vert ? grid.width() : grid.height()); @@ -4623,7 +4623,7 @@ static RRNodeId pick_best_direct_connect_target_rr_node(const RRGraphView& rr_gr //candidate would be picked (i.e. to minimize the drawn edge length). // //This function attempts to pick the 'best/closest' of the candidates. - VTR_ASSERT(rr_graph.node_type(from_rr) == t_rr_type::OPIN); + VTR_ASSERT(rr_graph.node_type(from_rr) == e_rr_type::OPIN); float best_dist = std::numeric_limits::infinity(); RRNodeId best_rr = RRNodeId::INVALID(); diff --git a/vpr/src/route/rr_graph2.cpp b/vpr/src/route/rr_graph2.cpp index a4ccb673440..a166276c021 100644 --- a/vpr/src/route/rr_graph2.cpp +++ b/vpr/src/route/rr_graph2.cpp @@ -28,7 +28,7 @@ static void load_chan_rr_indices(const int max_chan_width, const DeviceGrid& grid, const int chan_len, const int num_chans, - const t_rr_type type, + const e_rr_type type, const t_chan_details& chan_details, RRGraphBuilder& rr_graph_builder, int* index); @@ -63,7 +63,7 @@ static int get_bidir_track_to_chan_seg(RRGraphBuilder& rr_graph_builder, const int to_chan, const int to_seg, const int to_sb, - const t_rr_type to_type, + const e_rr_type to_type, const t_chan_seg_details* seg_details, const bool from_is_sblock, const int from_switch, @@ -78,7 +78,7 @@ static int get_unidir_track_to_chan_seg(RRGraphBuilder& rr_graph_builder, const int to_chan, const int to_seg, const int to_sb, - const t_rr_type to_type, + const e_rr_type to_type, const int max_chan_width, const DeviceGrid& grid, const enum e_side from_side, @@ -122,7 +122,7 @@ static void get_switchblocks_edges(RRGraphBuilder& rr_graph_builder, const e_side to_side, const int to_x, const int to_y, - const t_rr_type to_chan_type, + const e_rr_type to_chan_type, const int switch_override, const int custom_3d_sb_fanin_fanout, const int delayless_switch, @@ -158,7 +158,7 @@ static int get_track_to_chan_seg(RRGraphBuilder& rr_graph_builder, const int from_track, const int to_chan, const int to_seg, - const t_rr_type to_chan_type, + const e_rr_type to_chan_type, const e_side from_side, const e_side to_side, const int swtich_override, @@ -249,7 +249,7 @@ void dump_seg_details(t_seg_details* seg_details, // from_seg_coord: The horizontal or vertical location along the channel (i.e. y-coord for CHANY, x-coord for CHANX) // from_chan_type: The from channel type // to_chan_type: The to channel type -static int should_create_switchblock(const DeviceGrid& grid, int layer_num, int from_chan_coord, int from_seg_coord, t_rr_type from_chan_type, t_rr_type to_chan_type); +static int should_create_switchblock(const DeviceGrid& grid, int layer_num, int from_chan_coord, int from_seg_coord, e_rr_type from_chan_type, e_rr_type to_chan_type); static bool should_apply_switch_override(int switch_override); @@ -693,7 +693,7 @@ int get_bidir_opin_connections(RRGraphBuilder& rr_graph_builder, int to_switch; int is_connected_track; t_physical_tile_type_ptr type; - t_rr_type to_type; + e_rr_type to_type; auto& device_ctx = g_vpr_ctx.device(); @@ -781,7 +781,7 @@ int get_unidir_opin_connections(RRGraphBuilder& rr_graph_builder, const int seg, int Fc, const int seg_type_index, - const t_rr_type chan_type, + const e_rr_type chan_type, const t_chan_seg_details* seg_details, RRNodeId from_rr_node, t_rr_edge_info_set& rr_edges_to_create, @@ -1083,7 +1083,7 @@ static void load_chan_rr_indices(const int max_chan_width, const DeviceGrid& grid, const int chan_len, const int num_chans, - const t_rr_type type, + const e_rr_type type, const t_chan_details& chan_details, RRGraphBuilder& rr_graph_builder, int* index) { @@ -1452,7 +1452,7 @@ void alloc_and_load_rr_node_indices(RRGraphBuilder& rr_graph_builder, * of the *first* rr_node at a given (i,j) location. */ /* Alloc the lookup table */ - for (t_rr_type rr_type : RR_TYPES) { + for (e_rr_type rr_type : RR_TYPES) { if (rr_type == e_rr_type::CHANX) { rr_graph_builder.node_lookup().resize_nodes(grid.get_num_layers(), grid.height(), grid.width(), rr_type, NUM_2D_SIDES); } else { @@ -1541,7 +1541,7 @@ bool verify_rr_node_indices(const DeviceGrid& grid, for (int l = 0; l < layer; ++l) { for (int x = 0; x < width; ++x) { for (int y = 0; y < height; ++y) { - for (t_rr_type rr_type : RR_TYPES) { + for (e_rr_type rr_type : RR_TYPES) { /* Get the list of nodes at a specific location (x, y) */ std::vector nodes_from_lookup; if (rr_type == e_rr_type::CHANX || rr_type == e_rr_type::CHANY) { @@ -1794,9 +1794,9 @@ int get_track_to_tracks(RRGraphBuilder& rr_graph_builder, const int from_chan, const int from_seg, const int from_track, - const t_rr_type from_type, + const e_rr_type from_type, const int to_seg, - const t_rr_type to_type, + const e_rr_type to_type, const int chan_len, const int max_chan_width, const DeviceGrid& grid, @@ -2056,7 +2056,7 @@ static int get_bidir_track_to_chan_seg(RRGraphBuilder& rr_graph_builder, const int to_chan, const int to_seg, const int to_sb, - const t_rr_type to_type, + const e_rr_type to_type, const t_chan_seg_details* seg_details, const bool from_is_sblock, const int from_switch, @@ -2125,7 +2125,7 @@ static void get_switchblocks_edges(RRGraphBuilder& rr_graph_builder, const e_side to_side, const int to_x, const int to_y, - const t_rr_type to_chan_type, + const e_rr_type to_chan_type, const int switch_override, const int custom_3d_sb_fanin_fanout, const int delayless_switch, @@ -2238,7 +2238,7 @@ static int get_track_to_chan_seg(RRGraphBuilder& rr_graph_builder, const int from_wire, const int to_chan, const int to_seg, - const t_rr_type to_chan_type, + const e_rr_type to_chan_type, const e_side from_side, const e_side to_side, const int switch_override, @@ -2322,7 +2322,7 @@ static int get_unidir_track_to_chan_seg(RRGraphBuilder& rr_graph_builder, const int to_chan, const int to_seg, const int to_sb, - const t_rr_type to_type, + const e_rr_type to_type, const int max_chan_width, const DeviceGrid& grid, const enum e_side from_side, @@ -2999,7 +2999,7 @@ static int find_label_of_track(const std::vector& wire_mux_on_track, return i_label; } -static int should_create_switchblock(const DeviceGrid& grid, int layer_num, int from_chan_coord, int from_seg_coord, t_rr_type from_chan_type, t_rr_type to_chan_type) { +static int should_create_switchblock(const DeviceGrid& grid, int layer_num, int from_chan_coord, int from_seg_coord, e_rr_type from_chan_type, e_rr_type to_chan_type) { //Convert the chan/seg indices to real x/y coordinates int y_coord; int x_coord; diff --git a/vpr/src/route/rr_graph2.h b/vpr/src/route/rr_graph2.h index 71b7004197f..b783e993d6b 100644 --- a/vpr/src/route/rr_graph2.h +++ b/vpr/src/route/rr_graph2.h @@ -139,7 +139,7 @@ int get_unidir_opin_connections(RRGraphBuilder& rr_graph_builder, const int seg, int Fc, const int seg_type_index, - const t_rr_type chan_type, + const e_rr_type chan_type, const t_chan_seg_details* seg_details, RRNodeId from_rr_node, t_rr_edge_info_set& rr_edges_to_create, @@ -169,9 +169,9 @@ int get_track_to_tracks(RRGraphBuilder& rr_graph_builder, const int from_chan, const int from_seg, const int from_track, - const t_rr_type from_type, + const e_rr_type from_type, const int to_seg, - const t_rr_type to_type, + const e_rr_type to_type, const int chan_len, const int max_chan_width, const DeviceGrid& grid, diff --git a/vpr/src/route/rr_graph_area.cpp b/vpr/src/route/rr_graph_area.cpp index ed5a8f351cc..c026d12a1a1 100644 --- a/vpr/src/route/rr_graph_area.cpp +++ b/vpr/src/route/rr_graph_area.cpp @@ -117,7 +117,7 @@ void count_bidir_routing_transistors(int num_switch, int wire_to_ipin_switch, fl float* shared_buffer_trans; /* [0..max(device_ctx.grid.width(),device_ctx.grid.height())] */ float *unsharable_switch_trans, *sharable_switch_trans; /* [0..num_switch-1] */ - t_rr_type from_rr_type, to_rr_type; + e_rr_type from_rr_type, to_rr_type; int iedge, num_edges, maxlen; int iswitch, i, j, iseg, max_inputs_to_cblock; float input_cblock_trans, shared_opin_buffer_trans; @@ -322,7 +322,7 @@ void count_unidir_routing_transistors(std::vector& /*segment_inf* /* corresponding to IPINs will be 0. */ - t_rr_type from_rr_type, to_rr_type; + e_rr_type from_rr_type, to_rr_type; int i, j, iseg, iedge, num_edges, maxlen; int max_inputs_to_cblock; float input_cblock_trans; diff --git a/vpr/src/route/rr_graph_sbox.h b/vpr/src/route/rr_graph_sbox.h index 87843f57a1a..d50d9a50edb 100644 --- a/vpr/src/route/rr_graph_sbox.h +++ b/vpr/src/route/rr_graph_sbox.h @@ -6,10 +6,10 @@ std::vector get_switch_box_tracks(const int from_i, const int from_j, const int from_track, - const t_rr_type from_type, + const e_rr_type from_type, const int to_i, const int to_j, - const t_rr_type to_type, + const e_rr_type to_type, const std::vector*** switch_block_conn); vtr::NdMatrix, 3> alloc_and_load_switch_block_conn(t_chan_width* nodes_per_chan, diff --git a/vpr/src/route/rr_graph_timing_params.cpp b/vpr/src/route/rr_graph_timing_params.cpp index 754848fae74..71316392626 100644 --- a/vpr/src/route/rr_graph_timing_params.cpp +++ b/vpr/src/route/rr_graph_timing_params.cpp @@ -26,7 +26,7 @@ void add_rr_graph_C_from_switches(float C_ipin_cblock) { size_t to_node; int icblock, isblock, iseg_low, iseg_high; float Cin, Cout; - t_rr_type from_rr_type, to_rr_type; + e_rr_type from_rr_type, to_rr_type; bool* cblock_counted; /* [0..maxlen-1] -- 0th element unused. */ float* buffer_Cin; /* [0..maxlen-1] */ bool buffered; @@ -53,12 +53,12 @@ void add_rr_graph_C_from_switches(float C_ipin_cblock) { from_rr_type = rr_graph.node_type(rr_id); - if ((from_rr_type == t_rr_type::CHANX || from_rr_type == t_rr_type::CHANY)) { + if ((from_rr_type == e_rr_type::CHANX || from_rr_type == e_rr_type::CHANY)) { for (t_edge_size iedge = 0; iedge < rr_graph.num_edges(rr_id); iedge++) { to_node = size_t(rr_graph.edge_sink_node(rr_id, iedge)); to_rr_type = rr_graph.node_type(RRNodeId(to_node)); - if (to_rr_type == t_rr_type::CHANX || to_rr_type == t_rr_type::CHANY) { + if (to_rr_type == e_rr_type::CHANX || to_rr_type == e_rr_type::CHANY) { switch_index = rr_graph.edge_switch(rr_id, iedge); Cin = rr_graph.rr_switch_inf(RRSwitchId(switch_index)).Cin; Cout = rr_graph.rr_switch_inf(RRSwitchId(switch_index)).Cout; @@ -99,7 +99,7 @@ void add_rr_graph_C_from_switches(float C_ipin_cblock) { } /* End edge to CHANX or CHANY node. */ - else if (to_rr_type == t_rr_type::IPIN) { + else if (to_rr_type == e_rr_type::IPIN) { if (INCLUDE_TRACK_BUFFERS) { /* Implements sharing of the track to connection box buffer. * Such a buffer exists at every segment of the wire at which @@ -129,7 +129,7 @@ void add_rr_graph_C_from_switches(float C_ipin_cblock) { * } * } */ - if (from_rr_type == t_rr_type::CHANX) { + if (from_rr_type == e_rr_type::CHANX) { iseg_low = rr_graph.node_xlow(rr_id); iseg_high = rr_graph.node_xhigh(rr_id); } else { /* CHANY */ @@ -148,13 +148,13 @@ void add_rr_graph_C_from_switches(float C_ipin_cblock) { } /* End node is CHANX or CHANY */ - else if (from_rr_type == t_rr_type::OPIN) { + else if (from_rr_type == e_rr_type::OPIN) { for (t_edge_size iedge = 0; iedge < rr_graph.num_edges(rr_id); iedge++) { switch_index = rr_graph.edge_switch(rr_id, iedge); to_node = size_t(rr_graph.edge_sink_node(rr_id, iedge)); to_rr_type = rr_graph.node_type(RRNodeId(to_node)); - if (to_rr_type != t_rr_type::CHANX && to_rr_type != t_rr_type::CHANY) + if (to_rr_type != e_rr_type::CHANX && to_rr_type != e_rr_type::CHANY) continue; if (rr_graph.node_direction(RRNodeId(to_node)) == Direction::BIDIR) { @@ -179,7 +179,7 @@ void add_rr_graph_C_from_switches(float C_ipin_cblock) { switch_index = rr_graph.edge_switch(inode, iedge); to_node = size_t(rr_graph.edge_sink_node(inode, iedge)); to_rr_type = rr_graph.node_type(RRNodeId(to_node)); - if (to_rr_type == t_rr_type::CHANX || to_rr_type == t_rr_type::CHANY) { + if (to_rr_type == e_rr_type::CHANX || to_rr_type == e_rr_type::CHANY) { if (rr_graph.node_direction(RRNodeId(to_node)) != Direction::BIDIR) { /* Cout was not added in these cases */ Couts_to_add[to_node] = std::max(Couts_to_add[to_node], rr_graph.rr_switch_inf(RRSwitchId(switch_index)).Cout); diff --git a/vpr/src/timing/VprTimingGraphResolver.cpp b/vpr/src/timing/VprTimingGraphResolver.cpp index 81fbef6db39..33ea251d52d 100644 --- a/vpr/src/timing/VprTimingGraphResolver.cpp +++ b/vpr/src/timing/VprTimingGraphResolver.cpp @@ -342,11 +342,11 @@ void VprTimingGraphResolver::get_detailed_interconnect_components_helper(std::ve // Process the current interconnect component if it is of type OPIN, CHANX, CHANY, IPIN // Only process SOURCE, SINK in debug report mode auto rr_type = rr_graph.node_type(RRNodeId(current_node->inode)); - if (rr_type == t_rr_type::OPIN - || rr_type == t_rr_type::IPIN - || rr_type == t_rr_type::CHANX - || rr_type == t_rr_type::CHANY - || ((rr_type == t_rr_type::SOURCE || rr_type == t_rr_type::SINK) && (detail_level() == e_timing_report_detail::DEBUG))) { + if (rr_type == e_rr_type::OPIN + || rr_type == e_rr_type::IPIN + || rr_type == e_rr_type::CHANX + || rr_type == e_rr_type::CHANY + || ((rr_type == e_rr_type::SOURCE || rr_type == e_rr_type::SINK) && (detail_level() == e_timing_report_detail::DEBUG))) { tatum::DelayComponent net_component; // declare a new instance of DelayComponent net_component.type_name = rr_graph.node_coordinate_to_string(RRNodeId(current_node->inode)); diff --git a/vpr/src/util/vpr_utils.cpp b/vpr/src/util/vpr_utils.cpp index f86a56328a6..2574c505b57 100644 --- a/vpr/src/util/vpr_utils.cpp +++ b/vpr/src/util/vpr_utils.cpp @@ -1780,7 +1780,7 @@ RRNodeId get_pin_rr_node_id(const RRSpatialLookup& rr_spatial_lookup, const int root_j, int pin_physical_num) { auto pin_type = get_pin_type_from_pin_physical_num(physical_tile, pin_physical_num); - t_rr_type node_type = (pin_type == e_pin_type::DRIVER) ? t_rr_type::OPIN : t_rr_type::IPIN; + e_rr_type node_type = (pin_type == e_pin_type::DRIVER) ? e_rr_type::OPIN : e_rr_type::IPIN; std::vector x_offset; std::vector y_offset; std::vector pin_sides; @@ -1808,22 +1808,22 @@ RRNodeId get_class_rr_node_id(const RRSpatialLookup& rr_spatial_lookup, int class_physical_num) { auto class_type = get_class_type_from_class_physical_num(physical_tile, class_physical_num); VTR_ASSERT(class_type == DRIVER || class_type == RECEIVER); - t_rr_type node_type = (class_type == e_pin_type::DRIVER) ? t_rr_type::SOURCE : t_rr_type::SINK; + e_rr_type node_type = (class_type == e_pin_type::DRIVER) ? e_rr_type::SOURCE : e_rr_type::SINK; return rr_spatial_lookup.find_node(layer, i, j, node_type, class_physical_num); } bool node_in_same_physical_tile(RRNodeId node_first, RRNodeId node_second) { const auto& device_ctx = g_vpr_ctx.device(); const auto& rr_graph = device_ctx.rr_graph; - auto first_rr_type = rr_graph.node_type(node_first); + auto firse_rr_type = rr_graph.node_type(node_first); auto second_rr_type = rr_graph.node_type(node_second); // If one of the given node's type is CHANX/Y nodes are definitely not in the same physical tile - if (first_rr_type == t_rr_type::CHANX || first_rr_type == t_rr_type::CHANY || second_rr_type == t_rr_type::CHANX || second_rr_type == t_rr_type::CHANY) { + if (firse_rr_type == e_rr_type::CHANX || firse_rr_type == e_rr_type::CHANY || second_rr_type == e_rr_type::CHANX || second_rr_type == e_rr_type::CHANY) { return false; } else { - VTR_ASSERT(first_rr_type == t_rr_type::IPIN || first_rr_type == t_rr_type::OPIN || first_rr_type == t_rr_type::SINK || first_rr_type == t_rr_type::SOURCE); - VTR_ASSERT(second_rr_type == t_rr_type::IPIN || second_rr_type == t_rr_type::OPIN || second_rr_type == t_rr_type::SINK || second_rr_type == t_rr_type::SOURCE); + VTR_ASSERT(firse_rr_type == e_rr_type::IPIN || firse_rr_type == e_rr_type::OPIN || firse_rr_type == e_rr_type::SINK || firse_rr_type == e_rr_type::SOURCE); + VTR_ASSERT(second_rr_type == e_rr_type::IPIN || second_rr_type == e_rr_type::OPIN || second_rr_type == e_rr_type::SINK || second_rr_type == e_rr_type::SOURCE); int first_layer = rr_graph.node_layer(node_first); int first_x = rr_graph.node_xlow(node_first); int first_y = rr_graph.node_ylow(node_first); From a6fe3fafc96bf9d20959ef3d08fea0e10e51792b Mon Sep 17 00:00:00 2001 From: soheilshahrouz Date: Fri, 25 Apr 2025 12:44:37 -0400 Subject: [PATCH 03/12] doxygen comment for Direction --- libs/librrgraph/src/base/rr_node_types.h | 25 ++++++++++++------------ 1 file changed, 12 insertions(+), 13 deletions(-) diff --git a/libs/librrgraph/src/base/rr_node_types.h b/libs/librrgraph/src/base/rr_node_types.h index 6b4fd306e48..c92e546d488 100644 --- a/libs/librrgraph/src/base/rr_node_types.h +++ b/libs/librrgraph/src/base/rr_node_types.h @@ -23,10 +23,10 @@ enum class e_rr_type : unsigned char { SOURCE = 0, /// RR_TYPES = {{e_ e_rr_type::OPIN, e_rr_type::CHANX, e_rr_type::CHANY}}; constexpr std::array rr_node_typename{{"SOURCE", "SINK", "IPIN", "OPIN", "CHANX", "CHANY"}}; -/* - * Direction::INC: wire driver is positioned at the low-coordinate end of the wire. - * Direction::DEC: wire_driver is positioned at the high-coordinate end of the wire. - * Direction::BIDIR: wire has multiple drivers, so signals can travel either way along the wire - * Direction::NONE: node does not have a direction, such as IPIN/OPIN +/** + * @enum Direction + * @brief Represents the wire direction for a routing resource node. */ enum class Direction : unsigned char { - INC = 0, - DEC = 1, - BIDIR = 2, - NONE = 3, + INC = 0, ///< wire driver is positioned at the low-coordinate end of the wire. + DEC = 1, ///< wire_driver is positioned at the high-coordinate end of the wire. + BIDIR = 2, ///< wire has multiple drivers, so signals can travel either way along the wire + NONE = 3, ///< node does not have a direction, such as IPIN/OPIN NUM_DIRECTIONS }; + constexpr std::array(Direction::NUM_DIRECTIONS)> DIRECTION_STRING = {{"INC_DIRECTION", "DEC_DIRECTION", "BI_DIRECTION", "NONE"}}; //this array is used in rr_graph_storage.cpp so that node_direction_string() can return a const std::string& From 6291e162f2fcfec12ed208543a293bf5f019b135 Mon Sep 17 00:00:00 2001 From: soheilshahrouz Date: Fri, 25 Apr 2025 13:12:23 -0400 Subject: [PATCH 04/12] add vtr::array class --- libs/libvtrutil/src/vtr_array.h | 105 +++++++++++++++++++++++++++ libs/libvtrutil/src/vtr_array_view.h | 5 +- libs/libvtrutil/src/vtr_vector.h | 5 +- 3 files changed, 108 insertions(+), 7 deletions(-) create mode 100644 libs/libvtrutil/src/vtr_array.h diff --git a/libs/libvtrutil/src/vtr_array.h b/libs/libvtrutil/src/vtr_array.h new file mode 100644 index 00000000000..0f1bea88ca0 --- /dev/null +++ b/libs/libvtrutil/src/vtr_array.h @@ -0,0 +1,105 @@ +#pragma once + +#include +#include +#include + +namespace vtr { + +/** + * @brief A std::array wrapper that can be indexed by a vtr::StrongId. + * + * @tparam K Key type (e.g., vtr::StrongId) + * @tparam V Value type + * @tparam N Number of elements + */ +template +class array { + public: + using key_type = K; + using value_type = V; + using size_type = std::size_t; + using reference = V&; + using const_reference = const V&; + using iterator = typename std::array::iterator; + using const_iterator = typename std::array::const_iterator; + + /** + * @brief Construct a vtr::array from a list of values. + * + * This constructor allows direct brace-initialization of the array: + * @code + * vtr::array arr{1, 2, 3}; + * @endcode + * + * @tparam Args Types of the values being passed. All must be convertible to V. + * @param args The values to initialize the array with. Must match the array size. + *//** + * @brief Construct a vtr::array from a list of values. + * + * This constructor allows direct brace-initialization of the array: + * @code + * vtr::array arr{1, 2, 3}; + * @endcode + * + * @tparam Args Types of the values being passed. All must be convertible to V. + * @param args The values to initialize the array with. Must match the array size. + */ + template...>>> + constexpr array(Args&&... args) + : data_{ { std::forward(args)... } } {} + + + + ///@brief Access element with strong ID + reference operator[](K id) { + return data_[static_cast(id)]; + } + + ///@brief Access element with strong ID (const) + const_reference operator[](K id) const { + return data_[static_cast(id)]; + } + + ///@brief Access element with bounds checking + reference at(K id) { + return data_.at(static_cast(id)); + } + + ///@brief Access element with bounds checking (const) + const_reference at(K id) const { + return data_.at(static_cast(id)); + } + + // Iterators + iterator begin() { return data_.begin(); } + iterator end() { return data_.end(); } + const_iterator begin() const { return data_.begin(); } + const_iterator end() const { return data_.end(); } + const_iterator cbegin() const { return data_.cbegin(); } + const_iterator cend() const { return data_.cend(); } + + // Size + constexpr size_type size() const { return N; } + constexpr bool empty() const { return N == 0; } + + // Data + V* data() { return data_.data(); } + const V* data() const { return data_.data(); } + + // Front/Back + reference front() { return data_.front(); } + const_reference front() const { return data_.front(); } + reference back() { return data_.back(); } + const_reference back() const { return data_.back(); } + + // Fill + void fill(const V& value) { data_.fill(value); } + + private: + std::array data_; +}; + +} // namespace vtr diff --git a/libs/libvtrutil/src/vtr_array_view.h b/libs/libvtrutil/src/vtr_array_view.h index 0bb48f65eec..4f1ca034fac 100644 --- a/libs/libvtrutil/src/vtr_array_view.h +++ b/libs/libvtrutil/src/vtr_array_view.h @@ -1,5 +1,4 @@ -#ifndef _VTR_ARRAY_VIEW_H -#define _VTR_ARRAY_VIEW_H +#pragma once #include #include @@ -263,5 +262,3 @@ array_view_id #include #include @@ -250,4 +250,3 @@ class vector : private std::vector { key_iterator key_end() const { return key_iterator(key_type(size())); } }; } // namespace vtr -#endif From 57d1006f9bcbec767d9568a47edf66c6a83bc33a Mon Sep 17 00:00:00 2001 From: soheilshahrouz Date: Fri, 25 Apr 2025 13:13:43 -0400 Subject: [PATCH 05/12] make rr_node_typename of type vtr::array to index it only with e_rr_type --- libs/librrgraph/src/base/check_rr_graph.cpp | 4 ++-- libs/librrgraph/src/base/rr_graph_obj.cpp | 2 +- libs/librrgraph/src/base/rr_graph_storage.cpp | 10 +++++----- libs/librrgraph/src/base/rr_graph_storage.h | 2 +- libs/librrgraph/src/base/rr_node_types.h | 7 +++++-- vpr/src/base/old_traceback.cpp | 2 +- vpr/src/route/router_lookahead_map_utils.cpp | 8 ++++---- vpr/src/route/rr_graph2.cpp | 4 ++-- vpr/src/route/rr_graph_area.cpp | 2 +- 9 files changed, 22 insertions(+), 19 deletions(-) diff --git a/libs/librrgraph/src/base/check_rr_graph.cpp b/libs/librrgraph/src/base/check_rr_graph.cpp index 72ab0966645..59dc5638d7a 100644 --- a/libs/librrgraph/src/base/check_rr_graph.cpp +++ b/libs/librrgraph/src/base/check_rr_graph.cpp @@ -164,7 +164,7 @@ void check_rr_graph(const RRGraphView& rr_graph, if (!(is_chan_to_chan || is_chan_to_ipin || is_opin_to_chan || is_internal_edge)) { VPR_ERROR(VPR_ERROR_ROUTE, "in check_rr_graph: node %d (%s) connects to node %d (%s) %zu times - multi-connections only expected for CHAN<->CHAN, CHAN->IPIN, OPIN->CHAN.\n", - inode, rr_node_typename[(size_t)rr_type], to_node, rr_node_typename[(size_t)to_rr_type], num_edges_to_node); + inode, rr_node_typename[rr_type], to_node, rr_node_typename[to_rr_type], num_edges_to_node); } //Between two wire segments @@ -244,7 +244,7 @@ void check_rr_graph(const RRGraphView& rr_graph, // #TODO: No edges are added for internal pins. However, they need to be checked somehow! if (ptc_num >= type->num_pins) { VTR_LOG_ERROR("in check_rr_graph: node %d (%s) type: %s is internal node.\n", - inode, rr_graph.node_type_string(rr_node), rr_node_typename[(size_t)rr_type]); + inode, rr_graph.node_type_string(rr_node), rr_node_typename[rr_type]); } } diff --git a/libs/librrgraph/src/base/rr_graph_obj.cpp b/libs/librrgraph/src/base/rr_graph_obj.cpp index 9f52f523eb7..211c49990bf 100644 --- a/libs/librrgraph/src/base/rr_graph_obj.cpp +++ b/libs/librrgraph/src/base/rr_graph_obj.cpp @@ -451,7 +451,7 @@ short RRGraph::chan_num_tracks(const short& x, const short& y, const e_rr_type& /* This function aims to print basic information about a node */ void RRGraph::print_node(const RRNodeId& node) const { VTR_LOG("Node id: %d\n", node_index(node)); - VTR_LOG("Node type: %s\n", rr_node_typename[(size_t)node_type(node)]); + VTR_LOG("Node type: %s\n", rr_node_typename[node_type(node)]); VTR_LOG("Node xlow: %d\n", node_xlow(node)); VTR_LOG("Node ylow: %d\n", node_ylow(node)); VTR_LOG("Node xhigh: %d\n", node_xhigh(node)); diff --git a/libs/librrgraph/src/base/rr_graph_storage.cpp b/libs/librrgraph/src/base/rr_graph_storage.cpp index 787ec67098e..28da321cc1f 100644 --- a/libs/librrgraph/src/base/rr_graph_storage.cpp +++ b/libs/librrgraph/src/base/rr_graph_storage.cpp @@ -608,10 +608,10 @@ bool t_rr_graph_storage::validate(const vtr::vector } const char* t_rr_graph_storage::node_type_string(RRNodeId id) const { - return rr_node_typename[(size_t)node_type(id)]; + return rr_node_typename[node_type(id)]; } const char* t_rr_graph_view::node_type_string(RRNodeId id) const { - return rr_node_typename[(size_t)node_type(id)]; + return rr_node_typename[node_type(id)]; } const std::string& t_rr_graph_storage::node_direction_string(RRNodeId id) const { @@ -675,7 +675,7 @@ static int get_node_pin_num( RRNodeId id) { e_rr_type node_type = node_storage[id].type_; if (node_type != e_rr_type::IPIN && node_type != e_rr_type::OPIN) { - VTR_LOG_ERROR("Attempted to access RR node 'pin_num' for non-IPIN/OPIN type '%s'", rr_node_typename[(size_t)node_type]); + VTR_LOG_ERROR("Attempted to access RR node 'pin_num' for non-IPIN/OPIN type '%s'", rr_node_typename[node_type]); } return node_ptc[id].ptc_.pin_num; } @@ -686,7 +686,7 @@ static int get_node_track_num( RRNodeId id) { e_rr_type node_type = node_storage[id].type_; if (node_type != e_rr_type::CHANX && node_type != e_rr_type::CHANY) { - VTR_LOG_ERROR("Attempted to access RR node 'track_num' for non-CHANX/CHANY type '%s'", rr_node_typename[(size_t)node_type]); + VTR_LOG_ERROR("Attempted to access RR node 'track_num' for non-CHANX/CHANY type '%s'", rr_node_typename[node_type]); } return node_ptc[id].ptc_.track_num; } @@ -697,7 +697,7 @@ static int get_node_class_num( RRNodeId id) { e_rr_type node_type = node_storage[id].type_; if (node_type != e_rr_type::SOURCE && node_type != e_rr_type::SINK) { - VTR_LOG_ERROR("Attempted to access RR node 'class_num' for non-SOURCE/SINK type '%s'", rr_node_typename[(size_t)node_type]); + VTR_LOG_ERROR("Attempted to access RR node 'class_num' for non-SOURCE/SINK type '%s'", rr_node_typename[node_type]); } return node_ptc[id].ptc_.class_num; } diff --git a/libs/librrgraph/src/base/rr_graph_storage.h b/libs/librrgraph/src/base/rr_graph_storage.h index a76e57fe731..2f6702f24f3 100644 --- a/libs/librrgraph/src/base/rr_graph_storage.h +++ b/libs/librrgraph/src/base/rr_graph_storage.h @@ -783,7 +783,7 @@ class t_rr_graph_storage { auto& node_data = node_storage[id]; if (node_data.type_ != e_rr_type::IPIN && node_data.type_ != e_rr_type::OPIN) { VTR_LOG_ERROR("Attempted to access RR node 'side' for non-IPIN/OPIN type '%s'", - rr_node_typename[(size_t)node_data.type_]); + rr_node_typename[node_data.type_]); } // Return a vector showing only the sides that the node appears std::bitset side_tt = node_storage[id].dir_side_.sides; diff --git a/libs/librrgraph/src/base/rr_node_types.h b/libs/librrgraph/src/base/rr_node_types.h index c92e546d488..a03c8aa304a 100644 --- a/libs/librrgraph/src/base/rr_node_types.h +++ b/libs/librrgraph/src/base/rr_node_types.h @@ -7,7 +7,9 @@ #include #include #include + #include "vtr_range.h" +#include "vtr_array.h" #include "vtr_ndmatrix.h" #include "rr_graph_fwd.h" @@ -32,7 +34,8 @@ enum class e_rr_type : unsigned char { constexpr std::array RR_TYPES = {{e_rr_type::SOURCE, e_rr_type::SINK, e_rr_type::IPIN, e_rr_type::OPIN, e_rr_type::CHANX, e_rr_type::CHANY}}; -constexpr std::array rr_node_typename{{"SOURCE", "SINK", "IPIN", "OPIN", "CHANX", "CHANY"}}; + +vtr::array rr_node_typename {"SOURCE", "SINK", "IPIN", "OPIN", "CHANX", "CHANY"}; /** * @enum Direction @@ -123,4 +126,4 @@ struct t_rr_rc_data { // This is the data type of fast lookups of an rr-node given an (rr_type, layer, x, y, and the side) //[0..num_rr_types-1][0..num_layer-1][0..grid_width-1][0..grid_height-1][0..NUM_2D_SIDES-1][0..max_ptc-1] -typedef std::array, 4>, (size_t)e_rr_type::NUM_RR_TYPES> t_rr_node_indices; +typedef vtr::array, 4>, (size_t)e_rr_type::NUM_RR_TYPES> t_rr_node_indices; diff --git a/vpr/src/base/old_traceback.cpp b/vpr/src/base/old_traceback.cpp index 7d00bdaaaf0..29531cb29dc 100644 --- a/vpr/src/base/old_traceback.cpp +++ b/vpr/src/base/old_traceback.cpp @@ -120,7 +120,7 @@ void print_traceback(const t_trace* trace) { const t_trace* prev = nullptr; while (trace) { RRNodeId inode(trace->index); - VTR_LOG("%d (%s)", inode, rr_node_typename[(size_t)rr_graph.node_type(inode)]); + VTR_LOG("%d (%s)", inode, rr_node_typename[rr_graph.node_type(inode)]); if (trace->iswitch == OPEN) { VTR_LOG(" !"); //End of branch diff --git a/vpr/src/route/router_lookahead_map_utils.cpp b/vpr/src/route/router_lookahead_map_utils.cpp index 7d1ed4889fb..ce3e484f90a 100644 --- a/vpr/src/route/router_lookahead_map_utils.cpp +++ b/vpr/src/route/router_lookahead_map_utils.cpp @@ -411,7 +411,7 @@ t_src_opin_delays compute_router_src_opin_lookahead(bool is_flat) { //No untried instances of the current tile type left VTR_LOG_WARN("Found no %ssample locations for %s in %s\n", (num_sampled_locs == 0) ? "" : "more ", - rr_node_typename[(size_t)rr_type], + rr_node_typename[rr_type], device_ctx.physical_tile_types[itile].name.c_str()); break; } @@ -442,7 +442,7 @@ t_src_opin_delays compute_router_src_opin_lookahead(bool is_flat) { } if (reachable_wire_found) { VTR_LOGV_DEBUG(f_router_debug, "Found no reachable wires from %s (%s) at (%d,%d,%d)\n", - rr_node_typename[(size_t)rr_type], + rr_node_typename[rr_type], rr_node_arch_name(node_id, is_flat).c_str(), sample_loc.x, sample_loc.y, @@ -783,7 +783,7 @@ t_routing_cost_map get_routing_cost_map(int longest_seg_length, if (sample_nodes.empty()) { VTR_LOG_WARN("Unable to find any sample location for segment %s type '%s' (length %d)\n", - rr_node_typename[(size_t)chan_type], + rr_node_typename[chan_type], segment_inf.name.c_str(), segment_inf.length); } else { @@ -914,7 +914,7 @@ void dump_readable_router_lookahead_map(const std::string& file_name, const std: auto cost = wire_cost_func(chan_type, seg_index, from_layer_num, dx, dy, to_layer_num); ofs << from_layer_num << "," << to_layer_num << "," - << rr_node_typename[(size_t)chan_type] << "," + << rr_node_typename[chan_type] << "," << seg_index << "," << dx << "," << dy << "," diff --git a/vpr/src/route/rr_graph2.cpp b/vpr/src/route/rr_graph2.cpp index a166276c021..0c716b8dc3b 100644 --- a/vpr/src/route/rr_graph2.cpp +++ b/vpr/src/route/rr_graph2.cpp @@ -1554,8 +1554,8 @@ bool verify_rr_node_indices(const DeviceGrid& grid, if (rr_graph.node_type(inode) != rr_type) { VPR_ERROR(VPR_ERROR_ROUTE, "RR node type does not match between rr_nodes and rr_node_indices (%s/%s): %s", - rr_node_typename[(size_t)rr_graph.node_type(inode)], - rr_node_typename[(size_t)rr_type], + rr_node_typename[rr_graph.node_type(inode)], + rr_node_typename[rr_type], describe_rr_node(rr_graph, grid, rr_indexed_data, inode, is_flat).c_str()); } diff --git a/vpr/src/route/rr_graph_area.cpp b/vpr/src/route/rr_graph_area.cpp index c026d12a1a1..1941805b22f 100644 --- a/vpr/src/route/rr_graph_area.cpp +++ b/vpr/src/route/rr_graph_area.cpp @@ -228,7 +228,7 @@ void count_bidir_routing_transistors(int num_switch, int wire_to_ipin_switch, fl VPR_ERROR(VPR_ERROR_ROUTE, "in count_routing_transistors:\n" "\tUnexpected connection from node %d (type %s) to node %d (type %s).\n", - from_node, rr_node_typename[(size_t)from_rr_type], size_t(to_node), rr_node_typename[(size_t)to_rr_type]); + from_node, rr_node_typename[from_rr_type], size_t(to_node), rr_node_typename[to_rr_type]); break; } /* End switch on to_rr_type. */ From 971f4322cccec8a7de87f69b3b290690be07beec Mon Sep 17 00:00:00 2001 From: soheilshahrouz Date: Fri, 25 Apr 2025 13:22:51 -0400 Subject: [PATCH 06/12] add default constructor to vtr::array --- libs/libvtrutil/src/vtr_array.h | 21 +++++++++++---------- 1 file changed, 11 insertions(+), 10 deletions(-) diff --git a/libs/libvtrutil/src/vtr_array.h b/libs/libvtrutil/src/vtr_array.h index 0f1bea88ca0..d544c6a2c5b 100644 --- a/libs/libvtrutil/src/vtr_array.h +++ b/libs/libvtrutil/src/vtr_array.h @@ -35,22 +35,23 @@ class array { * @tparam Args Types of the values being passed. All must be convertible to V. * @param args The values to initialize the array with. Must match the array size. *//** - * @brief Construct a vtr::array from a list of values. - * - * This constructor allows direct brace-initialization of the array: - * @code - * vtr::array arr{1, 2, 3}; - * @endcode - * - * @tparam Args Types of the values being passed. All must be convertible to V. - * @param args The values to initialize the array with. Must match the array size. - */ + * @brief Construct a vtr::array from a list of values. + * + * This constructor allows direct brace-initialization of the array: + * @code + * vtr::array arr{1, 2, 3}; + * @endcode + * + * @tparam Args Types of the values being passed. All must be convertible to V. + * @param args The values to initialize the array with. Must match the array size. + */ template...>>> constexpr array(Args&&... args) : data_{ { std::forward(args)... } } {} + array() = default; ///@brief Access element with strong ID From 1e192c929335fc44c93917604572b4772c61609a Mon Sep 17 00:00:00 2001 From: soheilshahrouz Date: Fri, 25 Apr 2025 13:24:15 -0400 Subject: [PATCH 07/12] access rr_node_indices_ with e_rr_type instead of casting to size_t --- .../librrgraph/src/base/rr_spatial_lookup.cpp | 74 +++++++++---------- 1 file changed, 37 insertions(+), 37 deletions(-) diff --git a/libs/librrgraph/src/base/rr_spatial_lookup.cpp b/libs/librrgraph/src/base/rr_spatial_lookup.cpp index de5fdfdebef..aa9e17a1d5b 100644 --- a/libs/librrgraph/src/base/rr_spatial_lookup.cpp +++ b/libs/librrgraph/src/base/rr_spatial_lookup.cpp @@ -45,7 +45,7 @@ RRNodeId RRSpatialLookup::find_node(int layer, std::swap(node_x, node_y); } - VTR_ASSERT_SAFE(4 == rr_node_indices_[(size_t)type].ndims()); + VTR_ASSERT_SAFE(4 == rr_node_indices_[type].ndims()); /* Sanity check to ensure the layer, x, y, side and ptc are in range * - Return an valid id by searching in look-up when all the parameters are in range @@ -55,27 +55,27 @@ RRNodeId RRSpatialLookup::find_node(int layer, return RRNodeId::INVALID(); } - if (size_t(layer) >= rr_node_indices_[(size_t)type].dim_size(0)) { + if (size_t(layer) >= rr_node_indices_[type].dim_size(0)) { return RRNodeId::INVALID(); } - if (node_x >= rr_node_indices_[(size_t)type].dim_size(1)) { + if (node_x >= rr_node_indices_[type].dim_size(1)) { return RRNodeId::INVALID(); } - if(node_y >= rr_node_indices_[(size_t)type].dim_size(2)){ + if(node_y >= rr_node_indices_[type].dim_size(2)){ return RRNodeId::INVALID(); } - if (node_side >= rr_node_indices_[(size_t)type].dim_size(3)) { + if (node_side >= rr_node_indices_[type].dim_size(3)) { return RRNodeId::INVALID(); } - if (size_t(ptc) >= rr_node_indices_[(size_t)type][layer][node_x][node_y][node_side].size()) { + if (size_t(ptc) >= rr_node_indices_[type][layer][node_x][node_y][node_side].size()) { return RRNodeId::INVALID(); } - return rr_node_indices_[(size_t)type][layer][node_x][node_y][node_side][ptc]; + return rr_node_indices_[type][layer][node_x][node_y][node_side][ptc]; } std::vector RRSpatialLookup::find_nodes_in_range(int layer, @@ -126,7 +126,7 @@ std::vector RRSpatialLookup::find_nodes(int layer, std::swap(node_x, node_y); } - VTR_ASSERT_SAFE(4 == rr_node_indices_[(size_t)type].ndims()); + VTR_ASSERT_SAFE(4 == rr_node_indices_[type].ndims()); /* Sanity check to ensure the x, y, side are in range * - Return a list of valid ids by searching in look-up when all the parameters are in range @@ -136,32 +136,32 @@ std::vector RRSpatialLookup::find_nodes(int layer, return nodes; } - if (size_t(layer) >= rr_node_indices_[(size_t)type].dim_size(0)) { + if (size_t(layer) >= rr_node_indices_[type].dim_size(0)) { return nodes; } - if (node_x >= rr_node_indices_[(size_t)type].dim_size(1)) { + if (node_x >= rr_node_indices_[type].dim_size(1)) { return nodes; } - if(node_y >= rr_node_indices_[(size_t)type].dim_size(2)){ + if(node_y >= rr_node_indices_[type].dim_size(2)){ return nodes; } - if (side >= rr_node_indices_[(size_t)type].dim_size(3)) { + if (side >= rr_node_indices_[type].dim_size(3)) { return nodes; } /* Reserve space to avoid memory fragmentation */ size_t num_nodes = 0; - for (const auto& node : rr_node_indices_[(size_t)type][layer][node_x][node_y][side]) { + for (const auto& node : rr_node_indices_[type][layer][node_x][node_y][side]) { if (node.is_valid()) { num_nodes++; } } nodes.reserve(num_nodes); - for (const auto& node : rr_node_indices_[(size_t)type][layer][node_x][node_y][side]) { + for (const auto& node : rr_node_indices_[type][layer][node_x][node_y][side]) { if (node.is_valid()) { nodes.emplace_back(node); } @@ -241,7 +241,7 @@ void RRSpatialLookup::reserve_nodes(int layer, e_rr_type type, int num_nodes, e_side side) { - VTR_ASSERT_SAFE(4 == rr_node_indices_[(size_t)type].ndims()); + VTR_ASSERT_SAFE(4 == rr_node_indices_[type].ndims()); /* For non-IPIN/OPIN nodes, the side should always be the TOP side which follows the convention in find_node() API! */ if (type != e_rr_type::IPIN && type != e_rr_type::OPIN) { @@ -250,7 +250,7 @@ void RRSpatialLookup::reserve_nodes(int layer, resize_nodes(layer, x, y, type, side); - rr_node_indices_[(size_t)type][layer][x][y][side].reserve(num_nodes); + rr_node_indices_[type][layer][x][y][side].reserve(num_nodes); } void RRSpatialLookup::add_node(RRNodeId node, @@ -261,7 +261,7 @@ void RRSpatialLookup::add_node(RRNodeId node, int ptc, e_side side) { VTR_ASSERT(node.is_valid()); /* Must have a valid node id to be added */ - VTR_ASSERT_SAFE(4 == rr_node_indices_[(size_t)type].ndims()); + VTR_ASSERT_SAFE(4 == rr_node_indices_[type].ndims()); /* For non-IPIN/OPIN nodes, the side should always be the TOP side which follows the convention in find_node() API! */ if (type != e_rr_type::IPIN && type != e_rr_type::OPIN) { @@ -270,13 +270,13 @@ void RRSpatialLookup::add_node(RRNodeId node, resize_nodes(layer, x, y, type, side); - if (size_t(ptc) >= rr_node_indices_[(size_t)type][layer][x][y][side].size()) { + if (size_t(ptc) >= rr_node_indices_[type][layer][x][y][side].size()) { /* Deposit invalid ids to newly allocated elements while original elements are untouched */ - rr_node_indices_[(size_t)type][layer][x][y][side].resize(ptc + 1, RRNodeId::INVALID()); + rr_node_indices_[type][layer][x][y][side].resize(ptc + 1, RRNodeId::INVALID()); } /* Resize on demand finished; Register the node */ - rr_node_indices_[(size_t)type][layer][x][y][side][ptc] = node; + rr_node_indices_[type][layer][x][y][side][ptc] = node; } bool RRSpatialLookup::remove_node(RRNodeId node, @@ -287,7 +287,7 @@ bool RRSpatialLookup::remove_node(RRNodeId node, int ptc, e_side side) { VTR_ASSERT(node.is_valid()); - VTR_ASSERT_SAFE(4 == rr_node_indices_[(size_t)type].ndims()); + VTR_ASSERT_SAFE(4 == rr_node_indices_[type].ndims()); VTR_ASSERT_SAFE(layer >= 0); VTR_ASSERT_SAFE(x >= 0); VTR_ASSERT_SAFE(y >= 0); @@ -297,16 +297,16 @@ bool RRSpatialLookup::remove_node(RRNodeId node, // Check if the node given is in the spatial lookup at the given indices if ((size_t)type >= rr_node_indices_.size()) return false; - if ((size_t)layer >= rr_node_indices_[(size_t)type].dim_size(0)) return false; - if ((size_t)x >= rr_node_indices_[(size_t)type].dim_size(1)) return false; - if ((size_t)y >= rr_node_indices_[(size_t)type].dim_size(2)) return false; - if (side >= rr_node_indices_[(size_t)type].dim_size(3)) return false; - if ((size_t)ptc >= rr_node_indices_[(size_t)type][layer][x][y][side].size()) return false; - if (rr_node_indices_[(size_t)type][layer][x][y][side][ptc] != node) return false; + if ((size_t)layer >= rr_node_indices_[type].dim_size(0)) return false; + if ((size_t)x >= rr_node_indices_[type].dim_size(1)) return false; + if ((size_t)y >= rr_node_indices_[type].dim_size(2)) return false; + if (side >= rr_node_indices_[type].dim_size(3)) return false; + if ((size_t)ptc >= rr_node_indices_[type][layer][x][y][side].size()) return false; + if (rr_node_indices_[type][layer][x][y][side][ptc] != node) return false; // The node was in the spatial lookup; remove it. -1 corresponds to an invalid node id, // and so is treated as absent in the spatial lookup - rr_node_indices_[(size_t)type][layer][x][y][side][ptc] = RRNodeId::INVALID(); + rr_node_indices_[type][layer][x][y][side][ptc] = RRNodeId::INVALID(); return true; } @@ -317,7 +317,7 @@ void RRSpatialLookup::mirror_nodes(const int layer, e_side side) { VTR_ASSERT(e_rr_type::SOURCE == type); resize_nodes(layer, des_coord.x(), des_coord.y(), type, side); - rr_node_indices_[(size_t)type][layer][des_coord.x()][des_coord.y()][side] = rr_node_indices_[(size_t)type][layer][src_coord.x()][src_coord.y()][side]; + rr_node_indices_[type][layer][des_coord.x()][des_coord.y()][side] = rr_node_indices_[type][layer][src_coord.x()][src_coord.y()][side]; } void RRSpatialLookup::resize_nodes(int layer, @@ -334,14 +334,14 @@ void RRSpatialLookup::resize_nodes(int layer, VTR_ASSERT(y >= 0); VTR_ASSERT(layer >= 0); - if ((layer >= int(rr_node_indices_[(size_t)type].dim_size(0))) - || (x >= int(rr_node_indices_[(size_t)type].dim_size(1))) - || (y >= int(rr_node_indices_[(size_t)type].dim_size(2))) - || (size_t(side) >= rr_node_indices_[(size_t)type].dim_size(3))) { - rr_node_indices_[(size_t)type].resize({std::max(rr_node_indices_[(size_t)type].dim_size(0),size_t(layer)+1), - std::max(rr_node_indices_[(size_t)type].dim_size(1), size_t(x) + 1), - std::max(rr_node_indices_[(size_t)type].dim_size(2), size_t(y) + 1), - std::max(rr_node_indices_[(size_t)type].dim_size(3), size_t(side) + 1)}); + if ((layer >= int(rr_node_indices_[type].dim_size(0))) + || (x >= int(rr_node_indices_[type].dim_size(1))) + || (y >= int(rr_node_indices_[type].dim_size(2))) + || (size_t(side) >= rr_node_indices_[type].dim_size(3))) { + rr_node_indices_[type].resize({std::max(rr_node_indices_[type].dim_size(0),size_t(layer)+1), + std::max(rr_node_indices_[type].dim_size(1), size_t(x) + 1), + std::max(rr_node_indices_[type].dim_size(2), size_t(y) + 1), + std::max(rr_node_indices_[type].dim_size(3), size_t(side) + 1)}); } } From c2d7545b742b3c0814707feafb9a1af56213ac63 Mon Sep 17 00:00:00 2001 From: soheilshahrouz Date: Fri, 25 Apr 2025 13:48:10 -0400 Subject: [PATCH 08/12] add single argument constructor to vtr::array --- libs/libvtrutil/src/vtr_array.h | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/libs/libvtrutil/src/vtr_array.h b/libs/libvtrutil/src/vtr_array.h index d544c6a2c5b..4a8876570f0 100644 --- a/libs/libvtrutil/src/vtr_array.h +++ b/libs/libvtrutil/src/vtr_array.h @@ -51,6 +51,17 @@ class array { constexpr array(Args&&... args) : data_{ { std::forward(args)... } } {} + /** + * @brief Fill the array with a single value + * + * This constructor initializes all elements to the given value. + * + * @param value The value to assign to all elements + */ + constexpr explicit array(const V& value) { + data_.fill(value); + } + array() = default; From 0f8a76a811f36509b1bcd5cf63d986b2f48a6ffd Mon Sep 17 00:00:00 2001 From: soheilshahrouz Date: Fri, 25 Apr 2025 14:45:21 -0400 Subject: [PATCH 09/12] use vtr::array to index some arrays using e_rr_type --- libs/librrgraph/src/base/check_rr_graph.cpp | 40 +++++++++------------ libs/librrgraph/src/base/rr_node_types.h | 3 +- vpr/src/route/connection_router.cpp | 10 +++--- vpr/src/route/route.cpp | 13 +++---- vpr/src/route/router_stats.h | 23 ++++++------ 5 files changed, 42 insertions(+), 47 deletions(-) diff --git a/libs/librrgraph/src/base/check_rr_graph.cpp b/libs/librrgraph/src/base/check_rr_graph.cpp index 59dc5638d7a..027806f6cc2 100644 --- a/libs/librrgraph/src/base/check_rr_graph.cpp +++ b/libs/librrgraph/src/base/check_rr_graph.cpp @@ -230,7 +230,7 @@ void check_rr_graph(const RRGraphView& rr_graph, * now I check that everything is reachable. */ bool is_fringe_warning_sent = false; - for (const RRNodeId& rr_node : rr_graph.nodes()) { + for (const RRNodeId rr_node : rr_graph.nodes()) { size_t inode = (size_t)rr_node; e_rr_type rr_type = rr_graph.node_type(rr_node); int ptc_num = rr_graph.node_ptc_num(rr_node); @@ -263,7 +263,7 @@ void check_rr_graph(const RRGraphView& rr_graph, } } - const auto& node = rr_graph.rr_nodes()[inode]; + const t_rr_node& node = rr_graph.rr_nodes()[inode]; bool is_fringe = ((rr_graph.node_xlow(rr_node) == 1) || (rr_graph.node_ylow(rr_node) == 1) @@ -312,18 +312,14 @@ void check_rr_graph(const RRGraphView& rr_graph, static bool rr_node_is_global_clb_ipin(const RRGraphView& rr_graph, const DeviceGrid& grid, RRNodeId inode) { /* Returns true if inode refers to a global CLB input pin node. */ - - int ipin; - t_physical_tile_type_ptr type; - - type = grid.get_physical_type({rr_graph.node_xlow(inode), - rr_graph.node_ylow(inode), - rr_graph.node_layer(inode)}); + t_physical_tile_type_ptr type = grid.get_physical_type({rr_graph.node_xlow(inode), + rr_graph.node_ylow(inode), + rr_graph.node_layer(inode)}); if (rr_graph.node_type(inode) != e_rr_type::IPIN) return (false); - ipin = rr_graph.node_pin_num(inode); + int ipin = rr_graph.node_pin_num(inode); return type->is_ignored_pin[ipin]; } @@ -341,24 +337,20 @@ void check_rr_node(const RRGraphView& rr_graph, //Make sure over-flow doesn't happen VTR_ASSERT(inode >= 0); - int xlow, ylow, xhigh, yhigh, layer_num, ptc_num, capacity; - e_rr_type rr_type; - t_physical_tile_type_ptr type; int nodes_per_chan, tracks_per_node; - RRIndexedDataId cost_index; float C, R; RRNodeId rr_node = RRNodeId(inode); - rr_type = rr_graph.node_type(rr_node); - xlow = rr_graph.node_xlow(rr_node); - xhigh = rr_graph.node_xhigh(rr_node); - ylow = rr_graph.node_ylow(rr_node); - yhigh = rr_graph.node_yhigh(rr_node); - layer_num = rr_graph.node_layer(rr_node); - ptc_num = rr_graph.node_ptc_num(rr_node); - capacity = rr_graph.node_capacity(rr_node); - cost_index = rr_graph.node_cost_index(rr_node); - type = nullptr; + e_rr_type rr_type = rr_graph.node_type(rr_node); + int xlow = rr_graph.node_xlow(rr_node); + int xhigh = rr_graph.node_xhigh(rr_node); + int ylow = rr_graph.node_ylow(rr_node); + int yhigh = rr_graph.node_yhigh(rr_node); + int layer_num = rr_graph.node_layer(rr_node); + int ptc_num = rr_graph.node_ptc_num(rr_node); + int capacity = rr_graph.node_capacity(rr_node); + RRIndexedDataId cost_index = rr_graph.node_cost_index(rr_node); + t_physical_tile_type_ptr type = nullptr; if (xlow > xhigh || ylow > yhigh) { VPR_ERROR(VPR_ERROR_ROUTE, diff --git a/libs/librrgraph/src/base/rr_node_types.h b/libs/librrgraph/src/base/rr_node_types.h index a03c8aa304a..a30cb16e481 100644 --- a/libs/librrgraph/src/base/rr_node_types.h +++ b/libs/librrgraph/src/base/rr_node_types.h @@ -32,10 +32,11 @@ enum class e_rr_type : unsigned char { NUM_RR_TYPES }; +/// Used to iterate for different e_rr_type values in range-based for loops. constexpr std::array RR_TYPES = {{e_rr_type::SOURCE, e_rr_type::SINK, e_rr_type::IPIN, e_rr_type::OPIN, e_rr_type::CHANX, e_rr_type::CHANY}}; -vtr::array rr_node_typename {"SOURCE", "SINK", "IPIN", "OPIN", "CHANX", "CHANY"}; +constexpr vtr::array rr_node_typename {"SOURCE", "SINK", "IPIN", "OPIN", "CHANX", "CHANY"}; /** * @enum Direction diff --git a/vpr/src/route/connection_router.cpp b/vpr/src/route/connection_router.cpp index 5e50fa25fb8..4e2672e9c97 100644 --- a/vpr/src/route/connection_router.cpp +++ b/vpr/src/route/connection_router.cpp @@ -911,7 +911,7 @@ void ConnectionRouter::add_route_tree_node_to_heap( rr_graph_); if constexpr (VTR_ENABLE_DEBUG_LOGGING_CONST_EXPR) { - router_stats_->rt_node_pushes[(size_t)rr_graph_->node_type(inode)]++; + router_stats_->rt_node_pushes[rr_graph_->node_type(inode)]++; } } @@ -1067,18 +1067,18 @@ static inline void update_router_stats(RouterStats* router_stats, if (is_inter_cluster_node(*rr_graph, rr_node_id)) { if (is_push) { router_stats->inter_cluster_node_pushes++; - router_stats->inter_cluster_node_type_cnt_pushes[(size_t)node_type]++; + router_stats->inter_cluster_node_type_cnt_pushes[node_type]++; } else { router_stats->inter_cluster_node_pops++; - router_stats->inter_cluster_node_type_cnt_pops[(size_t)node_type]++; + router_stats->inter_cluster_node_type_cnt_pops[node_type]++; } } else { if (is_push) { router_stats->intra_cluster_node_pushes++; - router_stats->intra_cluster_node_type_cnt_pushes[(size_t)node_type]++; + router_stats->intra_cluster_node_type_cnt_pushes[node_type]++; } else { router_stats->intra_cluster_node_pops++; - router_stats->intra_cluster_node_type_cnt_pops[(size_t)node_type]++; + router_stats->intra_cluster_node_type_cnt_pops[node_type]++; } } } diff --git a/vpr/src/route/route.cpp b/vpr/src/route/route.cpp index fc240344163..cad0cf1b7aa 100644 --- a/vpr/src/route/route.cpp +++ b/vpr/src/route/route.cpp @@ -618,12 +618,13 @@ bool route(const Netlist<>& net_list, "total_internal_heap_pushes: %zu total_internal_heap_pops: %zu total_external_heap_pushes: %zu total_external_heap_pops: %zu ", router_stats.intra_cluster_node_pushes, router_stats.intra_cluster_node_pops, router_stats.inter_cluster_node_pushes, router_stats.inter_cluster_node_pops); - for (int node_type_idx = 0; node_type_idx < (int)e_rr_type::NUM_RR_TYPES; node_type_idx++) { - VTR_LOG("total_external_%s_pushes: %zu ", rr_node_typename[node_type_idx], router_stats.inter_cluster_node_type_cnt_pushes[node_type_idx]); - VTR_LOG("total_external_%s_pops: %zu ", rr_node_typename[node_type_idx], router_stats.inter_cluster_node_type_cnt_pops[node_type_idx]); - VTR_LOG("total_internal_%s_pushes: %zu ", rr_node_typename[node_type_idx], router_stats.intra_cluster_node_type_cnt_pushes[node_type_idx]); - VTR_LOG("total_internal_%s_pops: %zu ", rr_node_typename[node_type_idx], router_stats.intra_cluster_node_type_cnt_pops[node_type_idx]); - VTR_LOG("rt_node_%s_pushes: %zu ", rr_node_typename[node_type_idx], router_stats.rt_node_pushes[node_type_idx]); + + for (e_rr_type rr_type : RR_TYPES) { + VTR_LOG("total_external_%s_pushes: %zu ", rr_node_typename[rr_type], router_stats.inter_cluster_node_type_cnt_pushes[rr_type]); + VTR_LOG("total_external_%s_pops: %zu ", rr_node_typename[rr_type], router_stats.inter_cluster_node_type_cnt_pops[rr_type]); + VTR_LOG("total_internal_%s_pushes: %zu ", rr_node_typename[rr_type], router_stats.intra_cluster_node_type_cnt_pushes[rr_type]); + VTR_LOG("total_internal_%s_pops: %zu ", rr_node_typename[rr_type], router_stats.intra_cluster_node_type_cnt_pops[rr_type]); + VTR_LOG("rt_node_%s_pushes: %zu ", rr_node_typename[rr_type], router_stats.rt_node_pushes[rr_type]); } } VTR_LOG("\n"); diff --git a/vpr/src/route/router_stats.h b/vpr/src/route/router_stats.h index 01b9ee03ee0..32339a98192 100644 --- a/vpr/src/route/router_stats.h +++ b/vpr/src/route/router_stats.h @@ -4,6 +4,7 @@ #include "rr_graph_fwd.h" #include "rr_node_types.h" #include "vtr_assert.h" +#include "vtr_array.h" // This struct instructs the router on how to route the given connection struct ConnectionParameters { @@ -38,13 +39,13 @@ struct RouterStats { size_t inter_cluster_node_pops = 0; size_t intra_cluster_node_pushes = 0; size_t intra_cluster_node_pops = 0; - size_t inter_cluster_node_type_cnt_pushes[(size_t)e_rr_type::NUM_RR_TYPES] = {0}; - size_t inter_cluster_node_type_cnt_pops[(size_t)e_rr_type::NUM_RR_TYPES] = {0}; - size_t intra_cluster_node_type_cnt_pushes[(size_t)e_rr_type::NUM_RR_TYPES] = {0}; - size_t intra_cluster_node_type_cnt_pops[(size_t)e_rr_type::NUM_RR_TYPES] = {0}; + vtr::array inter_cluster_node_type_cnt_pushes{0}; + vtr::array inter_cluster_node_type_cnt_pops{0}; + vtr::array intra_cluster_node_type_cnt_pushes{0}; + vtr::array intra_cluster_node_type_cnt_pops{0}; // For debugging purposes - size_t rt_node_pushes[(size_t)e_rr_type::NUM_RR_TYPES] = {0}; + vtr::array rt_node_pushes{0}; /** Add rhs's stats to mine */ void combine(RouterStats& rhs) { @@ -56,12 +57,12 @@ struct RouterStats { heap_pops += rhs.heap_pops; inter_cluster_node_pops += rhs.inter_cluster_node_pops; intra_cluster_node_pops += rhs.intra_cluster_node_pops; - for (size_t node_type_idx = 0; node_type_idx < (size_t)e_rr_type::NUM_RR_TYPES; node_type_idx++) { - inter_cluster_node_type_cnt_pushes[node_type_idx] += rhs.inter_cluster_node_type_cnt_pushes[node_type_idx]; - inter_cluster_node_type_cnt_pops[node_type_idx] += rhs.inter_cluster_node_type_cnt_pops[node_type_idx]; - intra_cluster_node_type_cnt_pushes[node_type_idx] += rhs.intra_cluster_node_type_cnt_pushes[node_type_idx]; - intra_cluster_node_type_cnt_pops[node_type_idx] += rhs.intra_cluster_node_type_cnt_pops[node_type_idx]; - rt_node_pushes[node_type_idx] += rhs.rt_node_pushes[node_type_idx]; + for (e_rr_type rr_type : RR_TYPES) { + inter_cluster_node_type_cnt_pushes[rr_type] += rhs.inter_cluster_node_type_cnt_pushes[rr_type]; + inter_cluster_node_type_cnt_pops[rr_type] += rhs.inter_cluster_node_type_cnt_pops[rr_type]; + intra_cluster_node_type_cnt_pushes[rr_type] += rhs.intra_cluster_node_type_cnt_pushes[rr_type]; + intra_cluster_node_type_cnt_pops[rr_type] += rhs.intra_cluster_node_type_cnt_pops[rr_type]; + rt_node_pushes[rr_type] += rhs.rt_node_pushes[rr_type]; } } }; From a126801420a4933bed0840b8a49eb3ae2344d381 Mon Sep 17 00:00:00 2001 From: soheilshahrouz Date: Fri, 25 Apr 2025 14:48:21 -0400 Subject: [PATCH 10/12] make format --- libs/libvtrutil/src/vtr_array.h | 16 ++-------------- 1 file changed, 2 insertions(+), 14 deletions(-) diff --git a/libs/libvtrutil/src/vtr_array.h b/libs/libvtrutil/src/vtr_array.h index 4a8876570f0..7866bd07c41 100644 --- a/libs/libvtrutil/src/vtr_array.h +++ b/libs/libvtrutil/src/vtr_array.h @@ -25,16 +25,6 @@ class array { using const_iterator = typename std::array::const_iterator; /** - * @brief Construct a vtr::array from a list of values. - * - * This constructor allows direct brace-initialization of the array: - * @code - * vtr::array arr{1, 2, 3}; - * @endcode - * - * @tparam Args Types of the values being passed. All must be convertible to V. - * @param args The values to initialize the array with. Must match the array size. - *//** * @brief Construct a vtr::array from a list of values. * * This constructor allows direct brace-initialization of the array: @@ -46,10 +36,9 @@ class array { * @param args The values to initialize the array with. Must match the array size. */ template...>>> + typename = std::enable_if_t...>>> constexpr array(Args&&... args) - : data_{ { std::forward(args)... } } {} + : data_{{std::forward(args)...}} {} /** * @brief Fill the array with a single value @@ -64,7 +53,6 @@ class array { array() = default; - ///@brief Access element with strong ID reference operator[](K id) { return data_[static_cast(id)]; From 27fbe983aa2c345753cb89711a5792f054c78a22 Mon Sep 17 00:00:00 2001 From: soheilshahrouz Date: Fri, 25 Apr 2025 15:58:11 -0400 Subject: [PATCH 11/12] avoid using e_rr_type and casting it in place_macro --- vpr/src/place/place_macro.cpp | 34 +++++++++++++++++----------------- vpr/src/place/place_macro.h | 6 +++--- 2 files changed, 20 insertions(+), 20 deletions(-) diff --git a/vpr/src/place/place_macro.cpp b/vpr/src/place/place_macro.cpp index a52865bf918..b4ddc01c247 100644 --- a/vpr/src/place/place_macro.cpp +++ b/vpr/src/place/place_macro.cpp @@ -59,7 +59,7 @@ static bool try_combine_macros(std::vector>& pl_macr * they are, mark down the pins from start_pin_index to end_pin_index, inclusive. * * Otherwise, mark down all the pins in that port. */ static void mark_direct_of_ports(int idirect, - int direct_type, + e_pin_type direct_type, std::string_view pb_type_name, std::string_view port_name, int end_pin_index, @@ -67,7 +67,7 @@ static void mark_direct_of_ports(int idirect, std::string_view src_string, int line, std::vector>& idirect_from_blk_pin, - std::vector>& direct_type_from_blk_pin, + std::vector>& direct_type_from_blk_pin, const std::vector& physical_tile_types, const PortPinToBlockPinConverter& port_pin_to_block_pin); @@ -82,8 +82,8 @@ static void mark_direct_of_pins(int start_pin_index, int iport, std::vector>& idirect_from_blk_pin, int idirect, - std::vector>& direct_type_from_blk_pin, - int direct_type, + std::vector>& direct_type_from_blk_pin, + e_pin_type direct_type, int line, std::string_view src_string, const std::vector& physical_tile_types, @@ -200,7 +200,7 @@ int PlaceMacros::find_all_the_macro_(const ClusteredNetlist& clb_nlist, ClusterNetId to_net_id = clb_nlist.block_net(blk_id, to_iblk_pin); int to_idirect = idirect_from_blk_pin_[physical_tile->index][to_physical_pin]; - int to_src_or_sink = direct_type_from_blk_pin_[physical_tile->index][to_physical_pin]; + e_pin_type to_src_or_sink = direct_type_from_blk_pin_[physical_tile->index][to_physical_pin]; // Identify potential macro head blocks (i.e. start of a macro) // @@ -211,20 +211,20 @@ int PlaceMacros::find_all_the_macro_(const ClusteredNetlist& clb_nlist, // Note that the restriction that constant nets are not driven from another direct ensures that // blocks in the middle of a chain with internal constant signals are not detected as potential // head blocks. - if (to_src_or_sink == (int)e_rr_type::SINK && to_idirect != OPEN + if (to_src_or_sink == RECEIVER && to_idirect != OPEN && (to_net_id == ClusterNetId::INVALID() || (is_constant_clb_net(to_net_id, atom_lookup, atom_nlist) && !net_is_driven_by_direct_(to_net_id, clb_nlist)))) { for (int from_iblk_pin = 0; from_iblk_pin < num_blk_pins; from_iblk_pin++) { int from_physical_pin = get_physical_pin(physical_tile, logical_block, from_iblk_pin); ClusterNetId from_net_id = clb_nlist.block_net(blk_id, from_iblk_pin); int from_idirect = idirect_from_blk_pin_[physical_tile->index][from_physical_pin]; - int from_src_or_sink = direct_type_from_blk_pin_[physical_tile->index][from_physical_pin]; + e_pin_type from_src_or_sink = direct_type_from_blk_pin_[physical_tile->index][from_physical_pin]; // Confirm whether this is a head macro // // The output SOURCE (from_pin) of a true head macro will: // * drive another block with the same direct connection - if (from_src_or_sink == (int)e_rr_type::SOURCE && to_idirect == from_idirect && from_net_id != ClusterNetId::INVALID()) { + if (from_src_or_sink == DRIVER && to_idirect == from_idirect && from_net_id != ClusterNetId::INVALID()) { // Mark down that this is the first block in the macro pl_macro_member_blk_num_of_this_blk[0] = blk_id; pl_macro_idirect[num_macro] = to_idirect; @@ -249,7 +249,7 @@ int PlaceMacros::find_all_the_macro_(const ClusteredNetlist& clb_nlist, // Assume that the from_iblk_pin index is the same for the next block VTR_ASSERT(idirect_from_blk_pin_[physical_tile->index][from_physical_pin] == from_idirect - && direct_type_from_blk_pin_[physical_tile->index][from_physical_pin] == (int)e_rr_type::SOURCE); + && direct_type_from_blk_pin_[physical_tile->index][from_physical_pin] == DRIVER); next_net_id = clb_nlist.block_net(next_blk_id, from_iblk_pin); // Mark down this block as a member of the macro @@ -448,7 +448,7 @@ void PlaceMacros::alloc_and_load_idirect_from_blk_pin_(const std::vector>& idirect_from_blk_pin, - std::vector>& direct_type_from_blk_pin, + std::vector>& direct_type_from_blk_pin, const std::vector& physical_tile_types, const PortPinToBlockPinConverter& port_pin_to_block_pin) { /* Go through all the ports in all the blocks to find the port that has the same * @@ -536,8 +536,8 @@ static void mark_direct_of_pins(int start_pin_index, int iport, std::vector>& idirect_from_blk_pin, int idirect, - std::vector>& direct_type_from_blk_pin, - int direct_type, + std::vector>& direct_type_from_blk_pin, + e_pin_type direct_type, int line, std::string_view src_string, const std::vector& physical_tile_types, @@ -630,10 +630,10 @@ void PlaceMacros::write_place_macros_(std::string filename, int itype = type.index; for (int ipin = 0; ipin < type.num_pins; ++ipin) { if (idirect_from_blk_pin_[itype][ipin] != OPEN) { - if (direct_type_from_blk_pin_[itype][ipin] == (int)e_rr_type::SOURCE) { + if (direct_type_from_blk_pin_[itype][ipin] == DRIVER) { fprintf(f, "%-9s %-9d true SOURCE \n", type.name.c_str(), ipin); } else { - VTR_ASSERT(direct_type_from_blk_pin_[itype][ipin] == (int)e_rr_type::SINK); + VTR_ASSERT(direct_type_from_blk_pin_[itype][ipin] == RECEIVER); fprintf(f, "%-9s %-9d true SINK \n", type.name.c_str(), ipin); } } else { diff --git a/vpr/src/place/place_macro.h b/vpr/src/place/place_macro.h index 0b5988c7c61..188fbbdab46 100644 --- a/vpr/src/place/place_macro.h +++ b/vpr/src/place/place_macro.h @@ -208,12 +208,12 @@ class PlaceMacros { std::vector> idirect_from_blk_pin_; /** - * @brief This array stores the value SOURCE if the pin is the from_pin, - * SINK if the pin is the to_pin in the direct connection as specified in the arch file, + * @brief This array stores the value DRIVER if the pin is the from_pin, + * RECEIVER if the pin is the to_pin in the direct connection as specified in the arch file, * OPEN (-1) is stored for pins that could not be part of a direct chain connection. * [0...device_ctx.num_block_types-1][0...num_pins-1] */ - std::vector> direct_type_from_blk_pin_; + std::vector> direct_type_from_blk_pin_; /** * @brief Maps a blk_num to the corresponding macro index. From 2322aa63d7c18842c07f21ae461f35ca8fc6630f Mon Sep 17 00:00:00 2001 From: soheilshahrouz Date: Sun, 27 Apr 2025 16:31:02 -0400 Subject: [PATCH 12/12] add vtr::array to docs --- doc/src/api/vtrutil/containers.rst | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/doc/src/api/vtrutil/containers.rst b/doc/src/api/vtrutil/containers.rst index 879e01a4ca2..b0eb95ec2cc 100644 --- a/doc/src/api/vtrutil/containers.rst +++ b/doc/src/api/vtrutil/containers.rst @@ -8,6 +8,12 @@ vtr_vector :project: vtr :sections: briefdescription detaileddescription innernamespace innerclass public-func typedef func +vtr_array +---------- +.. doxygenfile:: vtr_array.h + :project: vtr + :sections: briefdescription detaileddescription innernamespace innerclass public-func typedef func + vtr_small_vector ---------------- .. doxygenclass:: vtr::small_vector