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Fix spinner, update sys (MiSTer-devel#8)
* Fix spinner output, update sys * Release 20211127
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8 files changed

+693
-501
lines changed

8 files changed

+693
-501
lines changed

releases/InputTest_20211127.rbf

2.5 MB
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rtl/rom.hex

Lines changed: 475 additions & 475 deletions
Large diffs are not rendered by default.

src/inputtester.c

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -561,8 +561,8 @@ void inputtester_advanced()
561561
px_last[inputindex] = px;
562562

563563
// Draw spinner inputs (only update when update clock changes)
564-
bool sx_toggle = CHECK_BIT(spinner[(inputindex * 8) + 1], 0);
565-
signed char sx = spinner[(inputindex * 8)];
564+
bool sx_toggle = CHECK_BIT(spinner[(inputindex * 2) + 1], 0);
565+
signed char sx = spinner[(inputindex * 2)];
566566
if (sx_toggle != sx_toggle_last[inputindex])
567567
{
568568
sx_pos[inputindex] += sx;

sys/arcade_video.v

Lines changed: 39 additions & 20 deletions
Original file line numberDiff line numberDiff line change
@@ -174,15 +174,16 @@ module screen_rotate
174174

175175
input rotate_ccw,
176176
input no_rotate,
177+
input flip,
177178

178-
output FB_EN,
179-
output [4:0] FB_FORMAT,
180-
output [11:0] FB_WIDTH,
181-
output [11:0] FB_HEIGHT,
182-
output [31:0] FB_BASE,
183-
output [13:0] FB_STRIDE,
184-
input FB_VBL,
185-
input FB_LL,
179+
output FB_EN,
180+
output [4:0] FB_FORMAT,
181+
output reg [11:0] FB_WIDTH,
182+
output reg [11:0] FB_HEIGHT,
183+
output [31:0] FB_BASE,
184+
output [13:0] FB_STRIDE,
185+
input FB_VBL,
186+
input FB_LL,
186187

187188
output DDRAM_CLK,
188189
input DDRAM_BUSY,
@@ -196,6 +197,8 @@ module screen_rotate
196197

197198
parameter MEM_BASE = 7'b0010010; // buffer at 0x24000000, 3x8MB
198199

200+
reg do_flip;
201+
199202
assign DDRAM_CLK = CLK_VIDEO;
200203
assign DDRAM_BURSTCNT = 1;
201204
assign DDRAM_ADDR = {MEM_BASE, i_fb, ram_addr[22:3]};
@@ -207,8 +210,6 @@ assign DDRAM_RD = 0;
207210
assign FB_EN = fb_en[2];
208211
assign FB_FORMAT = 5'b00110;
209212
assign FB_BASE = {MEM_BASE,o_fb,23'd0};
210-
assign FB_WIDTH = vsz;
211-
assign FB_HEIGHT = hsz;
212213
assign FB_STRIDE = stride;
213214

214215
function [1:0] buf_next;
@@ -220,6 +221,17 @@ function [1:0] buf_next;
220221
end
221222
endfunction
222223

224+
always @(posedge CLK_VIDEO) begin
225+
do_flip <= no_rotate && flip;
226+
if( do_flip ) begin
227+
FB_WIDTH <= hsz;
228+
FB_HEIGHT <= vsz;
229+
end else begin
230+
FB_WIDTH <= vsz;
231+
FB_HEIGHT <= hsz;
232+
end
233+
end
234+
223235
reg [1:0] i_fb,o_fb;
224236
always @(posedge CLK_VIDEO) begin
225237
reg old_vbl,old_vs;
@@ -251,20 +263,23 @@ always @(posedge CLK_VIDEO) begin
251263
if(CE_PIXEL) begin
252264
old_vs <= VGA_VS;
253265
old_de <= VGA_DE;
254-
266+
255267
hcnt <= hcnt + 1'd1;
256268
if(~old_de & VGA_DE) begin
257269
hcnt <= 1;
258270
vcnt <= vcnt + 1'd1;
259271
end
260-
if(old_de & ~VGA_DE) hsz <= hcnt;
272+
if(old_de & ~VGA_DE) begin
273+
hsz <= hcnt;
274+
if( do_flip ) bwidth <= hcnt + 2'd3;
275+
end
261276
if(~old_vs & VGA_VS) begin
262277
vsz <= vcnt;
263-
bwidth <= vcnt + 2'd3;
278+
if( !do_flip ) bwidth <= vcnt + 2'd3;
264279
vcnt <= 0;
265-
fb_en <= {fb_en[1:0], ~no_rotate};
280+
fb_en <= {fb_en[1:0], ~no_rotate | flip};
266281
end
267-
if(old_vs & ~VGA_VS) bufsize <= hsz * stride;
282+
if(old_vs & ~VGA_VS) bufsize <= (do_flip ? vsz : hsz ) * stride;
268283
end
269284
end
270285

@@ -278,21 +293,25 @@ always @(posedge CLK_VIDEO) begin
278293
reg old_vs, old_de;
279294

280295
ram_wr <= 0;
281-
if(CE_PIXEL) begin
296+
if(CE_PIXEL && FB_EN) begin
282297
old_vs <= VGA_VS;
283298
old_de <= VGA_DE;
284299

285300
if(~old_vs & VGA_VS) begin
286-
next_addr <= rotate_ccw ? (bufsize - stride) : {vsz-1'd1, 2'b00};
301+
next_addr <=
302+
do_flip ? bufsize-3'd4 :
303+
rotate_ccw ? (bufsize - stride) : {vsz-1'd1, 2'b00};
287304
hcnt <= rotate_ccw ? 3'd4 : {vsz-2'd2, 2'b00};
288305
end
289306
if(VGA_DE) begin
290307
ram_wr <= 1;
291-
ram_data <= {VGA_B,VGA_G,VGA_R};
308+
ram_data <= {8'd0,VGA_B,VGA_G,VGA_R};
292309
ram_addr <= next_addr;
293-
next_addr <= rotate_ccw ? (next_addr - stride) : (next_addr + stride);
310+
next_addr <=
311+
do_flip ? next_addr-3'd4 :
312+
rotate_ccw ? (next_addr - stride) : (next_addr + stride);
294313
end
295-
if(old_de & ~VGA_DE) begin
314+
if(old_de & ~VGA_DE & ~do_flip) begin
296315
next_addr <= rotate_ccw ? (bufsize - stride + hcnt) : hcnt;
297316
hcnt <= rotate_ccw ? (hcnt + 3'd4) : (hcnt - 3'd4);
298317
end

sys/hps_io.sv

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -322,6 +322,7 @@ always@(posedge clk_sys) begin : uio_block
322322
'h36: begin io_dout <= info_n; info_n <= 0; end
323323
'h39: io_dout <= 1;
324324
'h3C: if(upload_req) begin io_dout <= 1; upload_req <= 0; end
325+
'h3E: io_dout <= 1; // shadow mask
325326
endcase
326327

327328
sd_buff_addr <= 0;

sys/shadowmask.sv

Lines changed: 144 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,144 @@
1+
module shadowmask
2+
(
3+
input clk,
4+
input clk_sys,
5+
6+
input cmd_wr,
7+
input [15:0] cmd_in,
8+
9+
input [23:0] din,
10+
input hs_in,vs_in,
11+
input de_in,
12+
13+
output reg [23:0] dout,
14+
output reg hs_out,vs_out,
15+
output reg de_out
16+
);
17+
18+
19+
//These are unused right now
20+
parameter MaxPatternWidth = 8;
21+
parameter MaxPatternHeight = 4;
22+
23+
reg [3:0] hcount;
24+
reg [3:0] vcount;
25+
26+
reg [3:0] hmax;
27+
reg [3:0] vmax;
28+
reg [3:0] hmax2;
29+
reg [3:0] vmax2;
30+
31+
reg [2:0] hindex;
32+
reg [2:0] vindex;
33+
reg [2:0] hindex2;
34+
reg [2:0] vindex2;
35+
36+
reg mask_2x;
37+
reg mask_rotate;
38+
reg mask_enable;
39+
40+
always @(posedge clk) begin
41+
42+
reg old_hs, old_vs;
43+
old_hs <= hs_in;
44+
old_vs <= vs_in;
45+
hcount <= hcount + 4'b1;
46+
47+
// hcount and vcount counts pixel rows and columns
48+
// hindex and vindex half the value of the counters for double size patterns
49+
// hindex2, vindex2 swap the h and v counters for drawing rotated masks
50+
hindex <= mask_2x ? hcount[3:1] : hcount[2:0];
51+
vindex <= mask_2x ? vcount[3:1] : vcount[2:0];
52+
hindex2 <= mask_rotate ? vindex : hindex;
53+
vindex2 <= mask_rotate ? hindex : vindex;
54+
55+
// hmax and vmax store these sizes
56+
// hmax2 and vmax2 swap the values to handle rotation
57+
hmax2 <= mask_rotate ? ( vmax << mask_2x ) : ( hmax << mask_2x );
58+
vmax2 <= mask_rotate ? ( hmax << mask_2x ) : ( vmax << mask_2x );
59+
60+
if((old_vs && ~vs_in)) vcount <= 4'b0;
61+
if(old_hs && ~hs_in) begin
62+
vcount <= vcount + 4'b1;
63+
hcount <= 4'b0;
64+
if (vcount == (vmax2 + mask_2x)) vcount <= 4'b0;
65+
end
66+
67+
if (hcount == (hmax2 + mask_2x)) hcount <= 4'b0;
68+
end
69+
70+
wire [7:0] r,g,b;
71+
assign {r,g,b} = din;
72+
73+
reg [23:0] d;
74+
75+
// Each element of mask_lut is 3 bits. 1 each for R,G,B
76+
// Red is 100 = 4
77+
// Green is 010 = 2
78+
// Blue is 001 = 1
79+
// Magenta is 101 = 5
80+
// Gray is 000 = 0
81+
// White is 111 = 7
82+
// Yellow is 110 = 6
83+
// Cyan is 011 = 3
84+
85+
// So the Pattern
86+
// r,r,g,g,b,b
87+
// r,r,g,g,b,b
88+
// g,b,b,r,r,g
89+
// g,b,b,r,r,g
90+
//
91+
// is
92+
// 4,4,2,2,1,1,5,3
93+
// 4,4,2,2,1,1,0,0,
94+
// 2,1,1,4,4,2,0,0
95+
// 2,1,1,4,4,2,0,0
96+
//
97+
// note that all rows are padded to 8 numbers although every pattern is 6 pixels wide
98+
// The last two entries of the top row "5,3" are the size of the mask. In this case
99+
// "5,3," means this pattern is 6x4 pixels.
100+
101+
102+
reg [2:0] mask_lut[64];
103+
104+
always @(posedge clk) begin
105+
106+
reg rbit, gbit, bbit;
107+
reg [23:0] dout1, dout2;
108+
reg de1,de2,vs1,vs2,hs1,hs2;
109+
reg [8:0] r2, g2, b2; //9 bits to handle overflow when we add to bright colors.
110+
reg [7:0] r3, g3, b3; //These are the final colors.
111+
112+
{rbit,gbit, bbit} = mask_lut[{vindex2[2:0],hindex2[2:0]}];
113+
114+
// I add 12.5% of the Color value and then subrtact 50% if the mask should be dark
115+
r2 <= r + {3'b0, r[7:3]} - (rbit ? 9'b0 : {2'b0, r[7:1]});
116+
g2 <= g + {3'b0, g[7:3]} - (gbit ? 9'b0 : {2'b0, g[7:1]});
117+
b2 <= b + {3'b0, b[7:3]} - (bbit ? 9'b0 : {2'b0, b[7:1]});
118+
119+
// Because a pixel can be brighter than 255 we have to clamp the value to 255.
120+
r3 <= r2[8] ? 8'd255 : r2[7:0];
121+
g3 <= g2[8] ? 8'd255 : g2[7:0];
122+
b3 <= b2[8] ? 8'd255 : b2[7:0];
123+
124+
// I don't know how to keep the color aligned with the sync to avoid a shift.
125+
// This code is left over from the original hdmi scanlines code.
126+
dout <= ~mask_enable ? {r,g,b} : {r3 ,g3, b3};
127+
vs_out <= mask_enable ? vs2 : vs_in; vs2 <= vs1; vs1 <= vs_in;
128+
hs_out <= mask_enable ? hs2 : hs_in; hs2 <= hs1; hs1 <= hs_in;
129+
de_out <= mask_enable ? de2 : de_in; de2 <= de1; de1 <= de_in;
130+
end
131+
132+
// 000_000_000_000_000_
133+
always @(posedge clk_sys) begin
134+
if (cmd_wr) begin
135+
case(cmd_in[15:13])
136+
3'b000: {mask_rotate, mask_2x, mask_enable} <= cmd_in[2:0];
137+
3'b001: vmax <= cmd_in[3:0];
138+
3'b010: hmax <= cmd_in[3:0];
139+
3'b011: mask_lut[cmd_in[9:4]] <= cmd_in[2:0];
140+
endcase
141+
end
142+
end
143+
144+
endmodule

sys/sys.qip

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -7,6 +7,7 @@ set_global_assignment -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) m
77
set_global_assignment -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) hq2x.sv ]
88
set_global_assignment -name VERILOG_FILE [file join $::quartus(qip_path) scandoubler.v ]
99
set_global_assignment -name VERILOG_FILE [file join $::quartus(qip_path) scanlines.v ]
10+
set_global_assignment -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) shadowmask.sv ]
1011
set_global_assignment -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) video_cleaner.sv ]
1112
set_global_assignment -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) gamma_corr.sv ]
1213
set_global_assignment -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) video_mixer.sv ]

sys/sys_top.v

Lines changed: 31 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -335,6 +335,7 @@ always@(posedge clk_sys) begin
335335

336336
old_strobe <= io_strobe;
337337
coef_wr <= 0;
338+
shadowmask_wr <= 0;
338339

339340
if(~io_uio) begin
340341
has_cmd <= 0;
@@ -452,6 +453,7 @@ always@(posedge clk_sys) begin
452453
3: arc2y <= io_din[12:0];
453454
endcase
454455
end
456+
if(cmd == 'h3E) {shadowmask_wr,shadowmask_data} <= {1'b1, io_din};
455457
end
456458
end
457459

@@ -1079,6 +1081,31 @@ scanlines #(1) HDMI_scanlines
10791081
.de_out(hdmi_de_sl)
10801082
);
10811083

1084+
wire [23:0] hdmi_data_mask;
1085+
wire hdmi_de_mask, hdmi_vs_mask, hdmi_hs_mask;
1086+
1087+
reg [15:0] shadowmask_data;
1088+
reg shadowmask_wr = 0;
1089+
1090+
shadowmask HDMI_shadowmask
1091+
(
1092+
.clk(clk_hdmi),
1093+
.clk_sys(clk_sys),
1094+
1095+
.cmd_wr(shadowmask_wr),
1096+
.cmd_in(shadowmask_data),
1097+
1098+
.din(hdmi_data_sl),
1099+
.hs_in(hdmi_hs_sl),
1100+
.vs_in(hdmi_vs_sl),
1101+
.de_in(hdmi_de_sl),
1102+
1103+
.dout(hdmi_data_mask),
1104+
.hs_out(hdmi_hs_mask),
1105+
.vs_out(hdmi_vs_mask),
1106+
.de_out(hdmi_de_mask)
1107+
);
1108+
10821109
wire [23:0] hdmi_data_osd;
10831110
wire hdmi_de_osd, hdmi_vs_osd, hdmi_hs_osd;
10841111

@@ -1091,10 +1118,10 @@ osd hdmi_osd
10911118
.io_din(io_din),
10921119

10931120
.clk_video(clk_hdmi),
1094-
.din(hdmi_data_sl),
1095-
.hs_in(hdmi_hs_sl),
1096-
.vs_in(hdmi_vs_sl),
1097-
.de_in(hdmi_de_sl),
1121+
.din(hdmi_data_mask),
1122+
.hs_in(hdmi_hs_mask),
1123+
.vs_in(hdmi_vs_mask),
1124+
.de_in(hdmi_de_mask),
10981125

10991126
.dout(hdmi_data_osd),
11001127
.hs_out(hdmi_hs_osd),

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