@@ -67,19 +67,22 @@ enc_mem_common(uint8_t* buf, unsigned ripoff, FeMem op0, uint64_t op1,
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withsib = true;
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}
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- if (UNLIKELY (op0 .base .idx == op_reg_idx (FE_NOREG ))) {
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- * buf ++ = (reg << 3 ) | 4 ;
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- * buf ++ = sib | 5 ;
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- enc_imm (buf , off , 4 );
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- return 6 ;
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- } else if (UNLIKELY (op0 .base .idx == FE_IP .idx )) {
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- if (withsib )
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+ if (UNLIKELY (op0 .base .idx >= 0x20 )) {
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+ if (UNLIKELY (op0 .base .idx >= op_reg_idx (FE_NOREG ))) {
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+ * buf ++ = (reg << 3 ) | 4 ;
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+ * buf ++ = sib | 5 ;
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+ enc_imm (buf , off , 4 );
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+ return 6 ;
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+ } else if (LIKELY (op0 .base .idx == FE_IP .idx )) {
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+ if (withsib )
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+ return 0 ;
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+ * buf ++ = (reg << 3 ) | 5 ;
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+ // Adjust offset, caller doesn't know instruction length.
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+ enc_imm (buf , off - ripoff - 5 , 4 );
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+ return 5 ;
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+ } else {
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return 0 ;
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- // Adjust offset, caller doesn't know instruction length.
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- off -= ripoff + 5 ;
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- * buf ++ = (reg << 3 ) | 5 ;
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- enc_imm (buf , off , 4 );
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- return 5 ;
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+ }
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}
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rm = op_reg_idx (op0 .base ) & 7 ;
@@ -116,13 +119,15 @@ enc_mem_common(uint8_t* buf, unsigned ripoff, FeMem op0, uint64_t op1,
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static int
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enc_mem (uint8_t * buf , unsigned ripoff , FeMem op0 , uint64_t op1 , bool forcesib ,
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unsigned disp8scale ) {
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- if ((op_reg_idx (op0 .idx ) != op_reg_idx (FE_NOREG )) != !!op0 .scale )
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- return 0 ;
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unsigned sibidx = forcesib ? 4 : 8 ;
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- if (op_reg_idx (op0 .idx ) != op_reg_idx (FE_NOREG )) {
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+ if (op_reg_idx (op0 .idx ) < op_reg_idx (FE_NOREG )) {
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+ if (!op0 .scale )
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+ return 0 ;
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if (op_reg_idx (op0 .idx ) == 4 )
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return 0 ;
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sibidx = op_reg_idx (op0 .idx ) & 7 ;
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+ } else if (op0 .scale ) {
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+ return 0 ;
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}
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return enc_mem_common (buf , ripoff , op0 , op1 , sibidx , disp8scale );
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}
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